HFA1109 ® 450MHz, Low Power, Current Feedback Video Operational Amplifier August 2004 Features Description • Wide - 3dB Bandwidth (AV = +2). . . . . . . . . . . . 450MHz The HFA1109 is a high speed, low power, current feedback amplifier built with Intersil’s proprietary complementary bipolar UHF-1 process. This amplifier features a unique combination of power and performance specifically tailored for video applications. • Gain Flatness (To 250MHz) . . . . . . . . . . . . . . . . . . 0.8dB • Very Fast Slew Rate (AV = +2) . . . . . . . . . . . . 1100V/µs • High Input Impedance . . . . . . . . . . . . . . . . . . . . . .1.7MΩ • Differential Gain/Phase . . . . . . . . . 0.02%/0.02 Degrees • Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . 10mA The HFA1109 is a standard pinout op amp. It is a higher performance, drop-in replacement (no feedback resistor change required) for the CLC409. If a comparably performing op amp with an output disable function (useful for video multiplexing) is required, please refer to the HFA1149 data sheet. Applications • Professional Video Processing Ordering Information • Video Switchers and Routers • Medical Imaging PART NUMBER (BRAND) • PC Multimedia Systems HFA1109IB (H1109) • Video Distribution Amplifiers TEMP. RANGE (oC) -40 to 85 PACKAGE 8 Ld SOIC PKG. NO. M8.15 HFA11XXEVAL (Note) DIP Evaluation Board for High Speed Op Amps • Flash Converter Drivers NOTE: Requires a SOIC-to-DIP adapter. See “Evaluation Board” section inside. • Radar/IF Processing Pinout HFA1109 (SOIC) TOP VIEW NC 1 8 NC -IN 2 7 V+ +IN 3 6 OUT V- 4 5 NC + CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1999, 2004. All Rights Reserved 1 All other trademarks mentioned are the property of their respective owners. FN4019.4 HFA1109 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V Output Current (Note 2) . . . . . . . . . . . . . . . . Short Circuit Protected 30mA Continuous 60mA ≤ 50% Duty Cycle ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . 1400V Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . 2000V Machine Model (Per EIAJ ED-4701Method C-111) . . . . . . . . 50V Thermal Resistance (Typical, Note 1) θJA (oC/W) SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300oC (Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on an evaluation PC board in free air. 2. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output current must not exceed 30mA for maximum reliability. Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 250Ω, RL = 100Ω, Unless Otherwise Specified PARAMETER (NOTE 3) TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS A 25 - 1 5 mV A Full - 2 8 mV B Full - 10 - µV/oC ∆VCM = ±2V A 25 47 50 - dB ∆VCM = ±2V A Full 45 48 - dB ∆VPS = ±1.25V A 25 50 53 - dB ∆VPS = ±1.25V A Full 47 51 - dB A 25 - 4 10 µA A Full - 5 15 µA B Full - 30 - nA/oC TEST CONDITIONS INPUT CHARACTERISTICS Input Offset Voltage Average Input Offset Voltage Drift Input Offset Voltage Common-Mode Rejection Ratio Input Offset Voltage Power Supply Rejection Ratio Non-Inverting Input Bias Current Non-Inverting Input Bias Current Drift Non-Inverting Input Bias Current Power Supply Sensitivity ∆VPS = ±1.25V A 25 - 0.5 1 µA/V ∆VPS = ±1.25V A Full - 0.5 3 µA/V A 25 - 2 10 µA A Full - 3 15 µA B Full - 40 - nA/oC Inverting Input Bias Current Inverting Input Bias Current Drift Inverting Input Bias Current Common-Mode Sensitivity ∆VCM = ±2V A 25 - 3 6 µA/V ∆VCM = ±2V A Full - 3 8 µA/V Inverting Input Bias Current Power Supply Sensitivity ∆VPS = ±1.25V A 25 - 1.6 5 µA/V ∆VPS = ±1.25V A Full - 1.6 8 µA/V Non-Inverting Input Resistance ∆VCM = ±2V A 25, 85 0.8 1.7 - MΩ ∆VCM = ±2V A -40 0.5 1.4 - MΩ Inverting Input Resistance B 25 - 60 - Ω Input Capacitance B 25 - 1.6 - pF Input Voltage Common Mode Range (Implied by VIO CMRR, +RIN, and -IBIAS CMS tests) A Full ±2 ±2.5 - V 2 HFA1109 Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 250Ω, RL = 100Ω, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS (NOTE 3) TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS Input Noise Voltage Density (Note 4) f = 100kHz B 25 - 4 - nV/√Hz Non-Inverting Input Noise Current Density (Note 4) f = 100kHz B 25 - 2.4 - pA/√Hz Inverting Input Noise Current Density (Note 4) f = 100kHz B 25 - 40 - pA/√Hz Open Loop Transimpedance Gain (Note 4) B 25 - 500 - kΩ Minimum Stable Gain B Full - 1 - V/V AV = -1, RF = 200Ω B 25 300 375 - MHz B Full 290 360 - MHz AV = +1, +RS = 550Ω (PDIP), +RS = 700Ω (SOIC) B 25 280 330 - MHz B Full 260 320 - MHz AV = +2 B 25 390 450 - MHz B Full 350 410 - MHz B 25 - 0 0.2 dB B Full - 0 0.5 dB B 25 -1.0 -0.45 - dB B Full -1.1 -0.45 - dB B 25 -1.6 -0.75 - dB B Full -1.7 -0.75 - dB TRANSFER CHARACTERISTICS AC CHARACTERISTICS -3dB Bandwidth (VOUT = 0.2VP-P, Note 4) Gain Peaking AV = +2, VOUT = 0.2VP-P Gain Flatness (AV = +2, VOUT = 0.2VP-P, Note 4) To 125MHz To 200MHz To 250MHz Gain Flatness (AV = +1, +RS = 550Ω (PDIP), +RS = 700Ω (SOIC), VOUT = 0.2VP-P, Note 4) B 25 -1.9 -0.85 - dB B Full -2.2 -0.85 - dB B 25 ±0.3 ±0.1 - dB B Full ±0.4 ±0.1 - dB To 200MHz B 25 ±0.8 ±0.35 - dB B Full ±0.9 ±0.35 - dB To 250MHz B 25 ±1.3 ±0.6 - dB B Full ±1.4 ±0.6 - dB A 25 ±3 ±3.2 - V A Full ±2.8 ±3 - V A 25, 85 ±33 ±36 - mA A -40 ±30 ±33 - mA To 125MHz OUTPUT CHARACTERISTICS Output Voltage Swing, Unloaded (Note 4) AV = -1, RL = ∞ Output Current (Note 4) AV = -1, RL = 75Ω Output Short Circuit Current AV = -1 B 25 - 120 - mA Closed Loop Output Resistance (Note 4) DC, AV = +1 B 25 - 0.05 - Ω Second Harmonic Distortion (VOUT = 2VP-P, Note 4) 20MHz B 25 - -55 - dBc 60MHz B 25 - -57 - dBc Third Harmonic Distortion (VOUT = 2VP-P, Note 4) 20MHz B 25 - -68 - dBc 60MHz B 25 - -60 - dBc Reverse Isolation (S12) 30MHz B 25 - -65 - dB 3 HFA1109 Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 250Ω, RL = 100Ω, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS (NOTE 3) TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS B 25 - 1.1 1.3 ns B Full - 1.1 1.4 ns TRANSIENT CHARACTERISTICS Rise and Fall Times Overshoot Slew Rate VOUT = 0.5VP-P VOUT = 0.5VP-P AV = -1, RF = 200Ω VOUT = 5VP-P AV = +1, VOUT = 4VP-P, +RS = 550Ω (PDIP), +RS = 700Ω (SOIC) AV = +2, VOUT = 5VP-P Settling Time (VOUT = +2V to 0V step, Note 4) Overdrive Recovery Time B 25 - 0 2 % B Full - 0.5 5 % B 25 2300 2600 - V/µs B Full 2200 2500 - V/µs B 25 475 550 - V/µs B Full 430 500 - V/µs B 25 940 1100 - V/µs B Full 800 950 - V/µs To 0.1% B 25 - 19 - ns To 0.05% B 25 - 23 - ns To 0.01% B 25 - 36 - ns VIN = ±2V B 25 - 5 - ns RL = 150Ω B 25 - 0.02 0.06 % B Full - 0.03 0.09 % B 25 - 0.04 0.09 % B Full - 0.05 0.12 % VIDEO CHARACTERISTICS Differential Gain (f = 3.58MHz) RL = 75Ω Differential Phase (f = 3.58MHz) RL = 150Ω RL = 75Ω B 25 - 0.02 0.06 Degrees B Full - 0.02 0.06 Degrees B 25 - 0.05 0.09 Degrees B Full - 0.06 0.13 Degrees POWER SUPPLY CHARACTERISTICS Power Supply Range C 25 ±4.5 - ±5.5 V Power Supply Current (Note 4) A 25 - 9.6 10 mA A Full - 10 11 mA NOTES: 3. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only. 4. See Typical Performance Curves for more information. 4 HFA1109 Application Information ble oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Optimum Feedback Resistor Although a current feedback amplifier’s bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF . All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF . The HFA1109 design is optimized for a 250Ω RF at a gain of +2. Decreasing RF decreases stability, resulting in excessive peaking and overshoot (Note: Capacitive feedback will cause the same problems due to the feedback impedance decrease at higher frequencies). At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth. By decreasing RS as CL increases, the maximum bandwidth is obtained without sacrificing stability. In spite of this, bandwidth still decreases as the load capacitance increases. Evaluation Board The performance of the HFA1105 may be evaluated using the HFA11XX Evaluation Board and a SOIC to DIP adaptor like the Aries Electronics Part Number 14-350000-10. The layout and schematic of the board are shown in Figure 1. Please contact your local sales office for information. When evaluating this amplifier, the two 510Ω gain setting resistors on the evaluation board should be changed to 250Ω. . TABLE 1. OPTIMUM FEEDBACK RESISTOR GAIN (ACL) RF (Ω) BANDWIDTH (MHz) -1 200 400 +1 250 (+RS = 550Ω) PDIP 250 (+RS = 700Ω) SOIC 350 +2 250 450 +5 100 160 +10 90 70 BOARD SCHEMATIC 510Ω 510Ω 50Ω VH 1 8 2 7 0.1µF 10µF +5V 50Ω IN 10µF Table 1 lists recommended RF values, and the expected bandwidth, for various closed loop gains. For a gain of +1, a resistor (+RS) in series with +IN is required to reduce gain peaking and increase stability 3 6 4 5 0.1µF OUT VL GND GND -5V TOP LAYOUT PC Board Layout VH The frequency response of this amplifier depends greatly on the care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. 1 +IN OUT V+ VL VGND Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. BOTTOM LAYOUT Care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. Thus it is recommended that the ground plane be removed under traces connected to -IN, and connections to -IN should be kept as short as possible. Driving Capacitive Loads Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s phase margin resulting in frequency response peaking and possi- FIGURE 1. EVALUATION BOARD SCHEMATIC AND LAYOUT 5 HFA1109 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified 200 2.0 AV = +2 150 1.5 100 1.0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (mV) AV = +2 50 0 -50 -100 -150 0.5 0 -0.5 -1.0 -1.5 -200 -2.0 TIME (5ns/DIV.) TIME (5ns/DIV.) FIGURE 2. SMALL SIGNAL PULSE RESPONSE FIGURE 3. LARGE SIGNAL PULSE RESPONSE 2.0 200 AV = +1 150 1.5 100 1.0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (mV) AV = +1 50 0 -50 0.5 0 -0.5 -100 -1.0 -150 -1.5 -200 -2.0 TIME (5ns/DIV.) TIME (5ns/DIV.) FIGURE 4. SMALL SIGNAL PULSE RESPONSE FIGURE 5. LARGE SIGNAL PULSE RESPONSE 200 2.0 AV = -1 150 1.5 100 1.0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (mV) AV = -1 50 0 -50 0.5 0 -0.5 -100 -1.0 -150 -1.5 -200 -2.0 TIME (5ns/DIV.) TIME (5ns/DIV.) FIGURE 6. SMALL SIGNAL PULSE RESPONSE FIGURE 7. LARGE SIGNAL PULSE RESPONSE 6 HFA1109 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 2.0 200 1.5 AV = +5 50 AV = +10 AV = +10 0 -50 AV = +5 0.5 AV = +10 0 AV = +10 -0.5 -100 -1.0 -150 -1.5 -200 AV = +5 1.0 AV = +5 -2.0 TIME (5ns/DIV.) TIME (5ns/DIV.) FIGURE 9. LARGE SIGNAL PULSE RESPONSE VOUT = 200mVP-P AV = +1 GAIN 0 -3 AV = + 1 PHASE A V = -1 0 90 AV = + 1 180 A V = -1 0.3 1 10 100 270 3 VOUT = 200mVP-P AV = +10 -3 AV = + 5 PHASE 90 AV = +10 0.3 700 1 10 100 700 FIGURE 11. FREQUENCY RESPONSE 116 106 AV = +1 ( VIOI ) ) 0 -0.1 -0.2 AZOL (dB, 20 LOG NORMALIZED GAIN (dB) 270 FREQUENCY (MHz) VOUT = 200mVP-P -0.3 -0.4 AV = +2 -0.6 -0.7 1 180 AV = +5 FIGURE 10. FREQUENCY RESPONSE -0.5 AV = +2 0 FREQUENCY (MHz) 0.1 AV = + 2 GAIN 0 PHASE (DEGREES) NORMALIZED GAIN (dB) 3 NORMALIZED PHASE (DEGREES) GAIN (dB) FIGURE 8. SMALL SIGNAL PULSE RESPONSE 10 FREQUENCY (MHz) 100 96 86 76 66 0 56 45 46 90 36 135 26 180 0.01 500 0.1 0.3 1 3 6 10 30 100 500 FREQUENCY (MHz) FIGURE 12. GAIN FLATNESS FIGURE 13. OPEN LOOP TRANSIMPEDANCE 7 PHASE (DEGREES) 100 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (mV) 150 HFA1109 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) -30 -20 AV = +1 AV = +1 100MHz -30 -40 100MHz -50 DISTORTION (dBc) DISTORTION (dBc) -40 50MHz -60 20MHz 10MHz -70 -80 -90 -50 50MHz -60 -70 20MHz -90 -6 -3 0 3 6 OUTPUT POWER (dBm) 9 -100 12 FIGURE 14. 2nd HARMONIC DISTORTION vs POUT -6 -3 0 3 6 OUTPUT POWER (dBm) 12 -30 AV = +2 AV = +2 -40 -40 100MHz 100MHz DISTORTION (dBc) DISTORTION (dBc) 9 FIGURE 15. 3rd HARMONIC DISTORTION vs POUT -30 -50 50MHz -60 10MHz -70 -50 50MHz -60 20MHz -70 20MHz 10MHz -80 -90 10MHz -80 -80 -6 -3 0 3 6 9 OUTPUT POWER (dBm) 12 -90 15 FIGURE 16. 2nd HARMONIC DISTORTION vs POUT -6 -3 0 3 6 9 OUTPUT POWER (dBm) 12 15 FIGURE 17. 3rd HARMONIC DISTORTION vs POUT -20 -20 VOUT = 2VP-P VOUT = 2VP-P -30 -30 DISTORTION (dBc) DISTORTION (dBc) AV = +1 -40 -40 -50 AV = -1 -50 AV = +2, -1 -60 AV = +2 -60 AV = +1 -70 -70 AV = +1 -80 0 10 20 30 40 50 60 70 FREQUENCY (MHz) 80 90 -80 100 FIGURE 18. 2nd HARMONIC DISTORTION vs FREQUENCY 0 10 20 30 40 50 60 70 FREQUENCY (MHz) 80 90 100 FIGURE 19. 3rd HARMONIC DISTORTION vs FREQUENCY 8 HFA1109 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 3.6 +VOUT (RL = 100Ω) 3.4 1K |-VOUT| (RL = 100Ω) 3.2 OUTPUT VOLTAGE (V) OUTPUT RESISTANCE (Ω) AV = +2 100 10 1 0.1 0.01 3.0 +VOUT (RL = 50Ω) +VOUT (RL = 50Ω) 2.8 2.6 |-VOUT| (RL = 100Ω) 2.4 2.2 |-VOUT| (RL = 50Ω) 2.0 1.8 0.3 1 10 100 1.6 -75 1000 -50 -25 FREQUENCY (MHz) FIGURE 20. CLOSED LOOP OUTPUT RESISTANCE 75 14 17 13.5 16 125 15 14 SUPPLY CURRENT (mA) 12.5 12 11.5 11 10.5 10 9.5 VS = ±8V 13 12 11 10 VS = ±5V 9 8 7 VS = ±4V 6 9 5 8.5 4 4.5 5 5.5 6.5 6 SUPPLY VOLTAGE (±V) 7 7.5 4 -75 8 FIGURE 22. SUPPLY CURRENT vs SUPPLY VOLTAGE -50 -25 0 50 25 TEMPERATURE (°C) ENI INI+ SETTLING ERROR (%) 10 10 NOISE CURRENT (pA/√Hz) INI+ 125 FIGURE 23. SUPPLY CURRENT vs TEMPERATURE AV = +2 VOUT = 2V 0.1 INI- 100 75 100 100 NOISE VOLTAGE (nV/√Hz) 100 FIGURE 21. OUTPUT VOLTAGE vs TEMPERATURE 13 SUPPLY CURRENT (mA) 0 25 50 TEMPERATURE (°C) 0.05 0.025 0 -0.025 -0.05 -0.1 1 1 0.1 1 10 FREQUENCY (kHz) 10 100 20 30 40 50 60 70 80 TIME (ns) FIGURE 24. INPUT NOISE CHARACTERISTICS FIGURE 25. SETTLING RESPONSE 9 90 100 HFA1109 Die Characteristics DIE DIMENSIONS: GLASSIVATION: 59 mils x 80 mils x 19 mils 1500µm x 2020µm x 483µm Type: Nitride Thickness: 4kÅ ±0.5kÅ TRANSISTOR COUNT: METALLIZATION: 130 Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ SUBSTRATE POTENTIAL (Powered Up): Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ Floating (Recommend Connection to V-) Metallization Mask Layout HFA1109 NC NC NC NC V+ -IN OUT NC NC +IN NC V- 10 NC HFA1109 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA 0.25(0.010) M H B M INCHES MILLIMETERS E SYMBOL -B1 2 3 L SEATING PLANE -A- h x 45o A D -C- e A1 B C 0.10(0.004) 0.25(0.010) M C A M B S MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e µα MIN 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 8o 0o N α 8 0o 8 7 8o NOTES: Rev. 0 12/93 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11