Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ SP8715 SP8715 1100MHz Very Low Current Multi-Modulus Divider DS3830 Features ● ● ● ● ● ● ● ● ● Operation to 1100MHz Very Low Power Single Supply Operation 2.7V to 5.25V Power Down Facility for Battery Economy Latched Modulus Control Input Push Pull Output Drive ESD Protection on All Pins† Description The SP8715 is a switchable divide by 64/65, 128/129 programmable divider which is guaranteed to operate up to 1100MHz. It will operate from a supply of 2.7V to 5.25V and requires typically 3.6mA (including the output current). It also features a power down facility for battery economy. Cellular Telephones Cordless Telephones Mobile Radio † September 1999 Ordering Information SP8715/IG/MPAS Industrial Temperature Range Miniature Plastic SOIC Package SP8715/IG/MPAC As Above supplied on Tape and Reel Applications ● ISSUE 4.2 The RF inputs are internally biased and should be capacitively coupled to the signal source. The output is designed to interface with CMOS synthesisers. ESD precautions must be observed V CK 6 D MC D TYPE BIAS Q 3 250K RS V RF INPUT (CLOCK) CC 2 CC CONTROL LOGIC 7 POWER DOWN 5 NOMINAL V EE 1 DIVIDE BY 4/5 DIVIDE BY 16 / 32 4 OUTPUT 8 V EE Figure 1 Block Diagram 1 SP8715 MP8 Figure 2 Pin Connections Absolute Maximum Ratings Supply voltage (VEE =0V) (note 1) -0.5V to 7V Control and RF inputs, (note 1)-0.5V to VCC+0.5V RF output (VEE =0V) RF input current (note 1) 10mA Operating temperature -40°C to +85°C Storage temperature range -55°C to +150°C Maximum junction temperature +150°C NOTE 1. Duration <2 minutes. Electrical Characteristics Guaranteed over the following conditions (unless otherwise stated): VCC =+2.7V to +5.25V (with respect to VEE), Output load (pin 4) = 10pF, Tamb = -40°C to +85°C (note 2) Value Characteristic Min. Max. Units Conditions Supply current (note 3) 3.6 4.2 mA Power down input low Supply current (note 3) 8 50 µA Power down input high Power down high VCC-0.5 V CC V Power down low 0 V CC-2.0 V Modulus control high (note 4) 0.6VCC V CC V Divide by 64 or 128 Modulus control low (note 4) 0 0.4VCC V Divide by 65 or 129 Ratio select high (note 4, 9) 0.6VCC V CC V Divide by 64 or 65 Ratio select low (note 4, 9) 0 0.4VCC V Divide by 128 or 129 Max. sinewave input frequency 1100 Min. sinewave input frequency 200 Min. RF input voltage 50 Max. RF input voltage 2 Typ. 200 MHz See Figure 5 MHz See Figure 5 mV RMS RF input 200MHz to 1100MHz. See Figure 5 mV RMS RF input 200MHz to 1100MHz. See Figure 5 SP8715 Electrical Characteristics (Continued) Guaranteed over the following conditions (unless otherwise stated): VCC=+2.7V to +5.25V (with respect to VEE), Output load (pin 4) = 10pF, T amb = -40°C to +85°C (note 2) Value Characteristic Min. Output level (pin 4) 500 Modulus set-up time, ts (notes 5,6,8) 20 Typ. Max. Units 600 Conditions mV p-p ns RF input = 1GHz Modulus hold time, th (notes 6,8) 1 ns RF input = 1GHz Power down time, tpd (notes 7,8) 10 µs See Figure 9 6 µs See Figure 9 Power down recovery time, t pu (notes 7,8) NOTES 2. All electrical testing is performed at +85°C. 3. Typical values are measured at +25°C and VCC = +5V. 4. Modulus Control and Ratio Select are high impedance inputs which can be driven directly by standard CMOS outputs. 5. Modulus control is latched at the end of the previous cycle. 6. See Figure 4. 7. See Figure 8. 8. These parameters are not tested but are guaranteee by design. 9. The ratio select pin is not intended to be switched dynamically. OPERATING NOTES The RF inputs are biased internally and are normally coupled to the signal source with suitable capaitors. The output stage has a novel design and is intended to drive a CMOS synthesiser input. External pulldown resistors or circuits are not required. The SP8715 is not suitable for driving TTL or similar devices. The device will operate down to DC frequencies for non-sinusoidal signals provided that the input slew rate is better than 100V/µs. POWER DOWN (pin 7) is connected internally to a pull-down resistor. If the battery economy facility is not used, pin 7 should be either left unconnected or connected to V EE. 3 Ratio Select (Pin 3) Modulus Control (Pin 6) L L H H L H L H RF INPUT VOLTAGE (mV RMS) SP8715 Division Ratio 129 128 65 64 Table 1 Truth Table 1000 800 TYPICAL OVERLOAD 600 400 TYPICAL SENSITIVITY 200 GUARANTEED* OPERATING WINDOW 0 200 400 600 800 1000 1200 FREQUENCY (MHZ) * Tested as specified in table of Electrical Characteristics Figure 3 Typical Input Characteristics RF INPUT CLOCK MODULUS CONTROL INPUTS DON'T CARE DON'T CARE 32 (64) OUTPUT ts th Figure 4 Modulus Control Timing Diagram 4 32 (64) or 33 (65) SP8715 V CC 100n 50‰ MONITOR 1n V EE V CC 50‰ SIGNAL SOURCE POWER DOWN RF INPUT SP8715 OUTPUT OUTPUT 1n CL RF INPUT RATIO SELECT MC 10n 10n MODULUS CONTROL 1 INPUT MODULUS CONTROL 2 INPUT Figure 5 Toggle Frequency Test Circuit j1 j2 j0.5 S11 PLOT 50 OHM NORMALISED j0.2 0.2 0.5 1 2 f1 -j0.2 f1: 130MHz f2: 1310MHz f2 -j0.5 -j2 -j1 Figure 6 Typical S11 parameter for pin 1. V CC = +5.0V 5 SP8715 300 200 R( ) 100 0 -100 -200 -300 jx ( ) -400 -500 -600 -700 -800 100 200 300 400 500 600 700 800 900 INPUT FREQUENCY (MHz) 1000 Figure 7 Typical Input Impedance v. Frequency 6 1100 1200 1300 1400 SP8715 FREQ-MHZ R (Ω) jx (Ω) 130.000 153.600 177.200 200.800 224.400 248.000 271.600 295.200 318.800 342.400 366.000 389.600 413.200 436.800 460.400 484.000 507.600 531.200 554.800 578.400 602.000 625.600 649.200 672.800 696.400 720.000 743.600 767.200 790.800 814.400 838.000 861.600 885.200 908.800 932.400 956.000 979.600 1003.20 1026.80 1050.40 1074.00 1097.60 1121.20 1144.80 1168.40 1192.00 1215.60 1239.20 1262.80 1286.40 1310.00 255.068 153.362 153.330 115.187 88.649 80.815 71.050 56.207 39.526 41.338 38.779 39.210 23.809 21.221 27.545 23.333 22.227 19.931 17.767 17.636 14.607 12.479 13.075 12.891 12.583 11.250 10.213 10.187 11.269 11.081 10.509 10.063 10.172 10.745 10.841 10.884 12.260 12.984 14.508 16.625 19.260 22.799 23.285 21.149 18.956 16.434 14.377 13.743 12.711 12.776 12.598 -733.538 -688.623 -583.339 -545.839 -482.377 -441.798 -411.502 -369.645 -346.620 -323.129 -304.804 -280.556 -269.674 -255.279 -245.161 -234.680 -224.572 -211.375 -203.241 -194.613 -186.545 -182.049 -174.839 -168.320 -160.468 -156.267 -149.642 -145.328 -143.144 -137.557 -132.750 -129.254 -124.495 -120.568 -118.100 -113.395 -109.552 -105.975 -103.110 -99.886 -98.149 -98.605 -99.907 -100.925 -99.639 -98.425 -95.033 -92.553 -89.249 -86.081 -82.581 Table.2 Coefficients for Figure 7 7 SP8715 CURRENT VOLTAGE tpu 0.95 I C VCC - 0.5V POWER DOWN INPUT VOLTAGE SUPPLY CURRENT VCC - 2.0V tpd TIME Figure 8 Power Up and Power Down Figure 9 Power-Down Time Test Circuit 8 0.05 I C For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. 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