19-5843; Rev 2; 1/12 TION KIT EVALUA BLE IL AVA A System Power Management for Mobile Handset The MAX8939/MAX8939A power management ICs contain the necessary supplies and features for supporting cell phone designs based on the Intel Mobile Communications (IMC) 61XX 3G platform. Designed to power all peripheral components in the platform, the ICs also provide the necessary signals to control the 61XX baseband processor. The integrated lithium-ion (Li+) charger is protected up to 28V input and features a protected output voltage for supply of a USB transceiver. Proprietary thermalregulation circuitry limits the die temperature during fast-charging or when the ICs are exposed to high ambient temperatures, allowing maximum charging current without damaging the ICs. A dedicated current regulator is included for driving a charge indicator LED. Four programmable low-noise, low-dropout linear regulators (LDOs) provide the supply for noise sensitive peripherals. A high power vibrator driver is I2C programmable in 70 PWM levels and 4 output voltages. The ICs also offer two step-up converters; one high power, low voltage (5V) to supply an external audio amplifier or camera flash, and a high voltage (28V) supply for the display and keyboard backlight. Two integrated 25mA current regulators provide independent ramp-up and ramp-down control, programmable through I2C. The MAX8939/MAX8939A are highly integrated ICs that require very few external components and are available in a compact 2.5mm x 3.0mm, 0.65mm max height wafer level package (WLP). Applications Companion Chip for Cell Phones/Smartphones Features S Step-Up Converter 700mA Guaranteed Output Current I2C Programmable Output 3.5V to 5.0V in 16 Steps Over 90% Efficiency On-Chip FET and Synchronous Rectifier Fixed 2MHz PWM Switching Small 2.2µH to 10µH Inductor S WLED Boost Converter 28V Max Step-Up Output Voltage 60mA Output Current Integrated nMOS Power Switch Over 90% Efficiency Fixed 2MHz Switching Small 4.7µH to 10µH Inductor Two 25mA Individually Programmable Current Regulators I2C Programmable Output Current (50µA to 25.25mA) with 128-Step Pseudo Log Dimming Individually Programmable Ramp (Up/Down) Timers Low Dropout (150mV max) S Linear One-Cell Li+ Battery Charger No External MOSFET, Reverse Blocking Diode, or Current-Sense Resistor Programmable Fast-Charge Current (1.5ARMS max for the MAX8939 or 850mARMS max for the MAX8939A) Programmable Top-Off Current Threshold Proprietary Die Temperature Regulation Control 4.1V to 10V Input Voltage Range (MAX8939) 4.1V to 6.25V Input Voltage Range (MAX8939A) with Input Overvoltage Protection Up to 28V Low-Dropout Voltage (300mV at 500mA) Input Power-Source Detection Output Input Overvoltage Protected 4.75V Output (SAFE_OUT) from IN Charge Current Monitor Output Indicator LED Hardware Input Enable 5s Watchdog Feature During Charge S Four Low-Noise LDOs 1x 400mA, 2 x 200mA and 1x 100mA Output Current High 65dB (typ) PSRR Low Noise (45µVRMS typ) 1.7V to 3.2V Programmable Output Voltage Low Quiescent Current (25µA typ) 400mA LDO with Hardware Enable Input S Vibrator Driver Guaranteed 200mA Output Current Programmable Output Voltage 1.3V to VINVIB Repetition Frequency 23.8kHz PWM Speed Control in 70 steps Active Stop Brake S Control Interface for 61XX Baseband MAX8939 Control Through I2C RESET_IN Reset Input Charger Detect PWR_ON_CMP Output IRQ Interrupt Output S 2.9V to 5.5V Supply Voltage Range S Thermal Shutdown Ordering Information PART TEMP RANGE PIN-PACKAGE MAX8939EWV+T -40NC to +85NC 30 WLP (0.5mm pitch) MAX8939AEWV+T -40NC to +85NC 30 WLP (0.5mm pitch) +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. Typical Operating Circuit appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX8939/MAX8939A General Description MAX8939/MAX8939A System Power Management for Mobile Handset ABSOLUTE MAXIMUM RATINGS BATT, OUT1, SAFE_OUT, and INVIB to AGND.....-0.3V to +6.0V CHG_IN, OUT2, LED1, and LED2 to AGND..........-0.3V to +30V LED3 and CHG_MON to AGND..... -0.3V to (VSAFE_OUT + 0.3V) COMP2, IRQ, RESET_IN, COMP1, SCL, SDA, CHG, PWR_ON_CMP, REF, LDO1, LDO2, LDO3, LDO4, and LDO1_EN to AGND..................... -0.3V to (VBATT + 0.3V) OUTVIB to AGND................................... -0.3V to (VINVIB + 0.3V) PGND1 and PGND2 to AGND..............................-0.3V to +0.3V LX1, LX2 Current (Note 1).............................................. 1.7ARMS Continuous Power Dissipation (TA = +70NC) WLP (derate 24.4mW/NC above +70NC)..........................1.9W Operating Temperature....................................... -40NC to +85NC Junction Temperature......................................................+150NC Storage Temperature Range............................. -65NC to +150NC Soldering Temperature (reflow).......................................+260NC Note 1: LX1 has internal clamp diodes to PGND1 and OUT1. LX2 has internal clamp diodes to PGND2 and OUT2. Applications that forward bias these diodes should take care not to exceed the IC package power dissipation limit. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 2) WLP Junction-to-Ambient Thermal Resistance (qJA)...........41°C/W Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (VBATT = 3.7V, VCHG_IN = 5.0V, circuit of Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER CONDITIONS MIN TYP MAX UNITS 5.5 V BATT BATT Operating Voltage 2.9 0.4 1 BATT Shutdown Supply Current All outputs off, disabled, VSCL = VSDA= VRESET_IN = 0V TA = +25NC TA = +85NC 0.4 1 BATT Standby Supply Current All outputs off, VSCL = VSDA = VRESET_IN = 1.8V, I2C ready TA = +25NC 5 10 TA = +85NC 5 BATT Biasing Supply Current I2C ready, one or more outputs on Undervoltage Lockout (UVLO) Threshold BATT rising I2C 60 2.6 Undervoltage Lockout Hysteresis 2.75 FA FA FA 2.9 V 100 mV Threshold +160 NC Hysteresis 20 NC THERMAL SHUTDOWN REFERENCE Reference Output Voltage Reference Supply Rejection 1.200 V 0.2 mV LOGIC AND CONTROL INPUTS Input Low Level SDA, SCL, LDO1_EN, CHG, and RESET_IN Input High Level SDA, SCL, LDO1_EN, CHG, and RESET_IN TA = +25NC SDA, SCL, LDO1_EN, CHG, and RESET_IN, 0 < VIN < 5.5V TA = +85NC Logic-Input Current 0.4 1.40 V V -1 +1 0.1 2 _______________________________________________________________________________________ FA System Power Management for Mobile Handset (VBATT = 3.7V, VCHG_IN = 5.0V, circuit of Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER CONDITIONS MIN TYP MAX UNITS LOGIC AND CONTROL OUTPUTS IRQ (Open-Drain Output) Output Low Voltage IIRQ = 2mA 0.4 V PWR_ON_CMP (Open-Drain Output) Output Low Voltage IPWR_ON_CMP = 2mA 0.4 V SDA Output Low Level ISDA = 6mA 0.4 V 400 kHz I2C SERIAL INTERFACE (VSCL = VSDA = 3V) (Figure 15) Clock Frequency Bus-Free Time Between START and tBUF STOP 1.3 Fs Hold Time Repeated START Condition tHD_STA 0.6 Fs SCL Low Period tLOW 1.3 Fs SCL High Period tHIGH 0.6 Fs Setup Time Repeated START Condition tSU_STA 0.6 Fs SDA Hold Time tHD_DAT 0 Fs SDA Setup time tSU_DAT 100 ns Maximum Pulse Width of Spikes that Must Be Suppressed by the Input Filter of Both DATA and CLK Signals Setup Time for STOP Condition 50 tSU_STO ns 0.6 Fs CHG_IN Input Operating Range 4.1 CHG_IN Current VCHG_IN = 28V, VBATT = 4V, MAX8939A CHG_IN Leakage Current from CHG_IN to BATT VCHG_IN = 28V, VBATT = 0V, MAX8939A Reverse Leakage Current from BATT to CHG_IN VCHG_IN = 0V, VBATT = 0 to 4.2V, MAX8939A VCHG_IN - VBATT, rising CHG_IN Trip Point Input Undervoltage Threshold (UV) Input Overvoltage Threshold (OVP) 400 200 10 V 600 1000 FA 21 80 FA 10 FA 300 VCHG_IN - VBATT, falling 100 VCHG_IN - VBATT, hysteresis 200 400 mV MAX8939, VCHG_IN rising, 500mV hysteresis (typ) 3.9 4.0 4.1 MAX8939A, VCHG_IN rising, 900mV hysteresis (typ) 3.9 4.0 4.1 MAX8939, VCHG_IN rising, 200mV hysteresis (typ) 10.2 10.6 11 MAX8939A, VCHG_IN rising, 200mV hysteresis (typ) 6.25 6.5 6.75 750 1500 FA 500 FA 0.8 I Input Supply Current ICHG_IN - IBATT = 90mA Shutdown Input Current Charger disabled CHG_IN to BATT Dropout On-Resistance VCHG_IN = 3.7V, VBATT = 3.6V 0.4 V V _______________________________________________________________________________________ 3 MAX8939/MAX8939A ELECTRICAL CHARACTERISTICS (continued) MAX8939/MAX8939A System Power Management for Mobile Handset ELECTRICAL CHARACTERISTICS (continued) (VBATT = 3.7V, VCHG_IN = 5.0V, circuit of Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER CONDITIONS MIN TYP MAX 4.75 4.90 5.00 UNITS SAFE_OUT SAFE_OUT Regulated Output ISAFE_OUT = 15mA, VCHG_IN = 5V, TA = 0NC to +85NC V ISAFE_OUT = 15mA, VCHG_IN = 10V, TA = 0NC to +85NC 5.2 SAFE_OUT Current Limit 100 mA 2.666 mV/ mA CHG_MON I/V Conversion Factor Monitoring voltage to charge current - fast-charge current = 450mA (Note 3) I/V Accuracy Overall range Output Voltage 450mA charge current - fast-charge current = 450mA (Note 3) -10 +10 1200 % mV Charge Monitoring Range 0 1.2 V Output Impedance 10 20 40 kI 1.5 3 5 mA INDICATOR LED LED3 Current Sink VCHG_IN = 5V, TA = 0NC to +85NC BATT BATT Regulation Voltage (MAX8939) BATT Regulation Voltage (MAX8939A) IBATT = 90mA, VBATT programmed to 4.2V TA = +25NC 4.179 4.2 4.221 TA = -40NC to +85NC 4.158 4.2 4.242 IBATT = 90mA, TA = +25NC VSET = 11b 4.129 4.150 4.171 VSET = 00b 3.465 3.500 3.535 VSET = 01b 3.811 3.850 3.889 VSET = 10b 4.009 4.050 4.091 VSET = 11b 4.108 4.150 4.192 IBATT = 90mA, TA = -40NC to +85NC -200 -300 -400 Disable Programmable Restart Fast-Charge From BATT regulation voltage, default = disable Threshold CHG_IN Fast-Charge Current (MAX8939) (Note 4) VBATT = 3.5V V mV CHG_CONTROL_A.FAST_CHARGE = 000b 80 90 100 001b 240 270 300 010b 400 450 500 011b 560 630 700 100b 630 765 900 101b 700 850 1000 110b 940 1020 1200 111b 1050 1275 1500 4 _______________________________________________________________________________________ V mA System Power Management for Mobile Handset (VBATT = 3.7V, VCHG_IN = 5.0V, circuit of Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER CHG_IN Fast-Charge Current (MAX8939A) (Note 4) CONDITIONS VBATT = 3.5V MIN TYP MAX CHG_CONTROL_A.FAST_CHARGE = 000b 82 90 98 001b 250 270 290 010b 420 450 480 011b 575 630 685 100b 695 765 835 101b 775 850 925 110b 100 120 140 111b 160 180 200 90 100 mA 2.55 2.6 V CHG_IN Precharge Current VBATT = 2V BATT Prequalification Threshold Voltage VBATT rising hysteresis 140mV (typ) Soft-Start Time Ramp time to fast-charge current 2.5 2.5 UNITS mA ms TOP-OFF Top-Off Threshold (% of Fast-Charge Current) IBATT falling TOP_OFF = 00b 10 TOP_OFF = 01b 20 TOP_OFF = 10b 30 TOP_OFF = 11b (default) 0 % TIMER Timer Accuracy -20 MAX8939 Fast-Charge Time Limit From entering fastcharge to VBATT < 4.2V MAX8939A Precharge Timer Top-Off Timer 60 CCTR = 01b 120 CCTR = 10b 240 CCTR = 00b (default) 24 CCTR = 01b 120 CCTR = 10b 240 MAX8939 30 MAX8939A 12 TOPOFF_TIME = 00b 30 TOPOFF_TIME = 01b 60 TOPOFF_TIME = 10b 120 TOPOFF_TIME = 11b Watchdog Timer +20 CCTR = 00b (default) % min min min Disable MAX8939 2.5 5 10 MAX8939A 15 30 45 s THERMAL LOOP Thermal Limit Temperature +70NC  Junction temperature when the charge current is +85NC  reduced, TJ rising, default +100NC  value +115NC  +100 NC _______________________________________________________________________________________ 5 MAX8939/MAX8939A ELECTRICAL CHARACTERISTICS (continued) MAX8939/MAX8939A System Power Management for Mobile Handset ELECTRICAL CHARACTERISTICS (continued) (VBATT = 3.7V, VCHG_IN = 5.0V, circuit of Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER CONDITIONS MIN TYP MAX UNITS OUT1 STEP-UP DC-DC CONVERTER Input Voltage (VBATT) 2.9 Input Supply Current 2MHz switching, VOUT = 5V, no load OUT1 Voltage Accuracy 500mA load Maximum Output Current VBATT R 3.2V, VOUT1 = 5.0V 5.5 11 TA = +25NC -3 +3 TA = +85NC -4 +4 550 nFET Current Limit V mA 700 % mA 2.0 A Line Regulation VBATT = 2.9V to 4.2V 0.1 %/V Load Regulation 0 to 500mA load 0.5 %/A LX1 nFET On-Resistance LX1 to PGND1, ILX1 = 200mA 0.1 0.2 I LX1 pFET On-Resistance LX1 to OUT1, ILX1 = -200mA 0.15 0.3 I LX1 Leakage VLX1 = 5.5V TA = +25NC 0.1 5 TA = +85NC 1 Switching Frequency 1.8 2 Maximum Duty Cycle 65 75 % 8 % 220 I 3 V Minimum Duty Cycle COMP Discharge Resistance During shutdown or UVLO 2.2 FA MHz VIBRATOR Programmable Output Voltage OUTVIB 1mA at VBATT = VINVIB = 5.5V, 150mA at VBATT = VINVIB = 3.4V, default value Output Current 200 mA Current Limit VOUTVIB = 0V 400 600 mA Dropout Voltage ILOAD = 135mA, TA = +25NC 150 300 mV Line Regulation 3.4V P VBATT = VINVIB < 5.5V, ILOAD = 100mA 2.2 mV Load Regulation 1mA < ILOAD < 200mA 25 mV Power-Supply Rejection DVINVIB/DVOUTVIB f = 10Hz to 10kHz, ILOAD = 30mA 40 dB Output Noise 100Hz to 100kHz, ILOAD = 30mA 65 FVRMS Discharge Time Constant TOFF 90% to 5%, C = 1FF 0.1 ms Active Stop nFET on-resistance 1 I Active Brake on Shutdown nFET on duration 85 ms LDO1 Output Accuracy ILOAD = 1mA Maximum Output Current -3 +3 400 % mA Current Limit VLDO1 = 0V 600 Dropout Voltage ILOAD = 200mA 200 Line Regulation 3.4V P VBATT P 5.5V, ILOAD = 100mA 2.4 mV Load Regulation 50FA < ILOAD < 200mA 25 mV Power-Supply Rejection DVLDO1/DVBATT f = 10Hz to 10kHz, ILOAD = 30mA 60 dB Output Noise Voltage (RMS) 100Hz to 100kHz, ILOAD = 30mA 50 FVRMS 6 _______________________________________________________________________________________ mA 400 mV System Power Management for Mobile Handset (VBATT = 3.7V, VCHG_IN = 5.0V, circuit of Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER CONDITIONS Ground Current ILOAD = 500FA Shutdown Discharge Time TOFF 90% to 10%, C = 4.7FF MIN TYP MAX 21 Shutdown Output Impedance 50 UNITS FA 1 ms 80 I LDO2, LDO3 Output Accuracy ILOAD = 1mA Maximum Output Current -3 +3 200 % mA Current Limit Output = 0V 400 700 mA Dropout Voltage ILOAD = 135mA 200 400 mV Line Regulation 3.4V P VBATT P 5.5V, ILOAD = 100mA 2.4 mV Load Regulation 50FA < ILOAD < 200mA 25 mV Power-Supply Rejection DVLDO_/DVBATT f = 10Hz to 10kHz, ILOAD = 30mA 60 dB Output Noise Voltage (RMS) 100Hz to 100kHz, ILOAD = 30mA 50 FVRMS Ground Current ILOAD = 500FA 21 Shutdown Discharge Time TOFF 90% to 10%, C = 1FF Shutdown Output Impedance 100 FA 1 ms 150 I LDO4 Output Accuracy ILOAD = 1mA Maximum Output Current -3 +3 100 % mA Current Limit VLDO4 = 0V 200 400 mA Dropout Voltage ILOAD = 70mA 200 400 mV Line Regulation 3.4V P VBATT P 5.5V, ILOAD = 50mA 2.4 mV Load Regulation 50FA < ILOAD < 100mA 25 mV Power-Supply Rejection DVLDO4/DVBATT f = 10Hz to 10kHz, ILOAD = 30mA 60 dB Output Noise 100Hz to 100kHz, ILOAD = 30mA 50 FVRMS Ground Current ILOAD = 500FA 25 FA Shutdown Discharge Time TOFF 90% to 10%, C = 1FF Shutdown Output Impedance 100 1 ms 150 I 5.5 V mA OUT2 WLED STEP-UP CONVERTER Input Supply Voltage Input Supply Current OUT2 Leakage Current 2.9 2MHz, no load 2 2.5 TA = +25NC, VOUT2 = 5.5V, shutdown 0.1 1 TA = +85NC, VOUT2 = 5.5V, shutdown 0.1 5 FA LED1, LED2 Current Regulator Dropout Voltage (Note 5) 25.25mA setting 200 5.05mA setting 150 LED_ Regulation Voltage LED_ Current Accuracy 350 mV mV TA = +25NC, ILED_= 25.25mA -3 +3 TA = -40NC to +85NC, ILED_= 25.25mA -5 +5 % _______________________________________________________________________________________ 7 MAX8939/MAX8939A ELECTRICAL CHARACTERISTICS (continued) MAX8939/MAX8939A System Power Management for Mobile Handset ELECTRICAL CHARACTERISTICS (continued) (VBATT = 3.7V, VCHG_IN = 5.0V, circuit of Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER Leakage Current CONDITIONS MIN TYP MAX TA = +25NC, in shutdown 0.01 1 TA = +85NC, in shutdown 0.1 5 UNITS FA LX2 nFET Current Limit nFET On-Resistance LX2 Leakage Current 710 mA ILX2 = 200mA 0.3 0.7 TA = +25NC, 5.5V, shutdown 0.01 1 TA = +85NC, 5.5V, shutdown 0.1 5 2 2.2 Operating Frequency Maximum Duty Cycle 860 1.8 VLED1 or VLED2 = 0.2V 90 I FA MHz % COMP2 Transconductance 20 Fs Soft-Start Charge Current 60 FA Discharge Pulldown 20 kI PROTECTION Overvoltage Threshold VOUT2 rising 28 Overvoltage Hysteresis Open LED Detection Shorted LED Detection 30 V 120 mV 4 100 VOUT2 - 2.2V VOUT2 - 0.7V V V Note 3: The monitoring voltage is proportional to the charging current with a ratio depending on the programmed fast-charge current. For the current equal to the fast-charge current, the monitoring voltage is typically 1.2V. Note 4: The maximum CHG_IN current is the typical value plus 10% for currents up 700mA and the typical value plus 15% for higher currents. Note 5: LED dropout voltage is defined as the LED_ to ground voltage when current into LED_ drops 10% from the value at VLED_= 0.5V. 8 _______________________________________________________________________________________ System Power Management for Mobile Handset OUT1 STEP-UP CONVERTER OUT1 EFFICIENCY vs. LOAD CURRENT OUT1 EFFICIENCY vs. LOAD CURRENT 80 60 VBATT = 3.0V 50 VBATT = 3.7V 40 VBATT = 4.2V 30 90 80 EFFICIENCY (%) 70 MAX8939 toc02 90 VBATT = 3.0V 70 60 50 40 30 20 20 10 10 VOUT1 = 5V 10 1 100 VOUT1 = 3.5V 0 0 10 1 1000 4.97 4.96 VBATT = 3.7V VBATT = 3.0V 4.93 4.92 5.3 5.2 5.1 MIN TON MODE 5.0 PROTECTION MODE (VOUT1 TRACKS VBATT) 4.9 4.91 VOUT1 = 5V 4.8 4.90 0 100 200 300 400 500 600 2.9 700 3.3 3.7 4.1 4.5 4.9 5.3 LOAD CURRENT (mA) BATTERY VOLTAGE (V) OUT1 NO-LOAD SUPPLY CURRENT vs. BATTERY VOLTAGE OUT1 STARTUP WAVEFORM MAX8939 toc06 MAX8939 toc05 20 18 16 SUPPLY CURRENT (mA) NO LOAD 5.4 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 4.98 4.94 5.5 MAX8939 toc03 VBATT = 4.2V 4.95 1000 OUT1 VOLTAGE vs. BATTERY VOLTAGE OUT1 VOLTAGE vs. LOAD CURRENT 5.00 4.99 100 LOAD CURRENT (mA) LOAD CURRENT (mA) MAX8939 toc04 EFFICIENCY (%) 100 MAX8939 toc01 100 2V/div VSCL 5V 1V/div 14 12 VOUT1 10 8 6 4 IL1 2 VOUT1 = 5V 0 2.9 3.3 3.7 4.1 4.5 4.9 5.3 200mA/div NO LOAD 40µs/div BATTERY VOLTAGE (V) _______________________________________________________________________________________ 9 MAX8939/MAX8939A Typical Operating Characteristics (VBATT = 3.7V, circuit of Figure 1, TA = +25NC, unless otherwise noted.) MAX8939/MAX8939A System Power Management for Mobile Handset Typical Operating Characteristics (continued) (VBATT = 3.7V, circuit of Figure 1, TA = +25NC, unless otherwise noted.) OUT1 STEP-UP CONVERTER (CONTINUED) LIGHT-LOAD SWITCHING WAVEFORMS HEAVY-LOAD SWITCHING WAVEFORMS MAX8939 toc07 10mA LOAD VOUT1 MAX8939 toc08 10mV/div (AC-COUPLED) 2V/div VLX2 2V/div VLX2 IL1 100mA/div IL1 20mV/div (AC-COUPLED) VOUT1 500mA/div 700mA LOAD 200ns/div 200ns/div OUT1 LOAD-TRANSIENT RESPONSE (70mA TO 700mA TO 70mA) MAX8939 toc09 VOUT1 500mV/div (AC-COUPLED) 200mA/div IOUT1 20µs/div 10 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset OUT2 WHITE LED DRIVER 25.25mA/STRING 90 80 10.1mA/STRING 60 50 40 25.25mA/STRING 90 EFFICIENCY (%) EFFICIENCY (%) 80 70 100 MAX8939 toc10 100 LED EFFICIENCY vs. BATTERY VOLTAGE 2 STRINGS OF 4 LEDS MAX8939 toc11 LED EFFICIENCY vs. BATTERY VOLTAGE 2 STRINGS OF 5 LEDS 1.00mA/STRING 70 10.1mA/STRING 60 50 40 30 30 20 20 10 10 0 1.00mA/STRING 0 2.9 3.3 3.7 4.1 4.5 4.9 5.3 3.3 2.9 BATTERY VOLTAGE (V) 3.7 4.1 4.5 4.9 5.3 BATTERY VOLTAGE (V) LED STARTUP WAVEFORMS OUT2 SWITCHING WAVEFORMS MAX8939 toc12 MAX8939 toc13 2V/div VSCL 5V/div 5V VLX2 VOUT2 5V/div 200mA/div IL2 IL2 10mA/div ILED NO LOAD 100mA/div DRIVING 1 STRING OF 5 LEDS AT 25.25mA 20µs/div 200ns/div LED RAMP-UP WAVEFORM MAX8939 toc14 VSCL 128ms SETTING, 0.05mA TO 25.25mA 2V/div 5V/div VOUT2 10mA/div ILED_ 40µs/div ______________________________________________________________________________________ 11 MAX8939/MAX8939A Typical Operating Characteristics (continued) (VBATT = 3.7V, circuit of Figure 1, TA = +25NC, unless otherwise noted.) Typical Operating Characteristics (continued) (VBATT = 3.7V, circuit of Figure 1, TA = +25NC, unless otherwise noted.) LDOs LDO DROPOUT VOLTAGE vs. LOAD CURRENT LDO OUTPUT VOLTAGE CHANGE vs. LOAD CURRENT -30 LDO3 LDO2 -40 LDO4 -50 CURRENT LIMIT -60 LDO2 250 LDO1 -20 -70 MAX8939 toc16 -10 300 DROPOUT VOLTAGE (mV) VBATT = 3.7V DEFAULT OUTPUT VOLTAGE MAX8939 toc15 0 LDO4 200 LDO3 150 100 LDO1 50 VBATT = 2.9V OUTPUT SET TO 3.2V 0 0 100 200 300 400 500 600 0 100 150 200 250 300 350 400 50 LOAD CURRENT (mA) LOAD CURRENT (mA) LDO SHUTDOWN WAVEFORMS CHARGE CURRENT vs. BATTERY VOLTAGE MAX8939 toc17 100 2V/div VSCL MAX8939 toc18 OUTPUT VOLTAGE CHANGE (mV) 90 80 VLDO1 2V/div VLDO2 VLDO3 2V/div 2V/div VLDO4 2V/div CHARGE CURRENT (mA) MAX8939/MAX8939A System Power Management for Mobile Handset 70 60 50 40 30 VCHG_IN = 5V VSET = 3.6V DEFAULT CHARGER SETTINGS 20 NO LOAD IBATT 10 1A/div 40µs/div 0 0 1 2 3 4 5 BATTERY VOLTAGE (V) 12 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset BATTERY CHARGER CHARGER CONNECT WAVEFORM VBATT = 3.7V VSET = 4.2V IFC = 450mA 450 CHARGE CURRENT (mA) 400 MAX8939 toc19 CHARGE CURRENT vs. CHG_IN VOLTAGE 500 MAX8939 toc20 VCHG_IN 5V/div 2V/div 350 300 VCHG_IN FALLING TEMP REG +100˚C 250 200 VSAFE_OUT 2V/div VCHG_IN RISING 150 100 UV 50mA/div VCHG_MON OVP 0.1µF CAPACITOR ON VBATT = 3V CHG_MON 50 IBATT 0 0 3 6 9 12 4ms/div 15 CHG_IN VOLTAGE (V) VIB DISABLE WAVEFORM MAX8939 toc21 3V OUTPUT, 50% DUTY CYCLE VOUTVIB ACTIVE BRAKE 1V/div IOUTVIB 50mA/div 40µs/div ______________________________________________________________________________________ 13 MAX8939/MAX8939A Typical Operating Characteristics (continued) (VBATT = 3.7V, circuit of Figure 1, TA = +25NC, unless otherwise noted.) MAX8939/MAX8939A System Power Management for Mobile Handset Bump Configuration TOP VIEW (BUMPS ON BOTTOM) 1 2 3 4 5 6 PGND2 LX2 OUT2 OUT1 LX1 PGND1 A1 A2 A3 A4 A5 A6 COMP2 LED1 RESET_IN SCL B1 B2 B3 B4 B5 B6 LED3 LED2 CHG SDA LDO3 LDO2 C1 C2 C3 C4 C5 C6 + A B C SAFE_OUT OUTVIB D D1 D2 CHG_IN CHG_MON E E1 E2 LDO1_EN COMP1 IRQ PWR_ON_CMP LDO4 LDO1 D3 D4 D5 D6 INVIB BATT AGND REF E3 E4 E5 E6 WLP 0.5mm PITCH Bump Description PIN A1 NAME PGND2 FUNCTION Power Ground for WLED Boost Converter. Connect PGND1, PGND2, and AGND to the PCB ground plane. A2 LX2 A3 OUT2 Inductor Connection and Switching Node for WLED Boost Converter WLED Step-Up Converter Output. Connect a 1FF capacitor from OUT2 to PGND2. A4 OUT1 Step-Up Converter Output. Connect a 2.2FF capacitor from OUT1 to ground. A5 LX1 A6 PGND1 Power Ground for OUT1 Step-Up Converter. Connect PGND1, PGND2, and AGND to the PCB ground plane. B1 COMP2 Step-Up Compensation Node for OUT2 Step-Up Converter. Connect a 0.22FF ceramic capacitor from COMP to ground. The applied COMP capacitance stabilizes the converter and sets the softstart time. COMP discharges to ground through a 20kI resistance when in shutdown. B2 LED1 B3 RESET_IN B4 SCL B5 LDO1_EN B6 COMP1 Inductor Connection and Switching Node for OUT1 Step-Up Converter 25mA LED Current Regulator. Connect LED1 to the cathode of the first LED string. Active-Low Reset Input. Pulse RESET_IN low to reset all registers (except STATUS and EVENT) to their default state. Clock Input for I2C Serial Interface. High impedance when the I2C interface is off. Enable Input for LDO1. Drive LDO1_EN high to enable LDO1, or low to disable LDO1. Once LDO1 is enabled or disabled through I2C, the state of LDO1_EN is ignored until reset. Compensation for OUT1 Step-Up Converter. Connect a 2200pF capacitor from COMP1 to ground. See the Soft-Start OUT1 section for more details. 14 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset PIN NAME FUNCTION C1 LED3 Indicator LED Connection. Connect LED3 to the cathode of the precharge indicator LED. If a precharge indicator LED is not used, leave LED3 unconnected. C2 LED2 25mA LED Current Regulator. Connect LED2 to the cathode of the second LED string. C3 CHG Charger Disable Input. Connect CHG high to disable the charger, or low to enable the charger. Once the charger is enabled or disabled through I2C, the state of CHG is ignored until reset. C4 SDA Data Input for Serial Interface. High impedance when the I2C interface is off. C5 LDO3 200mA LDO Output. Connect a 2.2FF capacitor from LDO3 to ground. In shutdown, LDO3 is pulled to ground through an internal 100I. C6 LDO2 200mA LDO Output. Connect a 2.2FF capacitor from LDO2 to ground. In shutdown, LDO2 is pulled to ground through an internal 100I. D1 SAFE_OUT 4.9V Regulated LDO Output with Input Overvoltage Protection. Connect a 1FF ceramic capacitor from SAFE_OUT to ground. SAFE_OUT can be used to supply low-voltage-rated USB systems and the precharge indicator. D2 OUTVIB Vibrator Driver Output. Connect OUTVIB to the vibrator motor. Connect a 1FF ceramic capacitor from OUTVIB to ground. D3 IRQ D4 PWR_ON _CMP D5 LDO4 100mA LDO Output. Connect a 1FF capacitor from LDO4 to ground. In shutdown, LDO4 is pulled to ground through an internal 100I. D6 LDO1 400mA LDO Output. Connect a 4.7FF capacitor from LDO1 to ground. In shutdown, LDO1 is pulled to ground through an internal 50I. CHG_IN Charger Input Supply Voltage. CHG_IN is the power-supply input for the SAFE_OUT linear regulator and the battery charger. The operating range for the charger input is 4.1V to 10V (MAX8939) or 6.25V (MAX8939A). CHG_IN is protected up to 28V. When VCHG_IN exceeds 10.6V (MAX8939) or 6.75 (MAX8939A), SAFE_OUT and the charger are disabled. Connect a 1FF or larger ceramic capacitor from CHG_IN to ground. E2 CHG_MON Charge Current Monitoring Analog Output. CHG_MON outputs a voltage proportional to the charge current with 1.2V corresponding to the programmed fast-charge current. The CHG_MON output includes ripple from loads on the battery. If this is not desired, connect a small 0.01FF to 0.1FF capacitor at the input of the ADC to filter the ripple. E3 INVIB Input Supply for the Vibrator Driver. Connect INVIB to BATT. Connect a 1FF ceramic capacitor from INVIB to PGND. E4 BATT Battery Connection and IC Supply Voltage. Connect a 10FF ceramic capacitor from BATT to ground. E5 AGND Analog Ground. Connect PGND1, PGND2, and AGND to the PCB ground plane. E6 REF E1 Interrupt Request Open-Drain Output Open-Drain Output to Wake Sleeping Baseband. PWR_ON_CMP pulses low while the charger is connected. See the PWR_ON_CMP section for details. Reference Noise Bypass. Connect a 0.1FF ceramic capacitor from REF to AGND. Do not load. REF is high impedance when shut down. ______________________________________________________________________________________ 15 MAX8939/MAX8939A Bump Description (continued) MAX8939/MAX8939A System Power Management for Mobile Handset Table 1. Output Summary VOLTAGE DEFAULT DEFAULT TOLERANCE STATE AT VALUE (V) (%) POWER-UP OUTPUT CURRENT (mA) DESCRIPTION Q3.0 400 Low-noise LDO to supply power either to the RF or analog section. LDO1 is controlled from the I2C bus or the LDO1_EN input. 1.8 Q3.0 200 Low-noise LDO to supply power either to the RF or analog section. LDO2 is controlled from the I2C bus. Off 2.8 Q3.0 200 Low-noise LDO to supply power either to the RF or analog section. LDO3 is controlled from the I2C bus. 1.7V to 3.2V in 100mV step Off 2.8 Q3.0 100 Low-noise LDO to supply power either to the RF or analog section. LDO4 is controlled from the I2C bus. OUT1 3.5V to 5.0V (STEP-UP) in 100mV step Off 5 Q3.0 700 The OUT1 step-up converter provides a 5V power supply for an audio amplifier. The output voltage is programmable through I2C. Off N/A N/A 60 The OUT2 step-up converter operates at 2MHz and provides a high-voltage source for the keypad and backlight display drivers. 200 High-power vibrator driver with programmable output voltage and speed control in 70 steps through I2C. The vibrator driver has active brake with stop. SUPPLY OUTPUT RANGE LDO1 1.7V to 3.2V in 100mV step Off 2.9 LDO2 1.7V to 3.2V in 100mV step Off LDO3 1.7V to 3.2V in 100mV step LDO4 OUT2 (LED) VBATT to 28V OUTVIB (Vibrator) 1.3V, 2.5V, 3V, or INVIB bypass Off 3 Q3.0 One-cell Li+ Battery Charger SAFE_OUT MAX8939: 3.6V, 4.15V, 4.20V, or 4.25V N/A* MAX8939A: 3.50V, 3.85V, 4.05V, or 4.15V 4.9V MAX8939: 3.6 MAX8939A: 3.5 N/A* 4.9 Q0.6 A stand-alone constant-current, constant voltage (CC/CV), thermally regulated linear MAX8939: charger designed for charging a single-cell 1.3A (max) lithium-ion (Li+) battery. The charger current MAX8939A: and protection timer is programmable 850mA (max) through I2C. Q3.0 Protected output SAFE_OUT can be used to supply low-voltage-rated USB systems and the precharge indicator. The output voltage is a fixed 4.9V. 90 default 100 (max) *Subject to valid voltage present at CHG_IN. 16 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset 2.9V TO 5.5V BATT CHG_IN 1µ F 10µF CC/CVREG LDO SAFE_OUT 4.9V CHG DISABLE 1µ F CHG_MON I/V LI+ LINEAR CHARGER CONTROL 3.5V TO 5V, 700mA OUT1 LED3 PRE_CHG INDICATION 10µF MAX8939 MAX8939A PWR_ON_CMP SCL ON/OFF CONTROL UVLO AND POR AND I2C INTERFACE SDA IRQ CONTROL PWM BOOST CONVERTOR LX1 LX2 1µ F 2.2µF PGND1 COMP1 L2 10µH BATT L1 2.2µH CONTROL RESET_IN BATT TO SYSTEM Li+ BATTERY LDO1 BATT LED BOOST CONVERTER 2200pF 1.7V TO 3.2V, 400mA 4.7µF OUT2 1µF 0.22µF RAMP TIMER BLINK RATE AND DUTY CYCLE PGND2 COMP2 LDO1 CONTROL CONTROL LDO2 CONTROL INVIB 1.3V, 2.5V, 3.0V, OR VBATT OUTVIB LDO3 BATT VIB DRIVER 1.7V TO 3.2V, 200mA 2.2µF 200mA M 1.7V TO 3.2V, 200mA 2.2µF LED2 1µ F LDO2 BATT LED1 BATT LDO1_EN LDO3 1µ F PWM CONTROL CONTROL LDO4 BATT 1.7V TO 3.2V, 100mA 1µF PGND LDO4 CONTROL REF BATT 1.2V REFERENCE AGND 0.1µF Figure 1. Typical Application Circuit and Block Diagram ______________________________________________________________________________________ 17 MAX8939/MAX8939A DC/USB INPUT MAX8939: 4.10V TO 10V MAX8939A: 4.10V TO 6.25V (PROTECTED UP TO 28V) MAX8939/MAX8939A System Power Management for Mobile Handset VBATT SHUTDOWN RESET_IN = LOW RESET_IN = HIGH OR CHG_DET = 1 AND CHG = LOW SAFE_OUT RESET VBATT < VUVLO CHARGER ASSERTED READ DEFAULT SETTING RETURN TO SHUTDOWN RESET_IN = LOW PWR_ON_CMP RETURN TO RESET CHARGER ASSERTED PWR_ON_CMP = HIGH Z WHEN IRQ REGISTER IS WRITTEN VBATT < VUVLO UVLO UPPER CHG_DET WAKE-UP IRQ UVLO UPPER THRESHOLD I2C UVLO UPPER THRESHOLD I2C READ/WRITE STANDBY I2C ACTIVE LDO1_EN ENABLE BAND-GAP AND INTERNAL OSC 0.5ms ENABLE SIGNAL TO CONTROL LDO1 RETURN TO STANDBY ALL SUPPLIES DISABLED BAND-GAP AND INTERNAL OSC DISABLED IF CHARGER NOT CONNECTED ACTIVE ONE OR MORE SUPPLY IS ENABLED OVER_TEMP IRQ IS ASSERTED AND EVENT BIT IS SET Figure 2. MAX8939/MAX8939A State Diagram 18 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset VBATT < 2.5V PRECHARGE PRECHARGE CURRENT MAX8939 TIMEOUT: 30min MAX8939A TIMEOUT: 12min VBATT < 2.4V CHARGER DISABLED CHG = 1, VCHG_IN < 4.1V, VCHG_IN > 10.6V (MAX8939) OR 6.75V (MAX8939A), (VCHG_IN - VBATT) < 250mV, OR THERMAL SHUTDOWN RESET TO DEFAULT IF UVLO = LOW OR RESET = LOW ANY CHARGING STATE DIE TEMPERATURE DEFAULT > +100°C CHARGING CURRENT IS REDUCED AS NECESSARY VBATT > 2.55V FAST-CHARGE MAX8939 DEFAULT: 60min TIMEOUT MAX8939A DEFAULT: 24min TIMEOUT AND 90mA IFAST-CHARGE VSET > 3.5V (MAX8939) OR 3.6V (MAX8939A) IF VBATT = VSET RESTART IF VBATT < RESTART THRESHOLD OR CHG_EN CHARGER DETECT CHG = 0, VCHG_IN > 4.1V, VCHG_IN < 10V (MAX8939) OR 6.25V (MAX8939A), AND (VCHG_IN - VBATT) > 250mV THE CHARGE TIMER IS RESET BY REASSERTED CHG_IN OR CHG_EN TOP-OFF CONSTANT VOLTAGE MODE (CV) DEFAULT: 30min TIMEOUT OR 10% OF IFAST-CHARGE DONE IF TOP-OFF TIMEOUT CHARGE CURRENT < TOP-OFF THRESHOLD AND VBATT = VSET DIE TEMPERATURE < + 100°C STATUS FAST-CHARGE CONSTANT CURRENT (CC) RETURN TO CHARGING STATE IRQ TOP-OFF OR FAST_CHG TIMER EXPIRE IRQ STATUS TOP-OFF ENTERING (CV) IRQ STATUS CHARGE DONE Figure 3. Battery Charger State Diagram ______________________________________________________________________________________ 19 MAX8939/MAX8939A TIMEOUT IF ANY TIMER EXPIRES OR WATCHDOG TIMES OUT, THE CHARGER IS DISABLED MAX8939/MAX8939A System Power Management for Mobile Handset Detailed Description Startup and Power States To guarantee the correct startup of the MAX8939/ MAX8939A, an internal power-on reset is generated after the first connection of the battery. This resets the I2C registers to the default values. The ICs are then in reset state. The reset state is a low power level, where the I2C interface is disabled and it is not possible to read or write to any register. The ICs stay in reset state as long as VBATT is below the UVLO upper threshold. When the battery voltage exceeds the UVLO upper threshold, the ICs enter the standby state and the I2C bus can be written to. The typical response time of the UVLO detection is 50µs. The UVLO upper threshold can be reached three ways: • Fully charge battery is inserted and RESET is logic-high. • RESET changes from logic-low to logic-high and VBATT > VUVLO_UPPER. • Charger is detected and CHG is logic-low. Standby is a low-power state where the I2C is ready for read/write operations and enables the different power units (Table 1). If a unit is enabled through I2C or CHG_IN is powered, the bandgap and internal oscillator are started and the ICs move to the active state. The ICs stay in the active state until the last unit (including the charger) is disabled. Reset The ICs enter the reset state when the battery voltage drops below the UVLO lower threshold. In reset, all registers are reset except the STATUS and EVENT registers that retain their values as long as the battery is connected. In reset, all power units are disabled and only the UVLO and CHG_IN detection circuitry is active. If a fully charged battery is inserted or a charger is detected, the ICs enter standby. If a valid charger is connected, the state machine enables the PWR_ON_CMP generator and an interrupt is sent to the host when above the UVLO upper threshold. When a valid charger is detected while in the reset state, the SAFE_OUT LDO is enabled and the charger begins precharging the battery. Shutdown The shutdown state is an extremely low-power state. To enter shutdown, hold RESET logic-low. In shutdown, all the internal blocks are disabled except the CHG_IN detection. If CHG_IN is asserted, the ICs move to the reset state and starts charging with the default settings. When entering from shutdown, the charger is reset and the PWR_ON_CMP generator is enabled. If the charger is removed, the ICs move back to the shudown state if RESET is still logic-low. Linear Regulators The ICs’ charger uses voltage, current, and thermalcontrol loops to charge a single Li+ cell and to protect the battery. A complete charge cycle covers four states: prequalification (precharge), constant current fastcharge (CC), constant voltage top-off (CV), and charge complete (done). If the battery voltage is below 2.55V, the charger is pre-charging with 90mA until prequalification upper threshold is reach or the maximum precharge time (30min) reached. When the charger is in precharge mode, an LED indicator (LED3) and the SAFE_OUT LDO are turned on; all other functions are disabled. Once the battery voltage has passed the prequalification upper threshold, the charger enters the fast-charge stage. An analog soft-start is used when entering fast charge to reduce inrush current on the input supply. When fast-charge is in progress, a safety timer is enabled and STATUS can be read out of register 0x02 bit 4. The fastcharge current and safety timer are programmable through the I2C interface. The default battery regulation voltage (VSET) is 3.6V (MAX8939) or 3.5V (MAX8939A), but can be programmed to 4.15V, 4.2V, or 4.25V for the MAX8939, or 3.85V, 4.05V, or 4.15V for the MAX8939A. When the battery voltage reaches VSET, the charger changes to top-off mode (CV). When entering top-off, an IRQ is flagged to indicate that the charger is in constant voltage mode. Top-off mode keeps the voltage constant and the current falls slowly until the top-off current threshold is reached. An IRQ is flagged to indicate charge is done. The top-off current threshold is a percentage of the fast-charge current, the threshold is programmable. When the top-off current threshold is set to 0% and restart is disabled, the top-off mode continues until the top-off timer expires. The top-off timer is programmable and can also be disabled. With the top-off threshold set to 0% and top-off timer disabled, the charger continuously charges the battery with a constant voltage and decreasing charge current. This makes it possible to control the charge algorithm through software, without influence of automatic maintaining charge. To qualify charge as done, the current has to be below topoff current threshold or a timeout has occurred. To maintain the battery voltage, the charger can be programmed to restart once the battery voltage drops below a programmable threshold. When restart is enabled and the battery voltage drops below the restart threshold, the charger starts a new charging cycle by entering fast-charge. 20 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset If, at any point while charging the battery, the die temperature approaches the thermal regulation threshold (+100°C default), the ICs reduce the charging current so that the die temperature does not increase. This feature not only protects the ICs from overheating, but also allows the higher charge current without risking damage to the system. Note all charger registers are reset to their default settings by power-on reset (POR) or RESET. Charge On/Off Control CHG is a logic hardware control input. Logic-high disables the charger and logic-low enables the charger. 1. CHG = logic-high, the charger is disabled when power pluck is asserted on CHG_IN, a flag is set in register 0x04, and an interrupt occurs. 2. CHG = Logic-low, the charger is enabled and starts charging if charging conditions are within operating limits. Once the CHG_CONTROL_A register 0x09 is accessed either by reading or writing, the CHG is ignored. When CHG changes status after register 0x09 has been accessed, only STATUS and EVENT_A register is updated and an interrupt occurs. The CHG_EN bit in CHG_CONTROL_A register 0x09 is always  by default. The CHG_EN does not follow the status of CHG, and the charger is enabled just by reading the CHG_CONTROL_A register 0x09 and CHG is ignored. To avoid the charger enabling just by accessing the CHG_CONTROL_A register 0x09, write  in the CHG_EN bit. If the CHG_IN is reconnected, the CHG is reset and the status of the charger is following the logic level on CHG, as long CHG_CONTROL_A register 0x09 is not affected. SAFE_OUT SAFE_OUT is an LDO powered from the CHG_IN input. SAFE_OUT is enabled when a charger is detected (4.1V < VCHG_IN < 10V (MAX8939) or 6.25V (MAX8939A)) and provides a protected output regulated to 4.9V (5V max). Typically, SAFE_OUT is used to power low-voltage USB systems and the precharge indicator. WATCHDOG_EN RESET TIMER CHG_EN/DET CHARGER DISABLED WATHCDOG TIMER IRQ THE WATCHDOG TIMER EXPIRES HOST READ OR WRITE CHARGE REGISTERS t < 5s t = 5s Figure 4. Watchdog Timing Diagram Indicator LED The LED3 output sinks 3mA (typ) to drive an indicator LED. LED3 is on by default and can be controlled by the host by I2C (bit 7 of the REG_CONTROL register). Typically, this LED indicates charge status and SAFE_OUT powers the LED as shown in Figure 1. Charge Current Monitor (CHG_MON) CHG_MON is an analog output used to monitor the charge current. CHG_MON outputs a voltage proportional to the charge current with 1.2V corresponding to the programmed fast-charge current. The CHG_MON output includes ripple from loads on the battery. If this is not desired, connect a small 0.01FF to 0.1FF capacitor at the input of the ADC to filter the ripple. Charger Watchdog Timer During battery fast-charge, a watchdog monitoring function can be activated to ensure that the host processor has control of the charge algorithm. The watchdog timer is enabled through register REG_CONTROL bit WD_EN. When the charger is enabled by CHG_EN or CHG_IN, the watchdog timer starts counting. Within 5s of enabling the charger, the host must read or write register 0x09 or 0x0A to indicate it is alive. This resets the watchdog timer and the host must continue to read or write register 0x09 or 0x0A in intervals of under 5s. If the host takes more than 5s for reading or writing these registers, the watchdog timer expires, generates an interrupt, flags the watchdog timeout in register 0x03, and disables the charger. ______________________________________________________________________________________ 21 MAX8939/MAX8939A If restart is disabled, the charger stops charging when done and does not maintain the battery voltage. When charge done occurs, an IRQ is sent to the host and a flag is set in register 0x03. Reading the register disables the charger. The charger can be enabled by writing to register 0x09 bit 0 (CHG_EN). If one of the safety timers (fast-charge or top-off) expires, an interrupt is sent to the host and a flag is set in register 0x03. The charger is disabled 5s after the safety times out. MAX8939/MAX8939A System Power Management for Mobile Handset Linear Regulators The ICs include four low-dropout linear regulators (LDOs). All LDOs are designed for low dropout, low noise, high PSRR, and low quiescent current to maximize battery life. When the battery voltage is above the UVLO upper threshold, the ICs’ LDOs are ready to be turned on through the I2C interface. The guaranteed current drive capabilities for the LDOs are 400mA for LDO1, 200mA for LDO2 and LDO3, and 100mA for LDO4. The output voltage for each LDO is programmable through the I2C interface from 1.7V to 3.2V in 0.1V steps. LDO1 can be enabled through a hardware pin LDO1_EN. By connecting this pin to a logic-high level, the LDO enables automatically when the UVLO upper threshold is reached. The LDO can also be controlled by the LDO1_EN bit of the REG_CONTROL. When the LDO1_EN bit is written to, the LDO1 enable state reflects the value written, overriding the state of the LDO1_EN pin. When the state of the LDO1_EN pin changes, the LDO1 enable state is determined by the new state of the LDO1_EN pin, overriding the LDO1_EN bit value. This allows the system software to reduce quiescent power consumption by turning off LDO1 without impacting other logic that may utilize the same hardware control used for the LDO1_EN pin. Interrupt Request (IRQ) IRQ is an active-low, open-drain output signal (requires an external pullup resistor) that indicates that an interrupt event has occurred and that the event and status information are available in the event/status registers. Such information includes temperature and voltages inside the ICs fault conditions, etc. The event registers hold information about events that have occurred in the ICs. Events are triggered by a status change in the monitored signals. When an event bit is set in the event register, the IRQ signal is asserted (unless IRQ is masked by a bit in the IRQ mask register). The IRQ is also masked during power-up and is not released until the event registers have been read. Each event register is reset to its initial condition after being read. The IRQ is not released until all the event registers have been read. New events that occur during read-out of the event registers are held until all the event registers have been read to, ensuring that the host processor does not miss them. a charger is detected (VCHG_IN is between 4.1V and 10V (MAX8939) or 6.25V (MAX8939A)) and the battery voltage is above the UVLO threshold. If the battery has already reached the UVLO upper threshold, the charger is detected by a rising edge. When such an event is detected, the ICs start pulsing the PWR_ON_CMP output every 50ms, with a duty cycle of 98%. See Figure 5. The event is also signaled by IRQ, which is asserted when the UVLO upper threshold is reached and the CHG_DET bit is set in register 0x04 (bit 6). The ICs continue pulsing PWR_ON_CMP until the EVENT registers are read, then the register is cleared and PWR_ON_CMP and IRQ return to high impedance. The events causing the PWR_ON_CMP activation are triggered by a rising edge signal that must remain valid for the duration of a 10ms debounce filter. RESET_IN RESET_IN is an active-low input signal to the ICs and is used to provide a full system reset inside the ICs. As long as RESET_IN is asserted, the ICs are not able to do anything (except the charger), until RESET_IN is released. All registers are cleared except the STATUS and EVENT registers. When RESET_IN is asserted, the EVENT_B bit RESET is set. If the CHG_IN voltage is valid and RESET_ IN is asserted, the charger operates in its default state. VCHG_IN UVLO UPPER THRESHOLD VBATT IRQ PWR_ON_CMP 50ms 1ms UVLO AND CHARGER DETECTION EVENT PWR_ON_CMP CHARGER REMOVAL EVENT ALL EVENT REGISTERS ARE READ. PWR_ON_CMP AND IRQ ARE CLEARED PWR_ON_CMP is an open-drain output used to wake-up a sleeping baseband. PWR_ON_CMP is activated when Figure 5. Wake-Up Sequence 22 ������������������������������������������������������������������������������������� ALL EVENT REGISTERS ARE READ. IRQ IS CLEARED. System Power Management for Mobile Handset OUT1 delivers up to 700mA to the load at a voltage programmable through I2C from 3.5V to 5V in 100mV steps. Soft-Start OUT1 OUT1 soft-starts by charging CCOMP1 with a 100FA current source. During this time, the internal MOSFET is switching at the minimum duty cycle. Once VCOMP1 rises above 1V, the duty cycle increases until the output voltage reaches the desired regulation level. COMP1 is pulled to ground with a 30I internal resistor during UVLO or shutdown. OUT2 White LED Driver OUT2 is the output from the step-up DC-DC converter for driving white LEDs. The converter is able to drive up to 60mA at up to 28V. The step-up converter is adaptive connected to the two low-dropout LED current regulators. The step-up converter operates at a fixed 2MHz switching frequency, enabling the use of very small external components to achieve a compact circuit area. For improved efficiency, the step-up converter automatically operates in pulse-skipping mode at light loads. Soft-Start OUT2 From shutdown, once LED1 or LED2 is enabled through the I2C interface, the step-up converter prepares for soft-start. CCOMP2 is quickly pulled to 1V by an internal pullup clamp. Since the LED_ feedback node voltage is less than the regulation threshold (0.35V typ), 40FA current is sourced from the error amplifier and further charges CCOMP2. Once VCOMP2 reaches 1.25V, the step-up converter starts switching at a reduced duty ILED_= FULL SCALE cycle. As VCOMP2 rises, the step-up converter duty cycle increases. When VLED1 or VLED2 reaches 0.35V (typ), the error amplifier stops sourcing current to CCOMP2, soft-start ends, and the control loop achieves regulation as VLED_ settles. The VCOMP2 where the step-up converter exits soft-start depends on the load. A 2.5V upper limit to VCOMP2 is imposed to aid in transient recovery and to allow maximum output for low input voltages. CCOMP2 is discharged to ground through a 20kI internal resistor whenever the step-up converter is turned off, allowing the device to reinitiate soft-start when it is enabled. LED1 and LED2 Current Regulators Each current regulator drives a series string of LEDs. The maximum number of LEDs depends of maximum forward voltage of the LEDs at the maximum desired current. The total forward voltage of the LED string must be below 27.65V. The LED current is independently programmed using the I2C interface from 50FA to 25.25mA with a 128step logarithmic dimming scheme. Ramp-Up/-Down The ICs’ LED current regulators provide ramp- up and ramp-down functionality for smooth transitions between different brightness settings. A controlled ramp is used when the LED current level is changed, and when the LEDs are enabled or disabled. LED1 and LED2 have individual ramp control, making it possible to ramp different groups at different rates. The ramp-up and ramp-down times are controlled by the LED__RU and LED__RD control bits, and the ramps are enabled/disabled by the LED__RAMP_EN bits. The ICs increase or decrease the current one step every tRAMP/32 until the target LED current is reached. Open/Short Detection The ICs include comparators to detect open or shorted LEDs on LED1 and LED2. One comparator on each LED_ output detects when the voltage falls below 100mV, indicating an open LED fault. Another compara- 256ms 512ms 1024ms 2048ms 256ms 512ms 1024ms 2048ms ILED_= ½ SCALE 0mA ILED_= FULL SCALE ILED_= ½ SCALE 0mA Figure 6. Ramp-Up/Ramp-Down ______________________________________________________________________________________ 23 MAX8939/MAX8939A OUT1 Step-Up DC-DC Converter OUT1 is a fixed-frequency PWM step-up converter. The converter switches an internal power MOSFET and synchronous rectifier at a constant 2MHz frequency with varying duty cycle up to 75% to maintain constant output voltage as the input voltage and load current vary. Internal circuitry prevents any unwanted subharmonic switching in the critical step-down/step-up region by forcing a minimum 8% duty cycle. MAX8939/MAX8939A System Power Management for Mobile Handset tor on each LED_ output detects when the voltage rises above VOUT2 - 1V, indicating a shorted LED fault. The fault-detection comparators are enabled only when the corresponding LED_ current regulator is enabled and provides a continuous monitor of the current regulator conditions. Once a fault is detected, it is flagged in the EVENT_B register and the IRQ signal is asserted (unless masked in the IRQ_MASK_B register). Overvoltage Protection If the voltage on the OUT2 rises above 28V (typ), the LED driver is put into the shutdown state. This protects the ICs from excessive voltage in the event of an opencircuit LED. and shorts the vibrator to ground. At the same time the nFET switch works as a recovery diode to protect against reverse voltage from the vibrator. The ICs include current protection that limits the current in case the vibrator motor locks up. Thermal Shutdown The ICs monitor the die temperature at the charger and each LDO and DC-DC regulator. When the temperature exceeds +160NC, the individual regulator is shutdown is shutdown. Once the die cools by 20NC, the regulator may be reenabled through the I2C interface. The charger has independent thermal control circuitry that lowers the charge current to regulate the die temperature during the charge. Vibrator Driver The vibrator driver is an LDO with PWM control (see Figure 7). The LDO output voltage is programmable through I2C to 1.3V, 2.5V, 3.0V, and VBATT. The vibrator driver is driven with a PWM signal of duty cycle from 0% to 83% or 100%, with a repetition frequency of 23.8kHz divided into 84 steps. A PWM ratio set to greater than 83 results in the vibrator output being permanently enabled (100%). Figure 8 shows the output waveform at different output voltage and PWM settings. The duty cycle is set by the I2C interface, with a value greater than 0 enabling the PWM mode of operation. By using the enable/disable, an active stop is activated. When the vibrator is disabled, an nFET switch turns on OUTVIB VIB DRIVER INVIB I2C Serial Interface The serial bus consists of a bidirectional serial-data line (SDA) and a serial-clock input (SCL). See Figure 9. The ICs are slave-only devices, relying upon a master to generate the clock signal. The master initiates data transfer on the bus and generates SCL to permit data transfer. The I2C slave address is 0x62 for write operations and 0x63 for read operations. I2C is an open-drain bus. SDA and SCL require pullup resistors (500I or greater). Optional (24I) resistors in series with SDA and SCL protect the IC inputs from high-voltage spikes on the bus lines. Series resistors also minimize crosstalk and undershoot on bus signals. SDA BATT SCL M PWM MASTER TRANSMITTER/ RECEIVER I2C SLAVE RECEIVER Figure 9. I2C Master/Slave Configuration Figure 7. Vibrator Driver V SDA VBATT 3.0V 2.5V 1.3V SCL PWM Figure 8. Vibrator Driver PWM Output DATA LINE STABLE CHANGE OF DATA VALID DATA ALLOWED Figure 10. I2C Bit Transfer 24 ������������������������������������������������������������������������������������� SLAVE TRANSMITTER/ RECEIVER System Power Management for Mobile Handset Each transmit sequence is framed by a START (S) condition and a STOP (P) condition. Each data packet is 9 bits long; 8 bits of data followed by the acknowledge bit. The ICs support data transfer rates with SCL frequencies up to 400kHz. START and STOP Conditions When the serial interface is inactive, SDA and SCL idle high. A master device initiates communication by issuing a START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a lowto-high transition on SDA, while SCL is high (Figure 11). A START condition from the master signals the beginning of a transmission to the ICs. The master terminates transmission by issuing a not acknowledge followed by a STOP condition (see the Acknowledge section for more information). The STOP condition frees the bus. To issue a series of commands to the slave, the master may issue REPEATED START (Sr) commands instead of a STOP command to maintain control of the bus. In general, a REPEATED START command is functionally equivalent to a regular start command. When a STOP condition or incorrect address is detected, the ICs internally disconnect SCL from the serial interface until the next START condition, minimizing digital noise and feedthrough. Acknowledge Both the master and the ICs (slave) generate acknowledge bits when receiving data. The acknowledge bit is the last bit of each 9-bit data packet. To generate an acknowledge (A), the receiving device must pull SDA low before the rising edge of the acknowledge-related clock pulse (ninth pulse) and keep it low during the high period of the clock pulse (Figure 12). To generate a not acknowledge (NA), the receiving device allows SDA to be pulled high before the rising edge of the acknowledge-related clock pulse and leaves it high during the high period of the clock pulse. Monitoring the acknowledge bits allows for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master should reattempt communication at a later time. Slave Address A bus master initiates communication with a slave device (ICs) by issuing a START condition followed by the slave address. The slave address byte consists of 7 address bits (0110001) and a read/write bit (R/W). After receiving the proper address, the ICs issue an acknowledge by pulling SDA low during the ninth clock cycle. Write Operations The ICs recognize the write byte protocol as defined in the SMBusK specification and shown in section A of Figure 13. The write byte protocol allows the I2C master device to send 1 byte of data to the slave device. The write byte protocol requires a register pointer address for the subsequent write. The ICs acknowledge any register pointer even though only a subset of those registers actually exists in the device. The write byte protocol is as follows: 1) The master sends a START command. 2) The master sends the 7-bit slave address followed by a write bit (0x62). SDA OUTPUT FROM TRANSMITTER D7 D6 D0 NOT ACKNOWLEDGE SDA OUTPUT FROM RECEIVER SDA SCL FROM MASTER SCL 1 2 START CONDITION START CONDITION Figure 11. I2C START and STOP Conditions STOP CONDITION 8 9 ACKNOWLEDGE CLOCK PULSE FOR ACKNOWLEDGEMENT Figure 12. I2C Acknowledge SMBus is a trademark of Intel Corp. ______________________________________________________________________________________ 25 MAX8939/MAX8939A Data Transfer One data bit is transferred during each SCL clock cycle. The data on SDA must remain stable during the high period of the SCL clock pulse (see Figure 10). Changes in SDA while SCL is high are control signals (see the START and STOP Conditions section for more information). MAX8939/MAX8939A System Power Management for Mobile Handset 3) The addressed slave asserts an acknowledge by pulling SDA low. 6) The master sends a data byte. 4) The master sends an 8-bit register pointer. 8) The slave acknowledges the data byte. 5) The slave acknowledges the register pointer. 7) The slave updates with the new data. 9) Steps 6 to 8 are repeated for as many registers in the block, with the register pointer automatically incremented each time. 8) The slave acknowledges the data byte. 10) The master sends a STOP condition. 9) The master sends a STOP condition. Read Operations The method for reading a single register (byte) is shown in section A of Figure 14. To read a single register: 6) The master sends a data byte. In addition to the write-byte protocol, the ICs can write to multiple registers as shown in section B of Figure 13. This protocol allows the I2C master device to address the slave only once and then send data to a sequential block of registers starting at the specified register pointer. 7) The slave updates with the new data. 1) The master sends a START command. 2) The master sends the 7-bit slave address followed by a write bit (0x62). Use the following procedure to write to a sequential block of registers: 3) The addressed slave asserts an acknowledge by pulling SDA low. 1) The master sends a START command. 4) The master sends an 8-bit register pointer. 2) The master sends the 7-bit slave address followed by a write bit (0x62). 5) The slave acknowledges the register pointer. 3) The addressed slave asserts an acknowledge by pulling SDA low. 4) The master sends the 8-bit register pointer of the first register to write. 5) The slave acknowledges the register pointer. 6) The master sends a repeated START condition. 7) The master sends the 7-bit slave address followed by a read bit (0x063). 8) The slave asserts an acknowledge by pulling SDA low. 9) The slave sends the 8-bit data (contents of the register). LEGEND MASTER TO SLAVE SLAVE TO MASTER A. WRITING TO A SINGLE REGISTER WITH THE "WRITE BYTE" PROTOCOL 1 7 1 1 8 1 8 1 1 S SLAVE ADDRESS 0 A REGISTER POINTER A DATA A P NUMBER OF BITS R/W B. WRITING TO MULTIPLE REGISTERS 1 7 1 1 8 1 8 1 8 1 S SLAVE ADDRESS 0 A REGISTER POINTER X A DATA X A DATA X+1 A 8 1 8 1 NUMBER OF BITS DATA X+n-1 A DATA X+n A R/W P Figure 13. Writing to the MAX8939/MAX8939A 26 ������������������������������������������������������������������������������������� NUMBER OF BITS System Power Management for Mobile Handset 6) The master sends a REPEATED START condition. 7) The master sends the 7-bit slave address followed by a read bit (0x063). 11) The master sends a STOP condition. In addition, the ICs can read a block of multiple sequential registers as shown in section B of Figure 14. Use the following procedure to read a sequential block of registers: 8) The slave asserts an acknowledge by pulling SDA low. 9) The slave sends the 8-bit data (contents of the register). 10) The master asserts an acknowledge by pulling SDA low when there is more data to read, or a not acknowledge by keeping SDA high when all data has been read. 1) The master sends a START command. 2) The master sends the 7-bit slave address followed by a write bit (0x62). 3) The addressed slave asserts an acknowledge by pulling SDA low. 11) Steps 9 and 10 are repeated for as many registers in the block, with the register pointer automatically incremented each time. 4) The master sends an 8-bit register pointer of the first register in the block. 12) The master sends a STOP condition. 5) The slave acknowledges the register pointer. LEGEND MASTER TO SLAVE SLAVE TO MASTER A. READING A SINGLE REGISTER 1 7 1 1 8 1 S SLAVE ADDRESS 0 A REGISTER POINTER 1 A Sr NUMBER OF BITS 7 1 1 8 SLAVE ADDRESS 1 A DATA 7 1 1 8 SLAVE ADDRESS 1 A DATA X R/W NA P R/W B. READING MULTIPLE REGISTERS 1 7 1 1 8 S SLAVE ADDRESS 0 A REGISTER POINTER X R/W 1 1 A Sr 8 8 DATA X+1 A DATA X+n-1 R/W NUMBER OF BITS A NUMBER OF BITS 8 A DATA X+n NA P Figure 14. Reading from the MAX8939/MAX8939A SDA tSU,STA tSU,DAT tLOW tBUF tHD,STA tHD,DAT tSU,STO tHIGH SCL tHD,STA tR START CONDITION tF REPEATED START CONDITION STOP CONDITION START CONDITION Figure 15. I2C Timing Diagram ______________________________________________________________________________________ 27 MAX8939/MAX8939A 10) The master asserts a not acknowledge by keeping SDA high. MAX8939/MAX8939A System Power Management for Mobile Handset Table 2. Register Access Types SYMBOL REGISTER TYPE NOTES R Read only A field which is either static or is updated only by hardware. Value written by software is ignored by hardware; that is, software may write any value to this field without affecting hardware behavior. W Write only — R/W Read/write Hardware updates of this field are visible by software read and software updates of this field are visible by a hardware read. RH Read only; hardware affected — Read and clear — Not affected by software reset — R&C NASR Table 3. Operating Mode REGISTER ACCESS REGISTER POWER-ON MSB BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 LSB BIT 0 TYPE POINTER DEFAULT CHIP_ID1 R 0x00 0x56 Die type information CHIP_ID2 R 0x01 0x04 Die type and mask revision information STATUS R 0x02 0x00 EVENT_A R/R&C 0x03 0x00 EVENT_B R/R&C 0x04 0x00 IRQ_MASK_A W 0x03 0xFF IRQ_MASK_B W 0x04 0xEF CHG_REM CHG_DET REG_CONTROL R/W 0x05 0x80 LED3_EN LDO1/LDO2 R/W 0x06 0x1C LDO2 LDO3/LDO4 R/W 0x07 0xBB LDO4 LDO3 BOOST1 R/W 0x08 0x0F Reserved BOOST1 CHG_CONTROL_A R/W 0x09 0x1F CHG_CONTROL_B R/W 0x0A 0x20 TOPOFF_TIME LED_RAMP_1 R/W 0x0B 0x80 VIB_VOLTAGE LED1_RD LED1_RU LED_RAMP_2 R/W 0x0C 0x00 LED2_ LED1_ RAMP_EN RAMP_EN LED2_RD LED2_RU LED1 R/W 0x0D 0x00 EN LED2 R/W 0x0E 0x00 EN ILED2 VIB R/W 0x0F 0x00 EN SPEED Reserved CHG_DET TOP_OFF TEMP_ REG CHG_OVP_ RESTART IN CHG_REM CHG_DET TEMP_ REG CHG_ OVP_IN WD_EN UVLO RESTART UVLO FAST_ CHG LDO1_ HWEN TEMP_ REG DONE CHG DONE TOP_OFF WDOG_ TIMEOUT TIME_ OUT CHG LED2_ FAULT LED1_ FAULT LDO1_ HWEN WDOG_ TIMEOUT TIME_ OUT CHG LED2_ FAULT LED1_ FAULT LDO1_ HWEN RESET OVERTEMP DONE TOP_OFF RESET OVERTEMP BOOST2_ BOOST1_ LDO4_EN LDO3_EN LDO2_EN LDO1_EN EN EN LDO1 FAST_CHARGE RESTART TEMP_REG TOP_OFF CCTR ILED1 28 ������������������������������������������������������������������������������������� CHG_EN VSET System Power Management for Mobile Handset REGISTER NAME CHIP_ID1 Register Pointer 0x00 Reset Value 0x56 Type R BIT TYPE NAME DESCRIPTION DEFAULT 0–7 R Die type BCD characters 69 0x56 Table 5. CHIP_ID2 REGISTER NAME CHIP_ID2 Register Pointer 0x01 Reset Value 0x05 (MAX8939), 0x06 (MAX8939A) Type R BIT TYPE NAME DESCRIPTION DEFAULT 0–7 R Mask Revision BCD characters 01 0x05 (MAX8939), 0x06 (MAX8939A) Table 6. STATUS REGISTER NAME STATUS Register Pointer 0x02 Reset Value 0x00 Type R BIT TYPE 0 R NAME 1 R CHG DONE 2 R TEMP_REG 3 R LDO1_HWEN 4 R FAST_CHG 5 R 6 R 7 R Reserved DESCRIPTION DEFAULT Charger disabled 0 Fast-charging complete 0 Charger in thermal regulation 0 Enable pin status 0 Fast charging in progress (CC) 0 TOP_OFF Top off in progress (CV) 0 CHG_DET PWR_ON_CMP asserted by charger detection 0 — 0 ______________________________________________________________________________________ 29 MAX8939/MAX8939A Table 4. CHIP_ID1 MAX8939/MAX8939A System Power Management for Mobile Handset Table 7. EVENT_A REGISTER NAME EVENT_A Register Pointer 0x03 Reset Value 0x00 Type R/R&C BIT TYPE NAME 0 R DESCRIPTION DEFAULT Charger disabled caused IRQ 0 1 R&C CHG TIME_OUT FAST_CHG or TOP_OFF timeout caused IRQ 0 2 R&C WDOG_TIMEOUT Watchdog timeout caused IRQ 0 3 R&C TOP_OFF Entering TOP_OFF (CV) caused IRQ 0 4 R DONE Fast-charging complete caused IRQ 0 5 R&C RESTART Fast-charging restarted caused IRQ 0 6 R&C CHG_OVP_IN Charger input overvoltage caused IRQ 0 7 R TEMP_REG Charger in thermal regulation caused IRQ 0 Table 8. EVENT_B REGISTER NAME EVENT_B Register Pointer 0x04 Reset Value 0x00 Type R/R&C BIT TYPE NAME 0 R LDO1_HWEN Enable pin shift status caused IRQ DESCRIPTION DEFAULT 0 1 R&C LED1_FAULT Shorted or open circuitry caused IRQ 0 2 R&C LED2_FAULT Shorted or open circuitry caused IRQ 0 3 R OVERTEMP Overtemperature caused IRQ 0 4 R&C RESET asserted 0 5 R&C RESET UVLO Undervoltage lockout caused IRQ 0 6 R CHG_DET PWR_ON_CMP asserted by charger detection and caused IRQ when UVLO upper 0 7 R&C CHG_REM Charger removal caused IRQ 0 Note: The EVENT registers hold information about events that have occurred in MAX8939/MAX8939A. Events are triggered by a change in the status registers, which contains the status of the monitored signals. When an EVENT bit is set in the event register the IRQ signal shall be asserted (unless the IRQ is to be masked by a bit in the IRQ mask register). The IRQ is also masked during the power-up sequence and are not released until the event registers have been read for the first time. The event registers are automatically cleared during read-out operation automatically. The event registers may be read-out in page mode. New events that occur during read-out are delayed before they are passed to the event register, ensuring that the host controller does not miss them. 30 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset REGISTER NAME IRQ_MASK_A Register Pointer 0x03 Reset Value 0xFF Type W BIT TYPE 0 W NAME 1 W CHG TIME_OUT 2 W WDOG_TIMEOUT 3 W 4 W 5 6 7 DESCRIPTION DEFAULT Charger disabled 1 FAST_CHG or TOP_OFF timeout caused IRQ 1 Watchdog timeout caused IRQ 1 TOP_OFF Entering TOP_OFF (CV) caused IRQ 1 DONE Fast-charging complete caused IRQ 1 W RESTART Fast-charging restarted caused IRQ 1 W CHG_OVP_IN Charger input overvoltage caused IRQ 1 W TEMP_REG Charger in thermal regulation caused IRQ 1 Table 10. IRQ_MASK_B REGISTER NAME IRQ_MASK_B Register Pointer 0x04 Reset Value 0xEF Type W BIT TYPE NAME 0 W LDO1_HWEN Enable pin shift status caused IRQ DESCRIPTION DEFAULT 1 1 W LED1_FAULT Shorted or open circuitry caused IRQ 1 2 W LED2_FAULT Shorted or open circuitry caused IRQ 1 3 W OVERTEMP 4 W 5 W RESET UVLO 6 W 7 W Overtemperature caused IRQ 1 RESET asserted 1 Undervoltage lockout caused IRQ 1 CHG_DET PWR_ON_CMP asserted by charger detection and caused IRQ when UVLO upper 1 CHG_REM Charger removal caused IRQ 1 ______________________________________________________________________________________ 31 MAX8939/MAX8939A Table 9. IRQ_MASK_A MAX8939/MAX8939A System Power Management for Mobile Handset Table 11. REG_CONTROL REGISTER NAME REG_CONTROL Register Pointer 0x05 Reset Value 0x80 Type R/W BIT TYPE NAME DESCRIPTION DEFAULT 0 1 0 0 R/W LDO1_EN Disable LDO1 Enable LDO1 1 R/W LDO2_EN Disable LDO2 Enable LDO2 0 1 0 2 R/W LDO3_EN Disable LDO3 Enable LDO3 0 1 0 3 R/W LDO4_EN Disable LDO4 Enable LDO4 0 1 0 4 R/W BOOST1_EN Disable BOOST1 Enable BOOST1 0 1 0 5 R/W BOOST2_EN Disable BOOST2 (auto ON) Enable BOOST2 0 1 0 6 R/W WD_EN Disable watchdog charger Enable watchdog charger 0 1 0 7 R/W LED3_EN LED3 disabled LED3 enabled 0 1 1 Table 12. LDO1, LDO2 REGISTER NAME LDO1, LDO2 Register Pointer 0x06 Reset Value 0x1C Type R/W BIT TYPE NAME 0 R/W 3 DEFAULT Set LDO1 output voltage. 1 2 DESCRIPTION LDO1 0000 1.7V 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 32 ������������������������������������������������������������������������������������� 1100 (2.9V) System Power Management for Mobile Handset BIT TYPE NAME 4 DESCRIPTION DEFAULT Sets LDO2 output voltage. 5 R/W LDO2 6 7 0000 1.7V 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 0001 (1.8V) Table 13. LDO3, LDO4 REGISTER NAME LDO3, LDO4 Register Pointer 0x07 Reset Value 0xBB Type R/W BIT TYPE NAME 0 R/W LDO3 2 3 4 0000 1.7V 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 1101 (2.8V) Sets LDO4 output voltage. 5 R/W 7 DEFAULT Set LDO3 output voltage. 1 6 DESCRIPTION LDO4 0000 1.7V 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 1011 (2.8V) ______________________________________________________________________________________ 33 MAX8939/MAX8939A Table 12. LDO1, LDO2 (continued) MAX8939/MAX8939A System Power Management for Mobile Handset Table 14. BOOST1 REGISTER NAME BOOST1 Register Pointer 0x08 Reset Value 0x0F Type R/W BIT TYPE NAME 0 DESCRIPTION DEFAULT Set OUT1 voltage. 1 R/W BOOST1 — Reserved 2 3 0000 3.5V 0001 3.6 0010 3.7 0011 3.8 0100 3.9 0101 4.0 0110 4.1 0111 4.2 1000 4.3V 1001 4.4 1010 4.5 1011 4.6 1100 4.7 1101 4.8 1110 4.9 1111 5.0 1111 (5.0V) 4 5 — — 6 7 Table 15. CHG_CONTROL_A REGISTER NAME CHG_CONTROL_A Register Pointer 0x09 Reset Value 0x1F Type R/W BIT 0 TYPE R/W NAME CHG_EN DESCRIPTION 1 R/W 2 TOP_OFF DEFAULT Disable charger Enable charger Top-off current threshold 10% 20% 30% 0% 0 1 1 00 01 10 11 11 34 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset BIT TYPE NAME DESCRIPTION 3 4 R/W RESTART Restart threshold 5 6 MAX8939/ MAX8939A R/W FAST_CHARGE Fast-charge current MAX8939 7 MAX8939A DEFAULT 200mV 300mV 400mV Disable 90mA 270mA 450mA 630mA 765mA 850mA 1020mA 1275mA 00 01 10 11 000 001 010 011 100 101 110 111 120mA 180mA 110 111 11 000 Note: Accessing this register resets the watchdog timer. Fast-charge current values are maximum value. Real current may be lower by 10%. Table 16. CHG_CONTROL_B REGISTER NAME CHG_CONTROL_B Register Pointer 0x0A Reset Value 0x20 Type R/W BIT TYPE NAME DESCRIPTION 0 00 01 10 11 00 01 10 11 MAX8939 MAX8939A 60min 24min 00 00 MAX8939 MAX8939A 120min 240min Disabled 01 10 11 +70NC +85NC +100NC +115NC 30min 60min 120min Disabled 00 01 10 11 00 01 10 11 MAX8939 R/W VSET Charge voltage 1 MAX8939A 2 R/W CCTR 3 Fast-charge timer for maximum operation time 4 R/W TEMP_REG R/W TOPOFF_TIME Thermal regulation 5 6 7 DEFAULT 3.60V 4.15V 4.20V 4.25V 3.50V 3.85V 4.05V 4.15V Top-off timer for constrained operation 00 00 10 00 Note: Accessing this register resets the watchdog timer. ______________________________________________________________________________________ 35 MAX8939/MAX8939A Table 15. CHG_CONTROL_A (continued) MAX8939/MAX8939A System Power Management for Mobile Handset Table 17. LED_RAMP_1 REGISTER NAME LED_RAMP_1 Register Pointer 0x0B Reset Value 0x80 Type R/W BIT TYPE NAME DESCRIPTION Full-scale ramp time 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 000 001 010 011 100 101 110 111 000 Full-scale ramp time 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 000 001 010 011 100 101 110 111 000 Maximum output voltage from VIB driver 1.3V 2.5V 3.0V Bypass 00 01 10 11 10 0 1 R/W LED1_RU 2 3 4 R/W LED1_RD 5 6 R/W 7 VIB_VOLTAGE DEFAULT 36 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset REGISTER NAME LED_RAMP_2 Register Pointer 0x0C Reset Value 0x00 Type R/W BIT TYPE NAME DESCRIPTION 0 1 DEFAULT 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 R/W LED2_RU Full-scale ramp time R/W LED2_RD Full-scale ramp time 6 R/W LED1_RAMP_EN Disable LED1 RAMP Enable LED1 RAMP 0 1 0 7 R/W LED2_RAMP_EN Disable LED2 RAMP Enable LED2 RAMP 0 1 0 2 3 4 5 000 000 ______________________________________________________________________________________ 37 MAX8939/MAX8939A Table 18. LED_RAMP_2 MAX8939/MAX8939A System Power Management for Mobile Handset Table 19. LED1 REGISTER NAME LED1 Register Pointer 0x0D Reset Value 0x00 Type R/W BIT TYPE NAME 0 1 2 3 R/W ILED1 R/W EN 4 5 6 7 DESCRIPTION 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0.05mA 0.10 0.20 0.25 0.35 0.45 0.55 0.65 0.75 0.85 1.00 1.10 1.20 1.35 1.45 1.60 1.75 1.85 2.00 2.15 2.30 2.45 2.60 2.75 2.9 3.05 3.2 3.35 3.5 3.65 3.85 4 4.15 4.35 4.55 4.7 4.9 5.05 5.25 5.45 5.6 5.8 5.95 0x2B 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 6.15mA 6.35 6.50 6.70 6.90 7.10 7.30 7.45 7.65 7.85 8.05 8.25 8.45 8.65 8.85 9.05 9.25 9.45 9.65 9.90 10.1 10.3 10.5 10.7 10.9 11.15 11.35 11.55 11.8 12.00 12.20 12.45 12.65 12.85 13.10 13.30 13.55 13.75 14.00 14.20 14.45 14.65 14.90 Disable LED1 Enable LED1 DEFAULT 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F 15.15mA 15.35 15.60 15.80 16.05 16.30 16.50 16.75 17.00 17.25 17.45 17.70 17.95 18.20 18.45 18.65 18.90 19.15 19.40 19.65 19.90 20.15 20.40 20.65 20.90 21.15 21.40 21.65 21.90 22.15 22.40 22.65 22.90 23.15 23.40 23.70 23.95 24.20 24.45 24.70 25.00 25.25 0 1 38 ������������������������������������������������������������������������������������� 0000000 0 System Power Management for Mobile Handset REGISTER NAME LED2 Register Pointer 0x0E Reset Value 0x00 Type R/W BIT TYPE NAME 0 1 2 3 R/W ILED2 R/W EN 4 5 6 7 DESCRIPTION 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0.05mA 0.10 0.20 0.25 0.35 0.45 0.55 0.65 0.75 0.85 1.00 1.10 1.20 1.35 1.45 1.60 1.75 1.85 2.00 2.15 2.30 2.45 2.60 2.75 2.90 3.05 3.20 3.35 3.50 3.65 3.85 4.00 4.15 4.35 4.55 4.70 4.90 5.05 5.25 5.45 5.60 5.80 5.95 0x2B 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 6.15mA 6.35 6.50 6.70 6.90 7.10 7.30 7.45 7.65 7.85 8.05 8.25 8.45 8.65 8.85 9.05 9.25 9.45 9.65 9.90 10.10 10.30 10.50 10.70 10.90 11.15 11.35 11.55 11.80 12.00 12.20 12.45 12.65 12.85 13.10 13.30 13.55 13.75 14.00 14.20 14.45 14.65 14.90 Disable LED2 Enable LED2 DEFAULT 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F 15.15mA 15.35 15.60 15.80 16.05 16.30 16.50 16.75 17.00 17.25 17.45 17.70 17.95 18.20 18.45 18.65 18.90 19.15 19.40 19.65 19.90 20.15 20.40 20.65 20.90 21.15 21.40 21.65 21.90 22.15 22.40 22.65 22.90 23.15 23.40 23.70 23.95 24.20 24.45 24.70 25.00 25.25 0 1 0000000 0 ______________________________________________________________________________________ 39 MAX8939/MAX8939A Table 20. LED2 MAX8939/MAX8939A System Power Management for Mobile Handset Table 21. VIB REGISTER NAME VIB Register Pointer 0x0F Reset Value 0x00 Type R/W BIT TYPE NAME R/W SPEED R/W EN 0 1 2 3 4 5 6 7 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0.00% 1.19 2.38 3.57 4.76 5.95 7.14 8.33 9.52 10.7 11.9 13.0 14.2 15.4 16.6 17.8 19.0 20.2 21.4 22.6 23.8 25.0 26.1 27.3 28.5 29.7 30.9 32.1 33.3 34.5 35.7 36.9 38.0 DESCRIPTION 0x21 39.2% 0x22 40.4 0x23 41.6 0x24 42.8 0x25 44 0x26 45.2 0x27 46.4 0x28 47.6 0x29 48.8 0x2A 50.0 0x2B 51.1 0x2C 52.3 0x2D 53.5 0x2E 54.7 0x2F 55.9 0x30 57.1 0x31 58.3 0x32 59.5 0x33 60.7 0x34 61.9 0x35 63.0 0x36 64.2 0x37 65.4 0x38 66.6 0x39 67.8 0x3A 69.0 0x3B 70.2 0x3C 71.4 0x3D 72.6 0x3E 73.8 0x3F 75.0 0x40 76.1 0x41 77.3 Disable VIB Enable VIB 0x42 0x43 0x44 0x45 0x46 ... 0xFF 78.5% 79.7 80.9 82.1 100 100 DEFAULT 0000000 0 1 40 ������������������������������������������������������������������������������������� 0 System Power Management for Mobile Handset Inductor Selection The OUT1 step-up converter is designed to use a 2.2FH to 10FH inductor (see Table 22). To prevent core saturation, ensure that the inductor saturation current rating exceeds the peak inductor current for the application. Calculate the worst-case peak inductor current with the following formula: IPEAK = VOUT × IOUT(MAX) 0.9 × VIN(MIN) + VIN(MIN) × 0.5Fs 2×L The OUT2 LED driver is optimized for using a 10FH inductor, although larger or smaller inductors may be used. Using a smaller inductance results in discontinuous current mode operation over a larger range of output power, whereas use of a larger inductance results in continuous conduction for most of the operating range. To prevent core saturation, ensure that the inductor’s saturation current rating exceeds the peak inductor current for the application. For larger inductor values and continuous conduction operation, calculate the worstcase peak inductor current with the following formula: IPEAK = VOUT × IOUT(MAX) 0.9 × VIN(MIN) + VIN(MIN) × 0.5Fs 2×L For small values of L in discontinuous conduction operation, IPEAK is 860mA (typ). Table 23 provides a list of recommended inductors. Capacitor Selection Ceramic capacitors are recommended due to their low ESR. Ensure that the capacitor maintains its capacitance over temperature and DC bias. Generally ceramic capacitors with X5R or X7R temperature characteristics perform well. Note that some small size ceramic capacitors fail to maintain their capacitance when a DC bias is applied and should be avoided. Place the capacitors as close as possible to the IC. The recommended input and output capacitor values are shown in Figure 1, however, larger value capacitors can be used to further reduce ripple at the expense of size and higher cost. Compensation The OUT1 step-up converter is compensated for stability through an external compensation network from COMP1 to ground. A 2200pF ceramic capacitor is recommended. The OUT2 LED driver is compensated for stability through an external compensation network from COMP2 to ground. A 0.22FF ceramic capacitor is recommended for most applications. Higher CCOMP2 values increase soft-start duration, as well as the time delay between enabling the step-up converter to initiating soft-start. See the Soft-Start OUT2 section for more information. Table 22. Recommended Inductors for L1 MANUFACTURER Cooper (Coiltronics) FDK TDK TOKO PART INDUCTANCE (µH) DCR (mI) ISAT (A) DIMENSIONS (LTYP x WTYP x HMAX) (mm) SD3114 2.2 110 1.74 3.0 x 3.0 x 1.45 MIPF2520 2.2 80 1.3 2.5 x 2.0 x 1.0 MIPW3226 2.2 100 1.1 3.2 x 2.6 x 1.0 VLS3012ET VLS3010T 2.2 10 80 390 1.35 0.65 3 x 3 x 1.2 3 x 3 x 1.0 DE2812C 2.7 75 1.8 3.0 x 3.2 x 1.2 DE2812C 10 325 0.78 3.0 x 3.2 x 1.2 INDUCTANCE (µH) DCR (mI) ISAT (A) DIMENSIONS (LTYP x WTYP x HMAX) (mm) 1098AS-100M 10 290 0.75 2.8 x 3.0 x 1.2 1069AS-220M 22 570 0.47 3 x 3 x 1.8 MIP3226D100M 10 160 0.9 3.2 x 2.6 x 1.0 Table 23. Recommended Inductors for L2 MANUFACTURER TOKO FDK PART ______________________________________________________________________________________ 41 MAX8939/MAX8939A Applications Information MAX8939/MAX8939A System Power Management for Mobile Handset Diode Selection The OUT2 LED converter uses an external rectifier diode. A Schottky diode is recommended due to its fast recovery time and low forward voltage drop. Ensure that the diode’s average and peak current rating exceeds the average output current and peak inductor current. In addition, the diode’s reverse breakdown voltage must exceed the maximum VOUT2. PCB Layout Due to fast switching waveforms and high current paths, careful PCB layout is required. Minimize trace lengths between the IC and the inductor, the diode, the input capacitor, and the output capacitor. Minimize trace lengths between the input and output capacitors and the ICs’ ground terminal, and place input and output capacitor grounds as close together as possible. Use separate power ground and analog ground copper areas, and connect them together at the output capacitor ground. Keep traces short, direct, and wide. Keep noisy traces, such as the LX_ node trace, away from sensitive analog circuitry. For improved thermal performance, maximize the copper area of the LX_ and PGND_ traces. Refer to the MAX8939/MAX8939A Evaluation Kit for an example layout. Chip Information PROCESS: BiCMOS Typical Operating Circuit CHG_IN DC/USB 1µ F USB TRANSCEIVER TO SYSTEM LOAD BATT 22µH CHG OPEN 22µF PGND1 SAFE_OUT Li+ BATTERY 10µF LX1 2200pF 1µF COMP1 LED3 5V/700mA OUT1 CHG_MON AUDIO AMPLIFIER 22µF PWR_ON_CMP LDO1 SCL BROADBAND PROCESSOR 4.7µF SDA IRQ LDO1_EN RESET_IN 10µF BATT MAX8939 MAX8939A eMMC_EN DIGITAL SUPPLY 1.8V/200mA 22µF OUT2 0.22µF PGND2 CAMERA 1µ F LDO2 1µF MMC CARD ANALOG 2.8V/100mA LDO4 LX2 1µF DISPLAY BACKLIGHT 2.9V/400mA BLUETOOTH/FMR COMBO, GPS ANALOG 2.8V/200mA LDO3 DISPLAY 22µF COMP2 INVIB BATT 1µ F KEYPAD BACKLIGHT LED1 LED2 OUTVIB REF AGND PWM SWITCH DRIVER VIBRATOR 1 µF 0.1µF 42 ������������������������������������������������������������������������������������� System Power Management for Mobile Handset PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 30 WLP W302A3+2 21-0016 Refer to Application Note 1891 COMMON DIMENSIONS PIN 1 INDICATOR E MARKING 1 A AAAA D S See Note 7 SIDE VIEW TOP VIEW SE B e E SD D D1 C B A 1 2 3 4 5 6 b 0.05 M S AB 0.03 0.40 REF 0.025 BASIC b 0.31 D1 2.00 E1 2.50 e 0.50 BASIC SD 0.00 BASIC SE 0.25 BASIC 0.03 D E E1 0.05 0.24 A3 A2 A 0.05 S 0.64 A1 A2 A3 A1 A PKG. CODE MIN MAX MIN MAX DEPOPULATED BUMPS W302A3+1 3.05 3.08 2.55 2.58 B2, B3, B4, C2, C3, C4, D2,D3, D4, D5 W302A3+2 2.95 3.11 2.44 2.60 NONE W303A3+1 3.21 3.31 2.95 3.05 NONE W303B3+1 3.19 3.22 2.99 3.02 NONE NOTES: 1. Terminal pitch is defined by terminal center to center value. 2. Outer dimension is defined by center lines between scribe lines. 3. All dimensions in millimeter. 4. Marking shown is for package orientation reference only. 5. Tolerance is ± 0.02 unless specified otherwise. 6. All dimensions apply to PbFree (+) package codes only. 7. Front - side finish can be either Black or Clear. A BOTTOM VIEW - DRAWING NOT TO SCALE - TITLE APPROVAL PACKAGE OUTLINE 30 BUMPS, WLP PKG. 0.5mm PITCH DOCUMENT CONTROL NO. 21-0016 REV. E 1 1 ______________________________________________________________________________________ 43 MAX8939/MAX8939A Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. MAX8939/MAX8939A System Power Management for Mobile Handset Revision History REVISION NUMBER REVISION DATE DESCRIPTION 0 5/11 Initial release 1 11/11 Added MAX8939A to data sheet 2 1/12 Revised LDO output accuracy, added Charge On/Off Control section, updated Figure 3 PAGES CHANGED — 1–43 5–8, 19, 20, 21 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 44 © Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.