CDB4361
Evaluation Board for CS4361
Features
Description
Demonstrates recommended layout and
The CDB4361 evaluation board is an excellent means
for quickly evaluating the CS4361 24-bit, 20-pin, 6channel D/A converter. Evaluation requires an analog
signal analyzer, a digital signal source, and a power
supply. Analog line-level outputs are provided via RCA
phono jacks.
grounding arrangements
CS8416 receives S/PDIF, & EIAJ-340-
compatible digital audio
Header for External PCM Audio
Requires only a digital signal source and power
supplies for a complete digital-to-analog
converter system
The CS8416 digital audio receiver IC provides the system timing necessary to operate the digital-to-analog
converter and will accept S/PDIF, and EIAJ-340-compatible audio data. The evaluation board may also be
configured to accept external timing and data signals for
operation in a user application during system
development.
ORDERING INFORMATION
CDB4361
Evaluation Board
Inputs for Clocks
and Data
CS8416
Digital Audio
Interface
http://www.cirrus.com
CS4361
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
Analog Outputs
OCTOBER '06
DS672DB2
CDB4361
TABLE OF CONTENTS
1. CS4361 DIGITAL-TO-ANALOG CONVERTER ..................................................................................... 4
2. CS8416 DIGITAL AUDIO RECEIVER .................................................................................................... 4
3. INPUT FOR CLOCKS AND DATA ......................................................................................................... 4
4. POWER SUPPLY CIRCUITRY ............................................................................................................... 4
5. GROUNDING AND POWER SUPPLY DECOUPLING .......................................................................... 4
6. ANALOG OUTPUT FILTERING ............................................................................................................. 5
7. OPTIONAL MUTE CIRCUITRY .............................................................................................................. 5
8. PERFORMANCE PLOTS ....................................................................................................................... 7
9. ERRATA ............................................................................................................................................... 15
10. REVISION HISTORY .......................................................................................................................... 26
LIST OF FIGURES
Figure 1.FFT (48 kHz, 0 dB) ....................................................................................................................... 7
Figure 2.FFT (48 kHz, -60 dB) .................................................................................................................... 7
Figure 3.FFT (48 kHz, No Input) ................................................................................................................. 7
Figure 4.FFT (48 kHz Out-of-Band, No Input) ............................................................................................. 7
Figure 5.FFT (48 kHz, -60 dB Wideband) ................................................................................................... 8
Figure 6.FFT (IMD 48 kHz) ......................................................................................................................... 8
Figure 7.48 kHz THD+N vs. Input Freq ....................................................................................................... 8
Figure 8.48 kHz THD+N vs. Level .............................................................................................................. 8
Figure 9.48 kHz, Fade-to-Noise Linearity ................................................................................................... 8
Figure 10.48 kHz, Frequency Response ..................................................................................................... 8
Figure 11.48 kHz, Crosstalk ........................................................................................................................ 9
Figure 12.48 kHz, Impulse Response ......................................................................................................... 9
Figure 13.Dynamic Range 48 kHz .............................................................................................................. 9
Figure 14.FFT (96 kHz, 0 dB) ................................................................................................................... 10
Figure 15.FFT (96 kHz, -60 dB) ................................................................................................................ 10
Figure 16.FFT (96 kHz, No Input) ............................................................................................................. 10
Figure 17.FFT (96 kHz Out-of-Band, No Input) ......................................................................................... 10
Figure 18.FFT (96 kHz, -60 dB Wideband) ............................................................................................... 10
Figure 19.FFT (IMD 96 kHz) ..................................................................................................................... 10
Figure 20.96 kHz, THD+N vs. Input Freq .................................................................................................. 11
Figure 21.96 kHz, THD+N vs. Level ......................................................................................................... 11
Figure 22.96 kHz, Fade-to-Noise Linearity ............................................................................................... 11
Figure 23.96 kHz, Frequency Response ................................................................................................... 11
Figure 24.96 kHz, Crosstalk ...................................................................................................................... 11
Figure 25.96 kHz, Impulse Response ....................................................................................................... 11
Figure 26.Dynamic Range 96 kHz ............................................................................................................ 12
Figure 27.FFT (192 kHz, 0 dB) ................................................................................................................. 12
Figure 28.FFT (192 kHz, -60 dB) .............................................................................................................. 12
Figure 29.FFT (192 kHz, No Input) ........................................................................................................... 13
Figure 30.FFT (192 kHz Out-of-Band, No Input) ....................................................................................... 13
Figure 31.FFT (192 kHz, -60 dB Wideband) ............................................................................................. 13
Figure 32.FFT (IMD 192 kHz) ................................................................................................................... 13
Figure 33.192 kHz, THD+N vs. Input Freq ................................................................................................ 13
Figure 34.192 kHz, THD+N vs. Level ....................................................................................................... 13
Figure 35.192 kHz, Fade-to-Noise Linearity ............................................................................................. 14
Figure 36.192 kHz, Frequency Response ................................................................................................. 14
Figure 37.192 kHz, Crosstalk .................................................................................................................... 14
Figure 38.192 kHz, Impulse Response ..................................................................................................... 14
Figure 39.Dynamic Range 192 kHz .......................................................................................................... 15
2
DS672DB2
CDB4361
Figure 40.System Block Diagram and Signal Flow ................................................................................... 16
Figure 41.CS4361 ..................................................................................................................................... 17
Figure 42.CS8416 S/PDIF Input and Clock Control .................................................................................. 18
Figure 43.PCM Input Header and MUX .................................................................................................... 19
Figure 44.Passive Outputs ........................................................................................................................ 20
Figure 45.Mute Circuitry ............................................................................................................................ 21
Figure 46.Power Supply Connections ....................................................................................................... 22
Figure 47.Silkscreen Top .......................................................................................................................... 23
Figure 48.Top Side .................................................................................................................................... 24
Figure 49.Bottom Side .............................................................................................................................. 25
DS672DB2
3
CDB4361
CDB4361 SYSTEM OVERVIEW
The CDB4361 evaluation board is an excellent means of quickly evaluating the CS4361. The CS8416 digital audio
interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test
equipment. The evaluation board also allows the user to supply external PCM clocks and data through a PCB header for system development.
The CDB4361 schematic has been partitioned into six schematics shown in Figures 41 through 46. Each partitioned
schematic is represented in the system diagram shown in Figure 40. Notice that the system diagram also includes
the interconnections between the partitioned schematics.
1. CS4361 DIGITAL-to-ANALOG CONVERTER
A description of the CS4361 is included in the CS4361 datasheet.
2. CS8416 DIGITAL AUDIO RECEIVER
The system receives and decodes the standard S/PDIF data format using a CS8416 Digital Audio Receiver,
Figure 42. The outputs of the CS8416 include a serial bit clock, serial data, left-right clock, and a 128/256 Fs master
clock. The CS8416 data format is selected using switch S3. The operation of the CS8416 and a discussion of the
digital audio interface is included in the CS8416 datasheet.
The evaluation board has been designed such that the input can be either optical or coaxial, see Figure 42. However, both inputs cannot be driven simultaneously.
The bottom switch of S3 sets the output MCLK to LRCK ratio of the CS8416. This switch should be set to 256
(closed) for inputs Fs≤96 kHz and 128 (open) for Fs≥64 kHz. The 8416 must be manually reset using RESET (S1)
when this switch is changed.
3. INPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow interfacing to external systems via the header J37. Header J37
allows the evaluation board to accept externally generated PCM clocks and data. The schematic for the clock/data
input is shown in Figure 43. The top switch of S3 selects the source as either CS8416 (open) or header J37 (closed).
Please see the CS4361 datasheet for more information.
4. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by two binding posts (GND and +5 V), see Figure 46. VL and VA can be
jumpered separately to either the on board +3.3 V regulator or the +5 V binding post.
WARNING: Refer to the CS4361 datasheet for maximum allowable voltages levels. Operation outside of this range
can cause permanent damage to the device.
5. GROUNDING AND POWER SUPPLY DECOUPLING
As with any high-performance converter, the CS4361 requires careful attention to power supply and grounding arrangements to optimize performance. Figure 41 details the connections to the CS4361 and Figures 47, 48, and 49
show the component placement and top and bottom layout. The decoupling capacitors are located as close to the
CS4361 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated
noise.
4
DS672DB2
CDB4361
6. ANALOG OUTPUT FILTERING
The analog output on the CDB4361 has been designed according to the CS4361 datasheet. This output circuit includes an AC coupling cap and a single pole R and C. An additional load resistance may be added by shunting J23,
J24, J38, J39, J42, and J43 to test the CS4361’s load-driving capability. See Figure 44 on page 20 for more details.
7. OPTIONAL MUTE CIRCUITRY
The CDB4361 contains the optional, recommended mute circuitry for the CS4361. This circuitry is designed to minimize the potential for clicks and pops. In order for this circuitry to operate properly, a negative supply is required.
This supply is provided by U18. See Figure 45 on page 21 for more details.
CONNECTOR
INPUT/OUTPUT
+5 V
Input
SIGNAL PRESENT
+ 5 V power
GND
Input
Ground connection from power supply
S/PDIF INPUT - J1
Input
Digital audio interface input via coax
S/PDIF INPUT - OPT1
Input
Digital audio interface input via optical
PCM INPUT - J37
Input
Input for master, serial, left/right clocks and serial data
AOUT1 - 6
Output
RCA line level analog outputs
Table 1. System Connections
JUMPER /
SWITCH
PURPOSE
POSITION
FUNCTION SELECTED
J46
Selects source of voltage for
the CS4361 VA supply
+3.3 V
*+5 V
Voltage source is a +3.3 V regulator
Voltage source is +5 V binding post
J17
Provides contact points to
measure VA current
-
Measure voltage across these nodes and divide result by 10 to
get current in amps
J45
Selects source of voltage for
the CS4361 VL supply
+3.3 V
*+5 V
Voltage source is a +3.3 V regulator
Voltage source is +5 V binding post
J20
Provides contact points to
measure VL current
-
Measure voltage across these nodes and divide result by 10 to
get current in Amps
J52
CS4361 Mode Select
*I2S
LJ
RJ16
RJ24
Sets the mode of the CS4361 by placing a shunt across the
desired setting
J63
Global Mute Enable
*shunted
open
Connects the CS4361 MUTEC pin to the mute circuitry
Disconnect for VA power-down current measurements
J53, J54
J55, J56
J57, J58
Mute Enable
*shunted
open
When shunted, the mute circuit is active
When open, the mute circuit is inactive
J24, J23
J39, J38
J43, J42
AC Load
shunted
*open
When shunted, a 3 kΩ AC load is added to the output
Leave open for normal operation
S1
Resets CS4361 and CS8416
S2
SDIN Control
DS672DB2
The CS8416 must be reset if switch S2 is changed
*All closed
All open
Connects SDIN1 to SDIN2 and SDIN3
SDIN1, 2, and 3 are discrete
5
CDB4361
JUMPER /
SWITCH
PURPOSE
POSITION
FUNCTION SELECTED
Sets clock source
1 (top)
EXT/8416
Sets clock source for CS4361 (*open = CS8416, closed = J37)
CS8416 Mode 0
2
RX_SF0
CS8416 Mode 1
3
RX_SF1
Sets MCLK ratio of CS8416
4 (bottom)
S3
Sets CS8416 serial data format
(SF1, SF0) 00 = LJ24
*01 = I2S
10 = RJ24
Selects 128x (open) or 256x (*closed) MCLK/LRCK ratio output
for CS8416
*Default Factory Settings
Table 2. CDB4361 Jumper Settings
6
DS672DB2
CDB4361
8. PERFORMANCE PLOTS
The plots in the following section were acheived using an Audio Precision System 2700 and a randomly chosen production CDB4361. In some cases the performance may be limited by the CDB4361. All measurements were taken
at room temp using the standard AP filter options (20 Hz to 22 kHz) with default board settings and nominal
datasheet voltages applied unless otherwise noted.
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
d
B
r
A
-50
-60
d
B
r
-70
-80
A
-90
-60
-70
-80
-90
-100
-100
-110
-110
-120
-120
-130
-130
-140
-140
-150
20
50
100
200
500
1k
2k
5k
10k
-150
20
20k
50
100
200
Hz
2k
5k
10k
20k
Figure 2. FFT (48 kHz, -60 dB)
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
A
1k
Hz
Figure 1. FFT (48 kHz, 0 dB)
d
B
r
500
-50
-60
-80
d
B
r
-90
A
-70
-100
-60
-70
-80
-90
-100
-110
-110
-120
-120
-130
-130
-140
-140
-150
20
50
100
200
500
1k
2k
5k
Hz
Figure 3. FFT (48 kHz, No Input)
DS672DB2
10k
20k
-150
20k
40k
60k
80k
100k
120k
Hz
Figure 4. FFT (48 kHz Out-of-Band, No Input)
7
CDB4361
d
B
r
A
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
-50
-60
-60
d
B
r
-70
-80
A
-90
-70
-80
-90
-100
-100
-110
-110
-120
-120
-130
-130
-140
-140
-150
20
50
100
200
500
1k
2k
5k
10k
-150
20k
2k
Hz
4k
A
8k
10k
12k
14k
16k
18k
20k
Figure 6. FFT (IMD 48 kHz)
+0
+0
-10
-10
-20
-20
-30
-30
-40
d
B
r
6k
Hz
Figure 5. FFT (48 kHz, -60 dB Wideband)
-40
d
B
r
-50
-60
A
-50
-60
-70
-70
-80
-80
-90
-90
-100
-100
-110
20
50
100
200
500
1k
2k
5k
10k
-110
-120
20k
-100
-80
Hz
-60
-40
-20
+0
dBFS
Figure 7. 48 kHz THD+N vs. Input Freq
Figure 8. 48 kHz THD+N vs. Level
+40
+5
+35
+4
+30
+25
+3
+20
+2
+15
+10
d
B
r
+5
A
-5
d
B
r
+0
A
-10
-15
+1
+0
-1
-2
-20
-3
-25
-30
-4
-35
-40
-120
-100
-80
-60
-40
-20
dBFS
Figure 9. 48 kHz, Fade-to-Noise Linearity
8
+0
-5
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 10. 48 kHz, Frequency Response
DS672DB2
CDB4361
+0
T TT
T
2
T
1.75
-10
1.5
-20
1.25
-30
1
-40
750m
-50
d
B
r
A
500m
-60
250m
-70
V
-80
0
-250m
-90
-500m
-100
-750m
-110
-1
-120
-1.25
-130
-1.5
-140
-1.75
-150
20
-2
50
100
200
500
1k
2k
5k
10k
20k
0
500u
1m
1.5m
2m
2.5m
3m
sec
Hz
Figure 11. 48 kHz, Crosstalk
Figure 12. 48 kHz, Impulse Response
Figure 13. Dynamic Range 48 kHz
DS672DB2
9
CDB4361
d
B
r
A
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
-50
-60
d
B
r
-70
-80
A
-90
-60
-70
-80
-90
-100
-100
-110
-110
-120
-120
-130
-130
-140
-150
20
-140
50
100
200
500
1k
2k
5k
10k
-150
20
20k
50
100
200
500
Hz
Figure 14. FFT (96 kHz, 0 dB)
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-80
A
-90
-80
-90
-100
-110
-110
-120
-120
-130
-130
-140
-140
50
100
200
500
1k
2k
5k
10k
-150
20k
Figure 16. FFT (96 kHz, No Input)
40k
60k
80k
100k
120k
Figure 17. FFT (96 kHz Out-of-Band, No Input)
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
-50
-60
-60
d
B
r
-70
-80
A
-90
-100
-70
-80
-90
-100
-110
-110
-120
-120
-130
-130
-140
-150
20
20k
Hz
Hz
-140
50
100
200
500
1k
Hz
2k
5k
10k
20k
Figure 18. FFT (96 kHz, -60 dB Wideband)
10
20k
-70
-100
-150
20
A
10k
-60
d
B
r
-70
d
B
r
5k
-50
-60
A
2k
Figure 15. FFT (96 kHz, -60 dB)
-50
d
B
r
1k
Hz
40k
-150
2k
4k
6k
8k
10k
12k
14k
16k
18k
20k
Figure 19. FFTHz(IMD 96 kHz)
DS672DB2
CDB4361
+0
+0
-10
-10
-20
-20
-30
-30
-40
d
B
r
A
-40
d
B
r
-50
-60
A
-50
-60
-70
-70
-80
-80
-90
-90
-100
-110
20
-100
50
100
200
500
1k
2k
5k
10k
-110
-120
20k
Hz
-100
-80
-60
-40
-20
+0
dBFS
Figure 20. 96 kHz, THD+N vs. Input Freq
Figure 21. 96 kHz, THD+N vs. Level
+5
+40
+35
+4
+30
+25
+3
+20
+2
+15
+10
d
B
r
+5
A
-5
d
B
r
+0
A
-10
-15
+1
+0
-1
-2
-20
-25
-3
-30
-4
-35
-40
-120
-100
-80
-60
-40
-20
-5
20
+0
dBFS
T TT T T
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 22. 96 kHz, Fade-to-Noise Linearity
+0
50
Figure 23. 96 kHz, Frequency Response
2
T
1.75
-10
1.5
-20
1.25
-30
1
-40
750m
-50
500m
d
B
r
A
-60
250m
-70
V
-80
0
-250m
-90
-500m
-100
-750m
-110
-1
-120
-1.25
-130
-1.5
-140
-1.75
-150
20
-2
50
100
200
500
1k
2k
Hz
Figure 24. 96 kHz, Crosstalk
DS672DB2
5k
10k
20k
0
250u
500u
750u
1m
1.25m
1.5m
sec
Figure 25. 96 kHz, Impulse Response
11
CDB4361
Figure 26. Dynamic Range 96 kHz
d
B
r
A
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
-50
-60
d
B
r
-70
-80
A
-90
-70
-80
-90
-100
-100
-110
-110
-120
-120
-130
-130
-140
-150
20
-140
50
100
200
500
1k
2k
5k
Hz
Figure 27. FFT (192 kHz, 0 dB)
12
-60
10k
20k
-150
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 28. FFT (192 kHz, -60 dB)
DS672DB2
CDB4361
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
d
B
r
A
-50
-60
d
B
r
-70
-80
-90
A
-100
-80
-90
-110
-120
-130
-120
-140
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
-150
Hz
+0
+0
-10
-20
-20
-30
-30
-40
-40
-50
-50
-60
-80
80k
100k
120k
A
-90
-70
-80
-90
-100
-100
-110
-110
-120
-120
-130
-130
-140
50
100
200
500
1k
2k
5k
10k
20k
50k
-150
90k
Hz
+0
+0
-10
-20
-20
-30
-30
-40
6k
8k
10k
12k
14k
16k
18k
20k
-40
d
B
r
-50
-60
A
-50
-60
-70
-70
-80
-80
-90
-90
-100
-100
50
100
200
500
1k
2k
5k
10k
Hz
Figure 33. 192 kHz, THD+N vs. Input Freq
DS672DB2
4k
Figure 32. FFT (IMD 192 kHz)
-10
-110
20
2k
Hz
Figure 31. FFT (192 kHz, -60 dB Wideband)
A
60k
-60
d
B
r
-70
-140
d
B
r
40k
Figure 30. FFT (192 kHz Out-of-Band, No Input)
-10
-150
20
20k
Hz
Figure 29. FFT (192 kHz, No Input)
A
-70
-100
-110
d
B
r
-60
20k
-110
-120
-100
-80
-60
-40
-20
+0
dBFS
Figure 34. 192 kHz, THD+N vs. Level
13
CDB4361
+5
+40
+35
+4
+30
+25
+3
+20
+2
+15
+10
d
B
r
+5
+0
d
B
r
A
-5
A
-10
-15
+1
+0
-1
-2
-20
-3
-25
-30
-4
-35
-40
-120
-100
-80
-60
-40
-20
-5
20
+0
50
100
dBFS
1.5
-30
1.25
10k
20k
1
750m
-50
500m
-60
250m
-70
V
-80
0
-250m
-90
-500m
-100
-750m
-110
-1
-120
-1.25
-130
-1.5
-140
-1.75
-2
50
100
200
500
1k
2k
Hz
Figure 37. 192 kHz, Crosstalk
14
5k
1.75
-20
-150
20
2k
2
T
-40
A
1k
Figure 36. 192 kHz, Frequency Response
-10
d
B
r
500
Hz
Figure 35. 192 kHz, Fade-to-Noise Linearity
+0
200
5k
10k
20k
0
200u
400u
600u
sec
Figure 38. 192 kHz, Impulse Response
DS672DB2
CDB4361
Figure 39. Dynamic Range 192 kHz
9. ERRATA
None at this time.
DS672DB2
15
16
Power
Figure 46 on page 22
PCM HEADER
Figure 43
on page 19
Single-Ended
Analog Outputs
PCM CLOCKS/DATA
AOUT1-6
PCM mux
PCM CLOCKS/DATA
PCM CLOCKS/DATA
CS4361
Figure 44 on page 20
Figure 41 on page 17
PCM source select
Figure 42
on page 18
CS8416 clock setting
CS8416
S/PDIF
Input
Mute Circuitry
Figure 45 on page 21
Hardware Control
Switches
Figure 42 on page 18
CDB4361
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Figure 40. System Block Diagram and Signal Flow
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Figure 41. CS4361
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Figure 42. CS8416 S/PDIF Input and Clock Control
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Figure 43. PCM Input Header and MUX
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Figure 44. Passive Outputs
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Figure 45. Mute Circuitry
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Figure 46. Power Supply Connections
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Figure 47. Silkscreen Top
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Figure 48. Top Side
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Figure 49. Bottom Side
CDB4361
10.REVISION HISTORY
Release
DB1
DB2
Changes
Initial Release
Added Performance Plots
Contacting Cirrus Logic Support
For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find the one nearest you, go to www.cirrus.com.
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
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does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE
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Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks
or service marks of their respective owners.
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