RT9205/A Preliminary Dual Regulators - Synchronous Buck PWM DC-DC and Linear Controller General Description Features The RT9205/A is a dual-output power controllers designed for high performance graphics cards and personal computers. The IC integrates a synchronous buck controller, a linear controller and protection functions into a small 14-pin package. l The RT9205/A uses an internal compensated voltage mode PWM control for simplying design. An internal 0.8V reference allows the output voltage to be precisely regulated to meet low output voltage requirement. A fixed 300kHz oscillation frequency reduces the component size for saving board area. l l l l l l l l l l l The RT9205/A also features over voltage protection (OVP) and under voltage lock-out (UVLO). Ordering Information Applications l l RT9205/A l Package Type S : SOP-14 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) UVP : Hiccup Node UVP : Latch Mode Note : Operates at 5V 0.8V Internal Reference Drives Two N-MOSFET Voltage Mode PWM Control Fast Transient Response Fixed 300kHz Oscillator Frequency Dynamic 0 to 100% Duty Cycle Internal PWM Loop Compensation Internal Soft-Start Adaptive Non-Overlapping Gate Driver Over-Voltage Protection Uses Lower MOSFET RoHS Compliant and 100% Lead (Pb)-Free l l l l l l PC Motherboard Cable Modems, Set-Top-Box, and XDSL Modems DSP and Core Communications Processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V Input DC-DC Regulators Low Voltage Distributed Power Supplies Graphic Cards Pin Configurations RichTek Pb-free and Green products are : }RoHS compliant and compatible with the current require- (TOP VIEW) ments of IPC/JEDEC J-STD-020. }Suitable for use in SnPb or Pb-free soldering processes. }100%matte tin (Sn) plating. LGATE PGND GND VCC DRV FBL NC 2 3 4 5 6 7 14 13 12 11 10 9 8 UGATE BOOT NC NC NC FB NC SOP-14 DS9205/A-08 March 2007 www.richtek.com 1 www.richtek.com 2 10nF + 120 R2<1K 2 3 9 1 14 13 200 0.1uF 1N5819 10nF 200 Phase 1uF VOUT1 = 0.8V*(1+R3/R4) D2 5 D1 7 D2 6 PHKD6N02LT 8 S1 D1 2 G1 3 S2 4 G2 1 Phas e 1uH Be Careful during Layout 5V 5uH 680uF 1uF 680uF LESR VOUT1 1.6V Pull FB trace out after COUT 680uF LESR + 470uF LGATE UGATE FB RT9205/A PGND GND FBL DRV 1uF VCC BOOT 4 5V + 1uF 390 5 0.8V 6 100uF + + 3.4V VOUT2 = 0.8V*(1+R1/R2) VOUT2 2SD1802 5V RT9205/A Preliminary Typical Application Circuit Figure 1. RT9205/A powered form 5V DS9205/A-08 March 2007 DS9205/A-08 March 2007 470uF + 1uF 10nF 200 R2<1K PGND FB GND 3 RT9205/A LGATE 9 1 14 200 10nF 200 PHB108NQ03LT PHB66NQ03LT 1uH 1uF 1000uF V OUT1 = 0.8V*(1+R3/R4) Phase Be Careful during Layout 1000uF 5uH 1uF 1nF LESR 1nF LESR 1.7V V OUT1 Pull FB trace out after C OUT 1nF LESR + 430 FBL UGATE 13 BOOT 0.1uF 5V + 0.8V 6 DRV 4 VCC 10 + Suggest use Transistor 5 1uF 0 12V + 2.5V V OUT2 = 0.8V*(1+R1/R2) V OUT2 100uF + + 2SD5706 3.3V 5V Preliminary RT9205/A Figure 2. RT9205/A powered from 12V www.richtek.com 3 RT9205/A Preliminary + MU COUT 1000uF CVCC 1uF G CBOOT CIN1 1uF C IN2 470uF ML BOOT VCC S + GND D L 5uH D 0.1uF RT9205/A G S GND Return Layout Placement Layout Notes 1. Put C1 & C2 to be near the MU drain and ML source nodes. 2. Put RT9205/A to be near the COUT 3. Put CBOOT as close as to BOOT pin 4. Put CVCC as close as to VCC pin Function Block Diagram 6.0V Regulation VCC VCC LDO Power on Reset + + DRV BOOT - FBL Soft Start 0.8 Reference - UVP + 1V - OVP UGATE + 0.5V +UVP 0.8V FB + - SS Error Amplifier Control Logic + +PWM - VCC LGATE GND www.richtek.com 4 300kHz Oscillator DS9205/A-08 March 2007 Preliminary RT9205/A Functional Pin Description LGATE (Pin 1) BOOT (Pin 13) Connect the LGATE pin to the gate of lower MOSFET. This pin provides the gate drive for the lower MOSFET. This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage that is suitable for driving a logic-level N-MOSFET when operating at a single 5V power supply. This pin also could be powered from ATX 12V, in this situation, an internal 6.0V regulator will supply to VCC pin for generating bias required inside the IC. PGND/GND (Pin 2, 3) Signal and power ground for the IC. All voltage levels are measured with respect to this pin. VCC (Pin 4) This is the main bias supply for the RT9205/A. This pin also provides the gate bias charge for the gate of lower MOSFET. The voltage at this pin is monitored for ensuring a proper power-on reset (POR). This pin is also the out of an internal 6.0V regulator that powered from the BOOT pin when the BOOT pin is directly powered from ATX 12V. UGATE (Pin 14) Connect the UGATE pin to the gate of upper MOSFET. This pin provides the gate drive for the upper MOSFET. NC (Pin 7,8,10,11,12) No Connection. DRV (Pin 5) This pin is the output of a linear controller. It should be connected to the base of an external bypass NPN transistor or the gate of a N-MOSFET to form a linear low dropout regulator. FBL (Pin 6) This pin is connected to the output resistor-divider of an external power transistor or a N-MOSFET based low dropout regulator for regulating and monitoring the output voltage. This pin is also connected to the protection monitor and the invertering input of error amplifier of internal linear regulator inside the IC. FB (Pin 9) This pin is connected to the PWM converter's output-divider for regulating and monitoring the output voltage of buck converter. This pin also connects to the protection monitor and the inverting input of internal PWM error amplifier inside the IC. DS9205/A-08 March 2007 www.richtek.com 5 RT9205/A Preliminary Absolute Maximum Ratings l l l l l l l l Supply Voltage VCC ------------------------------------------------------------------------------------------------ 7V BOOT & UGATE to GND ------------------------------------------------------------------------------------------- 19V Input, Output or I/O Voltage --------------------------------------------------------------------------------------- GND-0.3V to 7V Package Thermal Resistance SOP-14, θJA ----------------------------------------------------------------------------------------------------------------------------------------------------- 160° C/W Ambient Temperature Range -------------------------------------------------------------------------------------- 0° C to +70°C Junction Temperature Range -------------------------------------------------------------------------------------- −40° C to +125°C Storage Temperature Range --------------------------------------------------------------------------------------- −65° C to +150°C Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------- 260°C CAUTION: Stresses beyond the ratings specified in “ Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Characteristics (VCC = 5V, TA = 25° C, Unless otherwise specified.) Parameter Symbol Test Conditions Min Typ Max Units VCC Supply Current Nominal Supply Current ICC UGATE, LGATE open -- 3 -- mA VCC Regulated Voltage V CC VBOOT = 12V 5 6 7 V 3.8 4.1 4.4 V -- 0.5 -- V 0.784 0.8 0.816 V 250 300 350 kHz -- 1.75 -- VP-P 32 35 38 dB Power-On Reset Rising VCC Threshold VCC Threshold Hysteresis Reference Reference Voltage VFB Both PWM and linear regulator Oscillator Free Running Frequency Ramp Amplitude ∆ VOSC PWM Error Amplifier DC gain PWM Controller Gate Driver Upper Drive Source RUGATE BOOT= 12V BOOT-VUGATE = 1V -- 7.5 11 Ω Upper Drive Sink RUGATE VUGATE = 1V -- 5 8 Ω Lower Drive Source RLGATE -- 3.5 6 Ω Lower Drive Sink RLGATE VCC - VLGATE = 1V, VLGATE = 1V -- 2 5 Ω VDRV = 2V 100 -- -- mA FB Over-Voltage Trip FB Rising 0.9 1 -- V FB & FBL Under-Voltage Trip FB & FBL Falling -- 0.5 0.65 V -- 2.5 -- ms Linear Regulator DRV Driver Source Protection Soft-Start Interval www.richtek.com 6 DS9205/A-08 March 2007 RT9205/A Preliminary Typical Operating Characteristics Dead Time Dead Time VCC = 5V VCC = 5V UGATE UGATE LGATE LGATE Time (50ns/Div) Time (50ns/Div) Power On Power Off VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V VCC VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V VCC VOUT1 VOUT1 VOUT2 VOUT2 Time (2.5ms/Div) Time (50ms/Div) Load Transient Load Transient UGATE UGATE VCC = 5V VOUT = 2.2V COUT = 3000uF VOUT VCC = 5V VOUT = 2.2V COUT = 3000uF Time (5us/Div) DS9205/A-08 March 2007 VOUT Time (5us/Div) www.richtek.com 7 RT9205/A Preliminary Short Hiccup Short Hiccup (Latch Mode) VCC = 5V VOUT = 2.2V VCC = 5V VOUT = 2.2V VOUT VOUT UGATE UGATE RT9205 RT9205A Time (2ms/Div) Time (2ms/Div) Reference vs. Temperature Bootstrap Wava Form 0.803 VCC = 5V, VOUT = 2.2V 0.802 0.801 Reference (V) UGATE LGATE 0.800 0.799 0.798 PHASE 0.797 0.796 -50 Time (1us/Div) 0 50 100 150 Temperature (°C) POR (Rising/Falling) vs. Temperature 4.3 50 4.2 45 4.1 POR (V) I OCSET (uA) IOCSET vs. Temperature 55 40 35 4.0 3.9 30 3.8 25 3.7 20 Rising Falling 3.6 -40 -10 20 50 80 Temperature (°C) www.richtek.com 8 110 140 -50 0 50 100 150 Temperature(°C) DS9205/A-08 March 2007 Preliminary RT9205/A Oscillator Frequency vs. Temperature 315 Frequency (kHz) A 310 305 300 295 290 285 280 275 270 -50 0 50 100 150 Temperature (°C) DS9205/A-08 March 2007 www.richtek.com 9 RT9205/A Preliminary Application Information VCC R BOOT 6.0V Regulation C 1uF 12V 10 UGATE 5V + The RT9205/A operates at either single 5V power supply with a bootstrap UGATE driver or a 5V/12V dual-power supply form the ATX SMPS. The dual- power supply is recommended for high current applications, the RT9205/ A can deliver higher gate driving current while operating with ATX SMPS based on a dual-power supply. VCC The Bootstrap Operation RT9205/A Figure 4. Dual Power Supply Operation Power On Reset R1 VCC UGATE 5V 0.1uF + C2 1uF D1 BOOT LGATE C2 1uF In a single power supply system, the UGATE driver of RT9205/A is powered by an external bootstrap circuit, as shown in the Figure 3. The boot capacitor, CBOOT , generates a floating reference at the PHASE pin. Typically a 0.1µF CBOOT is enough for most of MOSFETs used with the RT9205/A. The voltage drop between BOOT and PHASE is refreshed to a voltage of VCC − diode drop (VD) while the lower MOSFET turning on. The Power-On Reset (POR) monitors the supply voltage (normal +5V) at the VCC pin and the input voltage at the OCSET pin. The VCC POR level is set to 4.1V with 0.5V hysteresis and the normal level at OCSET pin is set to 1.5V (see over-current protection). The POR function initiates soft-start operation after all supply voltages exceed their POR thresholds. PHASE Soft Start VCC LGATE RT9205/A Figure 3. Single 5V power Supply Operation A built-in soft-start is used to prevent surge current from power supply input during powering on. The soft-start voltage is controlled by an internal digital counter. It slows down and clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver. The typical soft-start duration is 2.5ms. Under Voltage and Over Voltage Protection Dual Power Operation The RT9205/A was designed to supply a regulated 6.0V at VCC pin automatically when BOOT pin is powered by a 12V. In a system with ATX 5V/12V power supply, the RT9205/A is ideal for higher current applications due to the higher gate driving capability, VUGATE = 12V and VLGATE = 6.0V. A RC (10Ω/1µF) filter is also recommended at BOOT pin to prevent the ringing induced from fast power-on, as shown in Figure 4. www.richtek.com 10 The voltage presents at FB pin is monitored and protected against OC (over current), UV (under voltage), and OV (ov er v oltage). The UV threshold is 0.56V and OV-threshold is 1.0V. Both UV and OV detection are with 30µs delay after triggered. When OC or UV trigged, a hiccup re-start sequence will be initialized, as shown in Figure 5. For RT9205, only 3 times of trigger are allowed before latching off. But for RT9205A, UVP will be kept in hiccup mode. Hiccup is disabled during soft-start interval. DS9205/A-08 March 2007 RT9205/A Preliminary L Q COUNT = 2 SS Internal COUNT = 1 COUNT = 3 4V VI 2V D R C VO 0V INDUCTOR CURRENT OVERLOAD C.C.M. APPLIED TS 0A TON T0 T1 VI - VO T3 T2 TIME TOFF VL Figure 5 - VO Inductor Selection iL uQ The RT9205/A was designed for VIN = 5V, step-down application mainly. Figure 6 shows the typical topology and waveforms of step-down converter. IL = IO uIL The ripple current of inductor can be calculated as follows: ILRIPPLE = (5V - VOUT) L iQ × TON IQ Because operation frequency is fixed at 300kHz, TON = 3.33 × VOUT iD 5V ID The VOUT ripple is VOUT RIPPLE = ILRIPPLE × ESR Figure 6 ESR is the equivalent series resistor of output capacitor Table 1 shows the ripple voltage of VOUT at VIN = 5V Table 1 VOUT Inductor 3.3V 2.5V 1.5V 2µH 5µH 2µH 5µH 2µH 5µH 1000µF (ESR=53mΩ) 100mV 40mV 110mV 44mV 93mV 37mV 1500µF (ESR=33mΩ) 62mV 25mV 68mV 28mV 58mV 23mV 3000µF (ESR=21mΩ) 40mV 16mV 43mV *Refer to Sanyo low ESR series (CE, DX, PX.....) 18mV 37mV 15mV The suggested L and C are as follows: 2µH with ≥ 1500µF COUT 5µH with ≥ 1000µF COUT DS9205/A-08 March 2007 www.richtek.com 11 RT9205/A Preliminary Input / Output Capacitor The output capacitors are necessary for filtering output and stabilizing the close loop (see the PWM loop stability). For powering advanced high-speed processors, it is required to meet fast load transient requirement. Also high ESR usually induces ripple that may trigger UV or OV protections. So High frequency capacitors with low ESR/ ESL capacitors are recommended here. Linear Regulator Driver The linear controller of RT9205/A was designed to drive an external bipolar NPN transistor or a N-MOSFET. For a NChannel MOSFET, normally DRV need to provide minimum VOUT2+VT+gate-drive voltage to keep VOUT2 as the set voltage. When driving MOSFET operating at a 5V power supply, the gate-drive will be limited at 5V. At this situation, as shown in Figure 7 a MOSFET with low VT threshold (VT = 1V) and set Vout2 below 2.5V are suggested. In VBOOT = 12V operation condition, as Figure 8 shown, VCC is regulated higher than 6V, which providing higher gatedrive capability for driving the MOSFET, VOUT2 can be set as VOUT2 ≤ 3.3V. Suggest Low VT MOSFET Max. 5V VOUT2 < 3.3V DRV VBOOT = 12V 6V VCC = 5V RT9205/A R4<1K R4<1K The RT9205/A is a voltage mode buck controller designed for 5V step-down applications. The gain of error amplifier is fixed at 35dB for simplifying design. The output amplitude of ramp oscillator is 1.6V, the loop gain and loop pole/zero are calculated as follows : DC loop gain GA = 35 dB × LC filter pole PO = 5 × 0.8 1.75 VOUT 1 2π LC Error Amp pole PA = 300kHz ESR zero ZO = 1 2π ESR × C The RT9205/A Bode plot is as shown in Figure 9. It is stable in most of application conditions. VOUT = 3.3V + R4 VCC R4 VCC PWM Loop Stability 40 FBL FBL Figure 8 R3 BOOT R3 BOOT RT9205/A VOUT2 < 2.5V DRV Suggest Low VT MOSFET Max. 6V + High frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance to the PCB trace, as it could eliminate the performance from utilizing these low inductance components. Consult with the manuf acturer of the load on specific decoupling requirements. 30 COUT = 1500uF(33mΩ) L = 2uH VOUT = 1.5V PO = 2.9kHz VOUT = 2.5V ZO = 3.2kHz VOUT = 3.3V 20 Loop Gain 10 Figure 7 100 1k 10k 100k 1M Figure 9 www.richtek.com 12 DS9205/A-08 March 2007 RT9205/A Preliminary Reference Voltage VIN L VOUT + Because RT9205/A uses a low 35dB gain error amplifier, as shown in Figure 10. The voltage regulation is dependent on VIN and VOUT settings. The FB reference voltage of 0.8V were trimmed at VIN = 5V and VOUT = 2.5V. In a fixed VIN = 5V application, the FB reference voltage vs. VOUT voltage can be calculated as Figure 11. COUT C1 R1 RT9205/A FB I3 FB + I2 - 1K VOUT = VFB × (1 + EA + + RAMP PWM Layout Considerations 1.75V Figure 10 0.82 VIN = 5V FB (V) 0.81 0.80 VFB = 0.8 - ( 0.78 Duty - 50 ) × 6.25mV 100 10 20 30 R2 <1K Figure 12 PWM - 0.79 ) R2 56K REP 0.8V R1 40 50 60 Duty (%) 70 80 90 Figure 11 Feedback Divider The reference of RT9205/A is 0.8V. The output voltage can be set using a resistor-divider as shown in Figure 12. Put the R1 and R2 as close as possible to FB pin. R2 value should be less than 1 kΩ to avoid noise coupling issue. The C1 capacitor is a speed-up capacitor for reducing output ripple to meet with the requirement of fast transient load. Typically, value between 1nF and 0.1µF is enough for C1. DS9205/A-08 March 2007 MOSFETs switch very fast in efficiency. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency and radiate noise, that results in over-voltage stress on devices. Careful the layout for component placement layout and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the lower MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Care with component selections, layout of the critical components, and use shorter and wider PCB traces that help in minimizing the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using the RT9205/A. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. www.richtek.com 13 RT9205/A Preliminary The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. Figure 13 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT represent numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these islands and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents. IQ1 IL VOUT 5V IQ2 + + + Q1 LOAD Q2 GND GND LGATE VCC RT9205/A UGATE FB Figure 13 www.richtek.com 14 DS9205/A-08 March 2007 RT9205/A Preliminary Outline Dimension H A M J B F C I D Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 8.534 8.738 0.336 0.344 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 14–Lead SOP Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] DS9205/A-08 March 2007 www.richtek.com 15