PHILIPS PCA9516A

INTEGRATED CIRCUITS
PCA9516A
5-channel I2C hub
Product data sheet
Supersedes data of 2004 May 28
Philips
Semiconductors
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
DESCRIPTION
The PCA9516A is a CMOS integrated circuit intended for application
in I2C and SMBus systems.
While retaining all the operating modes and features of the I2C
system, it permits extension of the I2C-bus by buffering both the data
(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.
The I2C-bus capacitance limit of 400 pF restricts the number of
devices and bus length. Using the PCA9516A enables the system
designer to divide the bus into five segments off of a hub where any
segment to segment transition sees only one repeater delay.
FEATURES
• 5 channel, bi-directional buffer
• I2C-bus and SMBus compatible
• Active HIGH individual repeater enable input
• Open-drain input/outputs
• Lock-up free operation
• Supports arbitration and clock stretching across the repeater
• Accommodates standard mode and fast mode I2C devices and
It can also be used to run different buses at 5 V and 3.3 V or
400 kHz and 100 kHz buses where the 100 kHz bus is isolated
when 400 kHz operation of the other bus is required.
Two or more PCA9516As cannot be put in series. The
PCA9516A design does not allow this configuration. Since there is
no direction pin, slightly different “legal” low voltage levels are used
to avoid lock-up conditions between the input and the output of each
repeater in the hub. A “regular LOW” applied at the input of a
PCA9516A will be propagated as a “buffered LOW” with a slightly
higher value on all the enabled outputs. When this “buffered LOW” is
applied to another PCA9515A, PCA9516A, or PCA9518 in series,
the second PCA9515A, PCA9516A, or PCA9518 will not recognize
it as a “regular LOW” and will not propagate it as a “buffered LOW”
again. The PCA9510/9511/9513/9514 and PCA9512 cannot be used
in series with the PCA9515A, PCA9516A, or PCA9518 but can be
used in series with themselves since they use shifting instead of
static offsets to avoid lock-up conditions.
multiple masters
• Powered-off high impedance I2C pins
• Operating supply voltage range of 2.3 V to 3.6 V
• 5.5 V tolerant I2C and enable pins
• 0 kHz to 400 kHz clock frequency1
• ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115, and 1000 V CDM per
JESD22-C101.
• Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA.
• Package offerings: SO16 and TSSOP16
ORDERING INFORMATION
TEMPERATURE RANGE
ORDER CODE
TOPSIDE MARK
DRAWING NUMBER
16-pin plastic SO
DESCRIPTION
–40 °C to +85 °C
PCA9516AD
PCA9516AD
SOT109-1
16-pin plastic TSSOP
–40 °C to +85 °C
PCA9516APW
PA9516A
SOT403-1
Standard packing quantities and other packaging data is available at www.standardproducts.philips.com/packaging.
1.
The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.
2004 Sep 29
2
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
PIN CONFIGURATION
PIN DESCRIPTION
PIN
FUNCTION
1
16
VCC
1
SCL0
Serial clock bus 0
SDA0
2
15
EN4
2
SDA0
Serial data bus 0
SCL1
3
14
SDA4
3
SCL1
Serial clock bus 1
SDA1
4
13
SCL4
4
SDA1
Serial data bus 1
EN1
5
12
EN3
5
EN1
Active-HIGH Bus 1 enable Input
6
SCL2
Serial clock bus 2
7
SDA2
Serial data bus 2
8
GND
Supply ground
SCL2
6
11
SDA3
SDA2
7
10
SCL3
GND
8
9
EN2
SU01395
Figure 1. Pin configuration
2004 Sep 29
SYMBOL
SCL0
3
9
EN2
Active-HIGH Bus 2 enable Input
10
SCL3
Serial clock bus 3
11
SDA3
Serial data bus 3
12
EN3
Active-HIGH Bus 3 enable Input
13
SCL4
Serial clock bus 4
14
SDA4
Serial data bus 4
15
EN4
Active-HIGH Bus 4 enable Input
16
VCC
Supply power
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
BLOCK DIAGRAM
VCC
PCA9516A
SCL0
BUFFER
SCL1
BUFFER
SCL2
BUFFER
SDA0
BUFFER
SDA1
BUFFER
SDA2
BUFFER
BUFFER
SCL4
BUFFER
SCL3
BUFFER
SDA4
BUFFER
SDA3
HUB
LOGIC
HUB
LOGIC
EN1
EN4
EN2
EN3
SW02248
GND
Figure 2. Block Diagram: PCA9516A
A more detailed view of Figure 2 buffer is shown in Figure 3.
To output
Data
z
In
Inc
Enable
SW00712
Figure 3.
The output pull-down of each internal buffer is set for approximately
0.5 V, while the input threshold of each internal buffer is set about
0.07 V lower, when the output is internally driven LOW. This
prevents a lock-up condition from occurring.
2004 Sep 29
4
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
SDA0/SCL0. If the SDA0/SCL0 port is not used, the pins need to be
pulled to VCC through appropriately sized resistors.
FUNCTIONAL DESCRIPTION
The PCA9516A is a five way hub repeater, which enables I2C and
similar bus systems to be expanded with only one repeater delay
and no functional degradation of system performance.
The PCA9516A is 5.5 V tolerant so it does not require any additional
circuitry to translate between the different bus voltages.
The PCA9516A contains five bi-directional, open drain buffers
specifically designed to support the standard low-level-contention
arbitration of the I2C-bus. Except during arbitration or clock
stretching, the PCA9516A acts like five pairs of non-inverting, open
drain buffers, one for SDA and one for SCL.
When one side of the PCA9516A is pulled LOW by a device on the
I2C-bus, a CMOS hysteresis type input detects the falling edge and
causes an internal driver on the other side to turn on, thus causing
the other side to also go LOW. The side driven LOW by the
PCA9516A will typically be at VOL = 0.5 V.
Enable
The enable pins EN1 through EN4 are active HIGH and have
internal pull-up resistors. Each enable pin ENn controls its
associated SDAn and SCLn ports. When LOW, the ENn pin blocks
the inputs from SDAn and SCLn as well as disabling the output
drivers on the SDAn and SCLn pins. The enable pins should only
change state when both the global bus and the local port are in an
idle state to prevent system failures.
3.3 V
SDA
The active HIGH enable pins allow the use of open drain drivers
which can be wire-ORed to create a distributed enable where either
centralized control signal (master) or spoke signal (submaster) can
enable the channel when it is idle.
5V
SDA0
SDA1
SDA
SCL0
SCL1
SCL
SLAVE 1
SCL
BUS
MASTER
400 kHz
3.3 V
EN1
I2C Systems
EN2
As with the standard I2C system, pull-up resistors are required to
provide the logic HIGH levels on the Buffered bus. (Standard
open-collector configuration of the I2C-bus). The size of these
pull-up resistors depends on the system, but each side of the
repeater must have a pull-up resistor. This part is designed to work
with standard mode and fast mode I2C devices in addition to SMBus
devices. Standard mode I2C devices only specify 3 mA output drive,
this limits the termination current to 3 mA in a generic I2C system
where standard mode devices and multiple masters are possible.
Please see Application Note AN255 “I 2C & SMBus Repeaters, Hubs
and Expanders” for additional information on sizing resistors and
precautions when using more than one PCA9515A/PCA9516A in a
system or using the PCA9515A/16A in conjunction with the P82B96.
EN3
EN4
400 kHz
SDA2
SDA
SCL2
SCL
SLAVE 2
400 kHz
5V
PCA9516A
SDA3
SDA
SCL3
SCL
SLAVE 3
100 kHz
APPLICATION INFORMATION
A typical application is shown in Figure 4. In this example, the
system master is running on a 3.3 V I2C-bus while the slave is
connected to a 5 V bus. All buses run at 100 kHz unless slave 3 is
isolated and then the master bus and slave 1 and 2 can run at
400 kHz.
3.3 V or 5 V
Any segment of the hub can talk to any other segment of the hub.
Bus masters and slaves can be located on all five segments with
400 pF load allowed on each segment.
SDA4
SCL4
SW02249
Unused ports should be isolated by holding the enable pin to GND
and/or pulling SDA/SCL pins to VCC through appropriately sized
resistors. The primary bus master is normally connected to
2004 Sep 29
Figure 4. Typical application
5
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
On the Bus 1 side of the PCA9516A, the clock and data lines would
have a positive offset from ground equal to the VOL of the
PCA9516A. After the 8th clock pulse, the data line will be pulled to
the VOL of the slave device that is very close to ground in our
example.
In order to illustrate what would be seen in a typical application,
refer to Figures 5 and 6. If the bus master in Figure 4 were to write
to the slave through the PCA9516A, we would see the waveform
shown in Figure 5 on Bus 0. This looks like a normal I2C
transmission until the falling edge of the 8th clock pulse. At that
point, the master releases the data line (SDA) while the slave pulls it
LOW through the PCA9516A. Because the VOL of the PCA9516A is
typically around 0.5 V, a step in the SDA will be seen. After the
master has transmitted the 9th clock pulse, the slave releases the
data line.
It is important to note that any arbitration or clock stretching events
on Bus 1 require that the VOL of the devices on Bus 1 be 70 mV
below the VOL of the PCA9516A (see VOL – Vilc in the DC
Characteristics section) to be recognized by the PCA9516A and
then transmitted to Bus 0.
2 V/DIV
9th CLOCK PULSE
VOL OF PCA9516A
VOL OF MASTER
SW02250
Figure 5. Bus 0 waveform
2 V/DIV
9th CLOCK PULSE
VOL OF PCA9516A
VOL OF SLAVE
SW02251
Figure 6. Bus 1 waveform
2004 Sep 29
6
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
ABSOLUTE MAXIMUM RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134).
Voltages with respect to pin GND.
LIMITS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
V
VCC to GND
Supply voltage range VCC
–0.5
+7
Vbus
Voltage range I2C-bus, SCL or SDA
–0.5
+7
V
I
DC current (any pin)
—
50
mA
Ptot
Power dissipation
—
300
mW
Tstg
Storage temperature range
–55
+125
°C
Tamb
Operating ambient temperature range
–40
+85
°C
DC ELECTRICAL CHARACTERISTICS
VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = –40 °C to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
MIN.
TYP.2
MAX.
UNIT
Supplies
VCC
DC supply voltage
3.0
—
3.6
V
ICCH
Quiescent supply current,
both channels HIGH
VCC = 3.6 V;
SDAn = SCLn = VCC
—
2.1
5
mA
ICCL
Quiescent supply current,
both channels LOW
VCC = 3.6 V;
one SDA and one SCL = GND,
other SDA and SCL open
—
4.7
10
mA
ICCLc
Quiescent supply current in contention
VCC = 3.6 V;
SDAn = SCLn = GND
—
4.0
10
mA
Input SCL; input/output SDA
VIH
HIGH-level input voltage
0.7 VCC
—
5.5
V
VIL
LOW-level input voltage (Note 1)
–0.5
—
0.3 VCC
V
VILc
LOW-level input voltage contention
(Note 1)
–0.5
—
0.4
V
VIK
Input clamp voltage
II = –18 mA
—
—
–1.2
V
ILI
Input leakage current
VI = 3.6 V
–1
—
1
µA
IIL
Input current LOW, SDA, SCL
VI = 0.2 V, SDA, SCL
µA
LOW-level output voltage
IOL = 0 or 6 mA
LOW-level input voltage below
output LOW-level voltage
Input capacitance
VOL
VOL–VILc
CI
—
—
5
0.47
0.52
0.6
V
Guaranteed by design
—
—
70
mV
VI = 3 V or 0 V
—
6
10
pF
–0.5
—
0.8
V
Enable 1–4
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
IIL
Input current LOW, EN1–EN4
ILI
Input leakage current
CI
Input capacitance
VI = 0.2 V, EN1–EN4
VI = 3.0 V or 0 V
2.0
—
5.5
V
—
–12
–30
µA
–1
—
1
µA
—
6
7
pF
NOTES:
1. VIL specification is for the first LOW level seen by the SDAx/SCLx lines. VILc is for the second and subsequent LOW levels seen by the
SDAx/SCLx lines.
2. Typical value taken at 3.3 V and 25 °C.
3. For operation between published voltage ranges, refer to worst case parameter in both ranges.
2004 Sep 29
7
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
DC ELECTRICAL CHARACTERISTICS
VCC = 2.3 V to 2.7 V; GND = 0 V; Tamb = –40 °C to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
MIN.
TYP.2
MAX.
UNIT
Supplies
VCC
DC supply voltage
2.3
—
2.7
V
ICCH
Quiescent supply current,
both channels HIGH
VCC = 2.7 V;
SDAn = SCLn = VCC
—
2.1
5
mA
ICCL
Quiescent supply current,
both channels LOW
VCC = 2.7 V;
one SDA and one SCL = GND,
other SDA and SCL open
—
4.6
10
mA
ICCLc
Quiescent supply current in contention
VCC = 2.7 V;
SDAn = SCLn = GND
—
3.9
10
mA
0.7 VCC
—
5.5
V
Input SCL; input/output SDA
VIH
HIGH-level input voltage
VIL
LOW-level input voltage (Note 1)
–0.5
—
0.3 VCC
V
VILc
LOW-level input voltage contention
(Note 1)
–0.5
—
0.4
V
VIK
Input clamp voltage
II = –18 mA
—
—
–1.2
V
ILI
Input leakage current
VI = 2.7 V
–1
—
1
µA
IIL
Input current LOW, SDA, SCL
VI = 0.2 V, SDA, SCL
—
—
5
µA
LOW-level output voltage
IOL = 0 or 6 mA
0.47
0.52
0.6
V
LOW-level input voltage below
output LOW-level voltage
Guaranteed by design
—
—
70
mV
Input capacitance
VI = 3 V or 0 V
—
6
10
pF
VOL
VOL–VILc
CI
Enable 1–4
VIL
LOW-level input voltage
–0.5
—
0.8
V
VIH
HIGH-level input voltage
1.5
—
5.5
V
IIL
Input current LOW, EN1–EN4
ILI
Input leakage current
CI
Input capacitance
VI = 0.2 V, EN1–EN4
VI = 3.0 V or 0 V
—
–10
–30
µA
–1
—
1
µA
—
6
7
pF
NOTES:
1. VIL specification is for the first LOW level seen by the SDAx/SCLx lines. VILc is for the second and subsequent LOW levels seen by the
SDAx/SCLx lines.
2. Typical value taken at 2.5 V and 25 °C.
2004 Sep 29
8
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
AC ELECTRICAL CHARACTERISTICS
VCC = 2.3 V to 2.7 V
SYMBOL
PARAMETER
LIMITS
TEST CONDITIONS
MIN.
TYP.2
MAX.
UNIT
tPHL
Propagation delay
Waveform 1
45
93
150
ns
tPLH
Propagation delay
Waveform 1; Note 1
33
90
135
ns
tTHL
Transition time
Waveform 1
—
60
—
ns
tTLH
Transition time
Waveform 1; Note 1
—
131
—
ns
tSET
Enable to Start condition
100
—
—
ns
tHOLD
Enable after Stop condition
130
—
—
ns
NOTES:
1. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.
2. Typical value taken at 2.5 V and 25 °C.
AC ELECTRICAL CHARACTERISTICS
VCC = 3.0 V to 3.6 V
SYMBOL
PARAMETER
LIMITS
TEST CONDITIONS
MIN.
TYP.2
MAX.
UNIT
tPHL
Propagation delay
Waveform 1
45
75
120
ns
tPLH
Propagation delay
Waveform 1; Note 1
33
60
83
ns
tTHL
Transition time
Waveform 1
—
47
—
ns
tTLH
Transition time
Waveform 1; Note 1
—
130
—
ns
tSET
Enable to Start condition
100
—
—
ns
tHOLD
Enable after Stop condition
100
—
—
ns
NOTES:
1. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.
2. Typical value taken at 3.3 V and 25 °C.
AC WAVEFORMS
TEST CIRCUIT
VCC
3.3 V
INPUT
1.5 V
VCC
1.5 V
RL
0.1 V
tPHL
VOUT
VIN
PULSE
GENERATOR
tPLH
D.U.T.
3.3 V
80%
OUTPUT
80%
1.5 V
20%
CL
RT
1.5 V
20%
VOL
tTHL
tTLH
Test Circuit for Open Drain Outputs
DEFINITIONS
SW00646
RL = Load resistor; 1.35 kΩ
Waveform 1.
CL = Load capacitance includes jig and probe capacitance;
50 pF
RT = Termination resistance should be equal to ZOUT of
pulse generators.
SW02280
Figure 7. Test circuit
2004 Sep 29
9
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
SO16: plastic small outline package; 16 leads; body width 3.9 mm
2004 Sep 29
10
SOT109-1
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
2004 Sep 29
11
SOT403-1
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
REVISION HISTORY
Rev
Date
Description
_2
20040929
Product data sheet (9397 750 14108). Supersedes data of 2004 May 28 (9397 750 13238).
Modifications:
• “Application information” section on page 5:
– First paragraph, third sentence:
change from “... unless slave 3 and 4 are isolated ...” to “... unless slave 3 is isolated ...”
– Add (new) third paragraph.
– Figure 4 modified.
_1
2004 Sep 29
20040528
Product data sheet (9397 750 13238).
12
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent
to use the components in the I2C system provided the system conforms to the
I2C specifications defined by Philips. This specification can be ordered using the
code 9398 393 40011.
Data sheet status
Level
Data sheet status [1]
Product
status [2] [3]
Definitions
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys
no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent,
copyright, or mask work right infringement, unless otherwise specified.
 Koninklijke Philips Electronics N.V. 2004
All rights reserved. Published in the U.S.A.
Contact information
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 09-04
For sales offices addresses send e-mail to:
[email protected].
Document number:
Philips
Semiconductors
2004 Sep 29
13
9397 750 14108