INTEGRATED CIRCUITS PCA9515A I2C-bus repeater Product data sheet Supersedes data of 2004 Jul 09 Philips Semiconductors 2004 Sep 29 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A DESCRIPTION The PCA9515A is a CMOS integrated circuit intended for application in I2C and SMBus systems. While retaining all the operating modes and features of the I2C system it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515A enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other is required. PIN CONFIGURATION n.c. 1 Two or more PCA9515As cannot be put in series. The PCA9515A design does not allow this configuration. Since there is no direction pin, slightly different “legal” low voltage levels are used to avoid lock-up conditions between the input and the output. A “regular LOW” applied at the input of a PCA9515A will be propagated as a “buffered LOW” with a slightly higher value. When this “buffered LOW” is applied to another PCA9515A, PCA9516A, or PCA9518 in series, the second PCA9515A, PCA9516A, or PCA9518 will not recognize it as a “regular LOW” and will not propagate it as a “buffered LOW” again. The PCA9510/9511/9513/9514 and PCA9512 cannot be used in series with the PCA9515A, PCA9516A, or PCA9518 but can be used in series with themselves since they use shifting instead of static offsets to avoid lock-up conditions. 8 VCC SCL0 2 7 SCL1 SDA0 3 6 SDA1 GND 4 5 EN SU01322 Figure 1. Pin configuration PIN DESCRIPTION PIN FEATURES • 2 channel, bi-directional buffer • I2C-bus and SMBus compatible • Active-HIGH repeater enable input • Open-drain input/outputs • Lock-up free operation • Supports arbitration and clock stretching across the repeater • Accommodates standard mode and fast mode I2C devices and SYMBOL FUNCTION 1 n.c. No connection 2 SCL0 Serial clock bus 0 3 SDA0 Serial data bus 0 4 GND Supply ground 5 EN Active-HIGH repeater enable input 6 SDA1 Serial data bus 1 7 SCL1 Serial clock bus 1 8 VCC Supply power multiple masters • Powered-off high-impedance I2C pins • Operating supply voltage range of 2.3 V to 3.6 V • 5.5 V tolerant I2C and enable pins • 0 to 400 kHz clock frequency1 • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101. • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA. • Package offerings: SO and TSSOP (MSOP) ORDERING INFORMATION TEMPERATURE RANGE ORDER CODE TOPSIDE MARK DRAWING NUMBER 8-pin plastic SO PACKAGES –40 °C to +85 °C PCA9515AD PA9515A SOT96-1 8-pin plastic TSSOP (MSOP) –40 °C to +85 °C PCA9515ADP 9515A SOT505-1 Standard packing quantities and other packaging data are available at www.standardproducts.philips.com/packaging. 1. The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater. 2004 Sep 29 2 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A VCC PCA9515A SDA0 SDA1 SCL0 SCL1 PULL-UP RESISTOR EN SW02244 GND Figure 2. PCA9515A block diagram I2C Systems The output pull-down of each internal buffer is set for approximately 0.5 V, while the input threshold of each internal buffer is set about 0.07 V lower, when the output is internally driven LOW. This prevents a lock-up condition from occurring. As with the standard I2C system, pull-up resistors are required to provide the logic HIGH levels on the Buffered bus. (Standard open-collector configuration of the I2C-bus). The size of these pull-up resistors depends on the system, but each side of the repeater must have a pull-up resistor. This part designed to work with standard mode and fast mode I2C devices in addition to SMBus devices. Standard mode I2C devices only specify 3 mA output drive, this limits the termination current to 3 mA in a generic I2C system where standard mode devices and multiple masters are possible. Under certain conditions higher termination currents can be used. Please see Application Note AN255 “I 2C & SMBus Repeaters, Hubs and Expanders” for additional information on sizing resistors and precautions when using more than one PCA9515A/PCA9516A in a system or using the PCA9515A/16A in conjunction with the P82B96. FUNCTIONAL DESCRIPTION The PCA9515A integrated circuit contains two identical buffer circuits which enable I2C and similar bus systems to be extended without degradation of system performance. The PCA9515A contains two bi-directional, open drain buffers specifically designed to support the standard LOW-level-contention arbitration of the I2C-bus. Except during arbitration or clock stretching, the PCA9515A acts like a pair of non-inverting, open drain buffers, one for SDA and one for SCL. Enable The EN pin is active HIGH with an internal pull up and allows the user to select when the repeater is active. This can be used to isolate a badly behaved slave on power up until after the system power up reset. It should never change state during an I2C operation because disabling during a bus operation will hang the bus and enabling part way through a bus cycle could confuse the I2C parts being enabled. The enable pin should only change state when the global bus and the repeater port are in an idle state to prevent system failures. 2004 Sep 29 3 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A APPLICATION INFORMATION A typical application is shown in Figure 3. In this example, the system master is running on a 3.3 V I2C-bus while the slave is connected to a 5 V bus. Both buses run at 100 kHz unless the slave bus is isolated and then the master bus can run at 400 kHz. Master devices can be placed on either bus. 3.3 V SDA SCL BUS MASTER 400 kHz The PCA9515A is 5 V tolerant so it does not require any additional circuitry to translate between the different bus voltages. When one side of the PCA9515A is pulled LOW by a device on the I2C-bus, a CMOS hysteresis type input detects the falling edge and causes an internal driver on the other side to turn on, thus causing the other side to also go LOW. The side driven LOW by the PCA9515A will typically be at VOL = 0.5 V. 5V SDA0 SDA1 SDA SCL0 SCL1 SCL In order to illustrate what would be seen in a typical application, refer to Figures 4 and 5. If the bus master in Figure 3 were to write to the slave through the PCA9515A, we would see the waveform shown in Figure 4 on Bus 0. This looks like a normal I2C transmission until the falling edge of the 8th clock pulse. At that point, the master releases the data line (SDA) while the slave pulls it LOW through the PCA9515A. Because the VOL of the PCA9515A is typically around 0.5 V, a step in the SDA will be seen. After the master has transmitted the 9th clock pulse, the slave releases the data line. SLAVE 100 kHz PCA9515A EN BUS0 BUS1 SW02245 Figure 3. Typical application 2 V/DIV 9th CLOCK PULSE VOL OF PCA9515A VOL OF MASTER SW02247 Figure 4. Bus 0 waveform 2004 Sep 29 4 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A It is important to note that any arbitration or clock stretching events on Bus 1 require that the VOL of the devices on Bus 1 be 70 mV below the VOL of the PCA9515A (see VOL – Vilc in the DC Characteristics section) to be recognized by the PCA9515A and then transmitted to Bus 0. On the Bus 1 side of the PCA9515A, the clock and data lines would have a positive offset from ground equal to the VOL of the PCA9515A. After the 8th clock pulse, the data line will be pulled to the VOL of the slave device that is very close to ground in our example. 2 V/DIV 9th CLOCK PULSE VOL OF PCA9515A VOL OF SLAVE SW02246 Figure 5. Bus 1 waveform 2004 Sep 29 5 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A ABSOLUTE MAXIMUM RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134). Voltages with respect to pin GND. SYMBOL LIMITS PARAMETER MIN. MAX. UNIT VCC to GND Supply voltage range VCC –0.5 +7 Vbus Voltage range I2C-bus, SCL or SDA –0.5 +7 V V I DC current (any pin) — 50 mA Ptot Power dissipation — 100 mW Tstg Storage temperature range –55 +125 °C Tamb Operating ambient temperature range –40 +85 °C DC ELECTRICAL CHARACTERISTICS VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = –40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. TYP.2 MAX. UNIT Supplies VCC DC supply voltage 3.0 — 3.6 V ICCH Quiescent supply current, both channels HIGH VCC = 3.6 V; SDAn = SCLn = VCC — 0.8 5 mA ICCL Quiescent supply current, both channels LOW VCC = 3.6 V; one SDA and one SCL = GND, other SDA and SCL open — 1.7 5 mA ICCLc Quiescent supply current in contention VCC = 3.6 V; SDAn = SCLn = GND — 1.6 5 mA Input SCL; input/output SDA VIH HIGH-level input voltage 0.7 VCC — 5.5 V VIL LOW-level input voltage (Note 1) –0.5 — 0.3 VCC V VILc LOW-level input voltage contention (Note 1) –0.5 — 0.4 V VIK Input clamp voltage II = –18 mA — — –1.2 V ILI Input leakage current VI = 3.6 V –1 — +1 µA IIL Input current LOW, SDA, SCL VI = 0.2 V, SDA, SCL — — 5 µA LOW-level output voltage IOL = 20 µA or 6 mA 0.47 0.52 0.6 V LOW-level input voltage below output LOW level voltage Guaranteed by design — — 70 mV Input capacitance VI = 3 V or 0 V — 6 7 pF VOL VOL–VILc CI Enable VIL LOW-level input voltage –0.5 — 0.8 V VIH HIGH-level input voltage 2.0 — 5.5 V IIL Input current LOW, EN ILI Input leakage current CI Input capacitance VI = 0.2 V, EN VI = 3.0 V or 0 V — –10 –30 µA –1 — 1 µA — 6 7 pF NOTES: 1. VIL specification is for the first LOW level seen by the SDAx/SCLx lines. VILc is for the second and subsequent LOW levels seen by the SDAx/SCLx lines. 2. Typical value taken at 3.3 V and 25 °C. 3. For operation between published voltage ranges, refer to worst case parameter in both ranges. 2004 Sep 29 6 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A DC ELECTRICAL CHARACTERISTICS VCC = 2.3 to 2.7 V; GND = 0 V; Tamb = –40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. TYP.2 MAX. UNIT Supplies VCC DC supply voltage 2.3 — 2.7 V ICCH Quiescent supply current, both channels HIGH VCC = 2.7 V; SDAn = SCLn = VCC — 0.8 5 mA ICCL Quiescent supply current, both channels LOW VCC = 2.7 V; one SDA and one SCL = GND, other SDA and SCL open — 1.6 5 mA ICCLc Quiescent supply current in contention VCC = 2.7 V; SDAn = SCLn = GND — 1.6 5 mA Input SCL; input/output SDA VIH HIGH-level input voltage 0.7 VCC — 5.5 V VIL LOW-level input voltage (Note 1) –0.5 — 0.3 VCC V VILc LOW-level input voltage contention (Note 1) –0.5 — 0.4 V VIK Input clamp voltage II = –18 mA — — –1.2 V ILI Input leakage current VI = 2.7 V –1 — +1 µA IIL Input current LOW, SDA, SCL VI = 0.2 V, SDA, SCL — — 10 µA LOW-level output voltage IOL = 20 µA or 6 mA 0.47 0.52 0.6 V LOW-level input voltage below output LOW level voltage Guaranteed by design — — 70 mV Input capacitance VI = 3 V or 0 V — 6 7 pF VOL VOL–VILc CI Enable VIL LOW-level input voltage –0.5 — 0.8 V VIH HIGH-level input voltage 2.0 — 5.5 V IIL Input current LOW, EN ILI Input leakage current CI Input capacitance VI = 0.2 V, EN VI = 3.0 V or 0 V — –10 –30 µA –1 — 1 µA — 6 7 pF NOTES: 1. VIL specification is for the first LOW level seen by the SDAx/SCLx lines. VILc is for the second and subsequent LOW levels seen by the SDAx/SCLx lines. 2. Typical value taken at 2.5 V and 25 °C. 2004 Sep 29 7 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A AC ELECTRICAL CHARACTERISTICS VCC = 2.3 to 2.7 V SYMBOL PARAMETER LIMITS TEST CONDITIONS MIN. TYP.2 MAX. UNIT tPHL Propagation delay Waveform 1 45 82 130 ns tPLH Propagation delay Waveform 1; Note 1 33 113 190 ns tTHL Transition time Waveform 1 — 57 — ns tTLH Transition time Waveform 1; Note 1 — 148 — ns tSET Enable to Start condition 100 — — ns tHOLD Enable after Stop condition 130 — — ns NOTES: 1. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times. 2. Typical value taken at 2.5 V and 25 °C. AC ELECTRICAL CHARACTERISTICS VCC = 3.0 to 3.6 V SYMBOL PARAMETER LIMITS TEST CONDITIONS MIN. TYP.2 MAX. UNIT tPHL Propagation delay Waveform 1 45 68 120 ns tPLH Propagation delay Waveform 1; Note 1 33 102 180 ns tTHL Transition time Waveform 1 — 58 — ns tTLH Transition time Waveform 1; Note 1 — 147 — ns tSET Enable to Start condition 100 — — ns tHOLD Enable after Stop condition 100 — — ns NOTES: 1. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times. 2. Typical value taken at 3.3 V and 25 °C. AC WAVEFORMS TEST CIRCUIT VCC 3.3 V INPUT 1.5 V VCC 1.5 V RL 0.1 V tPHL VIN VOUT PULSE GENERATOR tPLH D.U.T. 3.3 V 80% OUTPUT 80% 1.5 V 20% CL RT 1.5 V 20% VOL tTHL tTLH Test Circuit for Open Drain Outputs DEFINITIONS SW00646 RL = Load resistor; 1.35 kΩ Waveform 1. CL = Load capacitance includes jig and probe capacitance; 50 pF RT = Termination resistance should be equal to ZOUT of pulse generators. SW02280 2004 Sep 29 8 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A SO8: plastic small outline package; 8 leads; body width 3.9 mm 2004 Sep 29 9 SOT96-1 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm 2004 Sep 29 10 SOT505-1 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A REVISION HISTORY Rev Date Description _3 20040929 Product data sheet (9397 750 14098). Supersedes data of 2004 Jul 09 (9397 750 13709). Modifications: • ‘Features’ section on page 2, last bullet: add “(MSOP)” • ‘Ordering information’ table on page 2: add “(MSOP)” to 8-pin plastic TSSOP _2 20040709 Product data sheet (9397 750 13709). Supersedes data of 2004 Jun 17 (9397 750 13237). _1 20040617 Objective data sheet (9397 750 13237). 2004 Sep 29 11 Philips Semiconductors Product data sheet I2C-bus repeater PCA9515A Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Level Data sheet status [1] Product status [2] [3] Definitions I Objective data sheet Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data sheet Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data sheet Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2004 All rights reserved. Published in the U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 09-04 For sales offices addresses send e-mail to: [email protected]. Document number: Philips Semiconductors 2004 Sep 29 12 9397 750 14098