IRF840LC, SiHF840LC Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • • • • • • • 500 RDS(on) (Ω) VGS = 10 V 0.85 Qg (Max.) (nC) 39 Qgs (nC) 10 Qgd (nC) 19 Configuration Ultra Low Gate Charge Reduced Gate Drive Requirement Enhanced 30 V VGS Rating Reduced Ciss, Coss, Crss Extremely High Frequency Operation Repetitive Avalanche Rated Lead (Pb)-free Available Available RoHS* COMPLIANT Single DESCRIPTION D This new series of low charge Power MOSFETs achieve signiticantly lower gate charge over conventional MOSFETs. Utilizing the new LCDMOS technology, the device improvements are achieved without added product cost, allowing for reduced gate drive requirements and total system savings. In addition, reduced switching losses and improved efficiency are achievable in a variety of high frequency applications. Frequencies of a few MHz at high current are possible using the new low charge MOSFETs. These device improvements combined with the proven ruggedness and reliability that are characteristic of Power MOSFETs offer the designer a new standard in power transistors for switching applications. TO-220 G S G D S N-Channel MOSFET ORDERING INFORMATION Package TO-220 IRF840LCPbF SiHF840LC-E3 IRF840LC SiHF840LC Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage SYMBOL VDS VGS Continuous Drain Current VGS at 10 V Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque TC = 25 °C TC = 100 °C ID IDM TC = 25 °C EAS IAR EAR PD dV/dt TJ, Tstg for 10 s 6-32 or M3 screw LIMIT 500 ± 30 8.0 5.1 28 1.0 510 8.0 13 125 3.5 - 55 to + 150 300d 10 1.1 UNIT V A W/°C mJ A mJ W V/ns °C lbf · in N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, RG = 25 Ω, IAS = 8.0 A (see fig. 12). c. ISD ≤ 8.0 A, dI/dt ≤ 100 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91067 S-Pending-Rev. A, 02-Jun-08 WORK-IN-PROGRESS www.vishay.com 1 IRF840LC, SiHF840LC Vishay Siliconix THERMAL RESISTANCE PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. VDS TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 500 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.63 - V/°C VGS(th) VDS = VGS, ID = 250 µA 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 25 VDS = 400V, VGS = 0 V, TJ = 125 °C - - 250 VDS Temperature Coefficient Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs µA - - 0.85 Ω VDS = 50 V, ID = 4.8 Ab 4.0 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 1100 - - 170 - - 18 - - - 39 ID = 4.8 Ab VGS = 10 V Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs - - 10 Gate-Drain Charge Qgd - - 19 Turn-On Delay Time td(on) - 12 - - 25 - - 27 - - 19 - - 4.5 - - 7.5 - - - 8.0 - - 28 Rise Time Turn-Off Delay Time Fall Time tr td(off) VGS = 10 V ID = 8.0 A, VDS = 400 V see fig. 6 and 13b VDD = 250 V, ID = 8.0 A, RG = 9.1 Ω, RD= 30 Ω see fig. 10b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact D pF nC ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS MOSFET symbol showing the integral reverse p - n junction diode D A G Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD TJ = 25 °C, IS = 8.0 A, VGS = 0 Vb - - 2.0 Body Diode Reverse Recovery Time trr 490 740 ns Qrr TJ = 25 °C, IF = 8.0 A, dI/dt = 100 A/µsb - Body Diode Reverse Recovery Charge - 3.0 4.5 µC Forward Turn-On Time ton S V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91067 S-Pending-Rev. A, 02-Jun-08 IRF840LC, SiHF840LC Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91067 S-Pending-Rev. A, 02-Jun-08 www.vishay.com 3 IRF840LC, SiHF840LC Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 91067 S-Pending-Rev. A, 02-Jun-08 IRF840LC, SiHF840LC Vishay Siliconix RD VDS VGS D.U.T. RG + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T. RG + - IAS V DD VDS 10 V tp 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91067 S-Pending-Rev. A, 02-Jun-08 IAS Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRF840LC, SiHF840LC Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91067 S-Pending-Rev. A, 02-Jun-08 IRF840LC, SiHF840LC Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91067. Document Number: 91067 S-Pending-Rev. A, 02-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1