IP4790CZ38 DisplayPort protection Rev. 01 — 14 July 2008 Product data sheet 1. General description The IP4790CZ38 is a single chip ElectroStatic Discharge (ESD) protection solution for the DisplayPort interfaces. The low capacitance, typically 0.7 pF to ground, supports the high data rates defined by the DisplayPort interface standard. 2. Features n Robust ESD protection does not degrade even after several discharge incidents n Low leakage, even after several hundred ESDs n Very high ns diode switching speed and low line capacitance (0.7 pF to ground and 0.05 pF between channels) ensures signal integrity n Integrated rail-to-rail clamping diodes with downstream ESD protection of ±8 kV according to IEC 61000-4-2, level 4 on all Main Link (ML) signal lines n Matched 0.5 mm trace spacing n Optimized TSSOP 38-pin package: u Highly integrated u Small footprint u PCB-level u RF-routing u Lead (Pb) free n Complies with Directive 2002/95/EC, Restriction of Hazardous Substances (RoHS) 3. Applications The IP4790CZ38 can be used with a range of DisplayPort devices including: n Personal computer n PC monitor n Notebook 4. Ordering information Table 1. Ordering information Type number IP4790CZ38 Package Name Description Version TSSOP38 plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm SOT510-1 IP4790CZ38 NXP Semiconductors DisplayPort protection 5. Functional diagram ML_0A ML_1A BIAS_CAP ML_2A ML_3A VBIAS ML_0B BIAS_CAP HOT_PLUG ML_2B BIAS_CAP AUX_A GND Fig 1. GND ML_1B ML_3B BIAS_CAP AUX_B GND GND 001aai165 Functional diagram 6. Pinning information 6.1 Pinning VBIAS 1 38 BIAS_CAP GND 2 37 GND ML_0A 3 36 n.c. n.c. 4 35 ML_0B GND 5 34 GND ML_1A 6 33 n.c. n.c. 7 32 ML_1B GND 8 31 GND ML_2A 9 n.c. 10 30 n.c. IP4790CZ38 29 ML_2B GND 11 28 GND ML_3A 12 27 n.c. n.c. 13 26 ML_3B GND 14 25 GND n.c. 15 24 n.c. n.c. 16 23 n.c. n.c. 17 22 AUX_A n.c. 18 21 AUX_B n.c. 19 20 HOT_PLUG 001aai164 Fig 2. Pin configuration SOT510-1 (TSSOP38) IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 2 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 6.2 Pin description Table 2. Pin description Symbol Pin Description VBIAS 1 bias voltage GND 2 ground ML_0A 3 main link 0A lane protection n.c. 4 not connected GND 5 ground ML_1A 6 main link 1A lane protection n.c. 7 not connected GND 8 ground ML_2A 9 main link 2A lane protection n.c. 10 not connected GND 11 ground ML_3A 12 main link 3A lane protection n.c. 13 not connected GND 14 ground n.c. 15, 16, 17, not connected 18, 19 HOT_PLUG 20 Hot Plug signal protection AUX_B 21 auxiliary channel B protection AUX_A 22 auxiliary channel A protection n.c. 23, 24 not connected GND 25 ground ML_3B 26 main link 3B lane protection n.c. 27 not connected GND 28 ground ML_2B 29 main link 2B lane protection n.c. 30 not connected GND 31 ground ML_1B 32 main link 1B lane protection n.c. 33 not connected GND 34 ground ML_0B 35 main link 0B lane protection n.c. 36 not connected GND 37 ground BIAS_CAP 38 capacitor bias (optional) IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 3 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 7. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions signal pins to ground: ML_xA, ML_xB, AUX_A, AUX_B and HOT_PLUG [1][2] Min Max Unit - ±8 kV VESD electrostatic discharge voltage VVBIAS voltage on pin VBIAS GND − 0.5 5.5 V Tstg storage temperature −55 +125 °C Ptot total power dissipation - 0 mW [1] Human Body Model (HBM) according IEC 61000-4-2, level 4. [2] Where x = 0, 1, 2 and 3. 8. Characteristics Table 4. Characteristics Tamb = 25 °C; unless otherwise indicated. Symbol Parameter Conditions Min Typ Max Unit VBRzd Zener diode breakdown voltage measured with I = 1 mA 6 - 9 V VFd diode forward voltage - 0.7 - V [1] - 0.1 5 µA Pins ML_xA, ML_xB[1] Ibck back current IRM reverse leakage current per ML channel; measured with V = 3.0 V - - 1 µA Cch channel capacitance VVBIAS = 5 V; f = 1 MHz; Vch(ML) = 2.5 V [2] - 0.7 - pF VVBIAS = 5 V; f = 1 MHz; Vch(ML) = 2.5 V [2] - 0.05 - pF - 0.07 - pF ∆Cch channel capacitance difference from pins ML_xA and ML_xB to bias; at power-down; VVBIAS < Vch(ML) Cch(mutual) mutual channel capacitance between signal pin and n.c. pin; VVBIAS = 0 V; f = 1 MHz; Vch(ML) = 2.5 V [2] Rdyn dynamic resistance positive transient; measured with I = 1 A [3] - 2.4 - Ω negative transient; measured with I = 1 A [3] - 1.3 - Ω VESD = ±8 kV [4] - 8 - V VCL(ch)trt(pos) positive transient channel clamping voltage [1] Where x = 0, 1, 2 and 3. [2] This parameter is guaranteed by design and verified by device characterization. [3] According to IEC 61000-4-5/9. [4] Human Body Model (HBM) according IEC 61000-4-2, level 4. IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 4 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 9. Application information The IP4790CZ38 simplifies the protection of an DisplayPort interface. IP4790CZ38 VBIAS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 DisplayPort 1 ML_Lane 0(p)/3(n) GND ML_Lane 0(n)/3(p) ML_Lane 1(p)/2(n) GND ML_Lane 1(n)/2(p) ML_Lane 2(p)/1(n) GND ML_Lane 2(n)/1(p) ML_Lane 3(p)/0(n) GND ML_Lane 3(n)/0(p) GND GND AUX_CH(p) GND AUX_CH(n) Hot Plug Detect Return DP_PWR DP_PWR 001aai175 Fig 3. Typical application Connecting an optional 100 nF capacitor to the BIAS_CAP pin (lead 38) enhances the ESD protection clamping performance. The VBIAS pin reduces the capacitive load of the ESD protection and VVBIAS can be in the range 2.5 V to 5.5 V. IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 5 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 10. Package outline TSSOP38: plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm SOT510-1 E D A X c HE y v M A Z 20 38 A2 (A 3) A A1 pin 1 index θ Lp L 1 19 bp e detail X w M 2.5 0 5 mm scale DIMENSIONS (mm are the original dimensions). UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.85 0.25 0.27 0.17 0.20 0.09 9.8 9.6 4.5 4.3 0.5 6.4 1 0.7 0.5 0.2 0.08 0.08 0.49 0.21 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT510-1 Fig 4. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 03-02-18 05-11-02 MO-153 Package outline SOT510-1 (TSSOP38) IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 6 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 11. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 11.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 11.2 Wave and reflow soldering Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following: • Through-hole components • Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: • • • • • • Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus SnPb soldering 11.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 7 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 11.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 5) than a SnPb process, thus reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 5 and 6 Table 5. SnPb eutectic process (from J-STD-020C) Package thickness (mm) Package reflow temperature (°C) Volume (mm3) < 350 ≥ 350 < 2.5 235 220 ≥ 2.5 220 220 Table 6. Lead-free process (from J-STD-020C) Package thickness (mm) Package reflow temperature (°C) Volume (mm3) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 5. IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 8 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 5. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 12. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes IP4790CZ38_1 20080714 Product data sheet - - IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 9 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 13.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] IP4790CZ38_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 10 of 11 IP4790CZ38 NXP Semiconductors DisplayPort protection 15. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 11.1 11.2 11.3 11.4 12 13 13.1 13.2 13.3 13.4 14 15 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Application information. . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6 Soldering of SMD packages . . . . . . . . . . . . . . . 7 Introduction to soldering . . . . . . . . . . . . . . . . . . 7 Wave and reflow soldering . . . . . . . . . . . . . . . . 7 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . . 7 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Contact information. . . . . . . . . . . . . . . . . . . . . 10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 14 July 2008 Document identifier: IP4790CZ38_1