PCS1P2860A Multi-Output Clock Synthesizer Features Product Description • Generates multiple clock outputs from an The PCS1P2860A is a Precision multi-PLL based frequency synthesizer. Six Clock outputs are generated using an inexpensive 25MHz Crystal or external reference clock. The outputs consist of 25MHz Refout, 127MHz and four 125MHz clocks. SHUTDOWNB signal tri-states all the clocks when enabled. The device operates from a Supply Voltage of 3.3V ± 5%V. The device is available in a 16-pin TSSOP JEDEC package. inexpensive 25MHz crystal or external reference clock • Frequency outputs: o 25MHz Reference clock o 125MHz o 127MHz • Zero ppm frequency synthesis error for all CLK outputs Application • 3.3V ± 5%V Supply Voltage PCS1P2860A is targeted for use in high-end multimedia, communications and consumer applications. • Low jitter design • Packaged in 16-pin TSSOP • Compatible with CY22393XC-MZ2 • Advanced CMOS process Block Diagram AVDD VDD SHUTDOWNB 4 125MHz CLKIN / XIN Crystal Oscillator PLL XOUT 127MHz 25MHz GND ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 1 Publication Order Number: PCS1P2860/D PCS1P2860A Pin Diagram Pin Description Pin # Pin Name 1 125MHz 1 16 SHUTDOWNB VDD 2 15 NC AGND 3 14 AVDD XIN 4 13 NC XOUT 5 12 NC REFOUT 6 11 GND 125MHz 7 10 125MHz 125MHz 8 9 127MHz PCS1P2860A Pin Type Pin Description 125MHz Output 125MHz Clock Output. 2 VDD Power Connect to +3.3V. 3 AGND Power 4 XIN Input 5 XOUT Output 6 REFOUT Output Connect to ground. Crystal connection or external reference frequency input. It can be connected to a 25MHz Fundamental mode crystal. Connection to crystal. If using an external reference clock, this pin must be left unconnected. 25MHz Reference Clock output. 7 125MHz Output 125MHz Clock Output. 8 125MHz Output 125MHz Clock Output. 9 127MHz Output 127MHz Clock Output. 10 125MHz Output 125MHz Clock Output. 11 GND Power Connect to ground. 12 13 14 15 NC NC AVDD NC 16 SHUTDOWNB Power Input No connection. No connection. Connect to +3.3V. No connection. Output Enable bit. When this pin is made HIGH, all clocks are enabled. Tri-states all clocks when this pin is LOW . Rev. 1 | Page 2 of 6 | www.onsemi.com PCS1P2860A Absolute Maximum Ratings Symbol VDD VIN TSTG Parameter Rating Power Supply Voltage relative to Ground Unit -0.5 to +4.6 Input Voltage relative to Ground (Input Pins) -0.5 to VDD+0.3 Storage temperature V -65 to +150 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 125 °C 2 KV TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter Description Min VDD / AVDD Operating Voltage Typ Max Unit 3.3 3.465 V 70 °C 15 pF 3.135 TA Operating Temperature (Ambient Temperature) CL Load Capacitance CIN Input Capacitance 0 5 DC Electrical Characteristics Symbol Parameter Min Typ Max Units VDD / AVDD Operating Voltage 3.135 3.3 3.465 V VIH Input High Voltage 2.2 VDD+0.3 V VIL Input Low Voltage GND-0.3 1.0 V IIH Input HIGH current VIN = VDD 30 µA IIL Input LOW current VIN = GND 50 µA VOH Output High Voltage VDD = 3.135, IOH = -12mA VOL Output Low Voltage VDD = 3.135, IOL = 12mA 0.4 V IOZ Output Leakage Current 10 µA ICC Static Current 5.5 mA IDD Dynamic Current Three-state outputs CLKIN and SHUTDOWNB Pins pulled low No Load, All Clocks on ZOUT Conditions pF 2.4 Nominal output impedance Rev. 1 | Page 3 of 6 | www.onsemi.com V 35 mA 30 Ω PCS1P2860A AC Electrical Characteristics Symbol CLKIN / XIN CLK OUT Parameter Min Input Frequency Typ Max 25 Output Frequency Pin 6 25 Pin 1,7,8,10 125 Pin 9 127 Unit MHz MHz 1 tLH Rising edge slew rate (Measured from 20% to 80%) 1.1 1.7 V/nS 1 Falling edge slew rate (Measured from 80% to 20%) 1.3 2 V/nS 1 Peak-to-peak Period Jitter @ VDD/2 300 pS Synthesis Error (Output Frequency) 0 ppm tHL TPJ 1 tD tLOCK Output Duty Cycle @ VDD/2 45 PLL Lock Time from Power-Up 50 55 % 3 mS NOTE: 1. CL= 15pF for outputs < 100MHz; CL = 10pF for outputs > 100MHz; Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency 25MHz Frequency tolerance ± 50 ppm or better at 25°C Operating temperature range -25°C to +85°C Storage temperature -40°C to +85°C Load capacitance(CP) 18pF Shunt capacitance 7pF maximum ESR 25 Ω Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency. Typical Crystal Interface Circuit R Crystal CL Rx CL CL = 2*(CP – CS), Where CP = Load capacitance of crystal CS = Stray capacitance due to CIN, PCB, Trace etc. Rev. 1 | Page 4 of 6 | www.onsemi.com PCS1P2860A Package Information 16-lead Thin Shrunk Small Outline Package (4.40-MM Body) 1 8 PIN 1 ID E 16 A A2 e A1 Seating Plane C θ D 9 H B L D Dimensions Symbol Inches Min Millimeters Max A Min Max 0.043 1.20 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05 B 0.007 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.193 0.201 4.90 5.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.030 θ 0° 8° 0.50 0.75 0° 8° Rev. 1 | Page 5 of 6 | www.onsemi.com PCS1P2860A Ordering Information Part Number PCS1P2860AG-16TR Marking 1P28 60A Package Temperature 16-Pin TSSOP, TAPE & REEL, Green 0°C to +70°C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US patent #5,488,627 and #5,631,920. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes ON Semiconductor and without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. 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