ASM3P2863A Peak EMI Reducing Solution Features The ASM3P2863A uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all digital method. • Generates an EMI optimized clock signal at the output. • Integrated loop filter components. The ASM3P2863A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This result in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation.’ • Operates with a 3.3V / 2.5V supply. • Operating current less than 4mA. • CMOS design. • Input frequency: 12MHz • Generates a 1X low EMI spread spectrum clock of the input frequency. • Frequency deviation: ±0.4%(Typ) @ 12MHz Input Frequency Applications • Available in 6L-TSOP (6L-TSOT-23) package. The ASM3P2863A is targeted towards all portable devices with very low power requirements like MP3 players, Notebooks and Digital still cameras. Product Description The ASM3P2863A is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The ASM3P2863A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals. The ASM3P2863A allows significant system cost savings by reducing the number of circuit board layers, ferrite beads and shielding that are traditionally required to pass EMI regulations. Block Diagram Description Specification Supply voltages VDD = 2.5V / 3.3V Cycle-to-Cycle Jitter ±200pS ( typ) Output Duty Cycle 45/55% (worst case) Modulation Rate Equation FIN/256 Frequency Deviation ±0.4 % (Typ) @ 12MHz VDD PLL Modulation XIN / CLKIN XOUT Key Specifications Crystal Oscillator Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT REFOUT VSS ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 1 Publication Order Number: ASM3P2863/D ASM3P2863A Pin Configuration (6L-TSOP Package) REFOUT 1 XOUT 2 ASM3P2863A XIN / CLKIN 3 6 VSS 5 ModOUT 4 VDD Pin Description Pin# Pin Name Type Description 1 REFOUT O Buffered output of the input frequency. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 XIN / CLKIN I Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. 4 VDD P Power supply for the entire chip. 5 ModOUT O Spread spectrum clock output. 6 VSS P Ground connection. Rev. 1 | Page 2 of 7 | www.onsemi.com ASM3P2863A Absolute Maximum Ratings Symbol VDD, VIN TSTG Parameter Rating Unit Voltage on any input pin with respect to Ground -0.5 to +4.6 V Storage temperature -65 to +125 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C 2 KV Static Discharge Voltage TDV (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter VDD Description Supply Voltage Min Max Unit 2.375 3.6 V 0 +70 °C TA Operating Temperature (Ambient Temperature) CL Load Capacitance 15 pF CIN Input Capacitance 7 pF DC Electrical Characteristics for 2.5V Supply Symbol Parameter Min Typ Max Unit VIL Input low voltage VSS-0.3 0.8 V VIH Input high voltage 2.0 VDD+0.3 V IIL Input low current -35 µA IIH Input high current 35 µA IXOL XOUT output low current (@ 0.5V, VDD = 2.5V) 3 mA IXOH XOUT output high current (@ 1.8V, VDD = 2.5V) 3 mA VOL Output low voltage (VDD = 2.5V, IOL = 8mA) VOH Output high voltage (VDD = 2.5V, IOH = 8mA) IDD ICC VDD tON ZOUT 0.6 1.8 1 Static supply current V 0.8 Dynamic supply current (2.5V, 12MHz and no load) Operating voltage mA 3 2.375 2.5 Power-up time (first locked cycle after power-up) Output impedance 50 Note: 1. XIN / CLKIN pin is pulled low. Rev. 1 | Page 3 of 7 | www.onsemi.com V mA 2.625 V 5 mS Ω ASM3P2863A AC Electrical Characteristics for 2.5V Supply Symbol Parameter Min Typ Max Unit CLKIN Input frequency 12 MHz ModOUT Output frequency 12 MHz fd Frequency Deviation ±0.4 % 1 Output rise time (measured from 0.7V to 1.7V) 0.5 1.5 1.7 nS 1 Output fall time (measured from 1.7V to 0.7V) 0.5 1.0 1.2 nS ±200 ±300 pS 50 55 % tLH tHL tJC Jitter (Cycle-to-Cycle) tD Output duty cycle 45 Note: 1. tLH and tHL are measured into a capacitive load of 15pF. DC Electrical Characteristics for 3.3V Supply Symbol Parameter Min Typ Max Unit VIL Input low voltage VSS-0.3 0.8 V VIH Input high voltage 2.0 VDD+0.3 V IIL Input low current -35 µA IIH Input high current 35 µA IXOL XOUT output low current (@ 0.4V, VDD = 3.3V) 3 mA IXOH XOUT output high current (@ 2.5V, VDD = 3.3V) 3 mA VOL Output low voltage (VDD = 3.3V, IOL = 8mA) VOH Output high voltage (VDD = 3.3V, IOH = 8mA) 0.4 2.5 V 1 IDD Static supply current ICC Dynamic supply current (3.3V, 12MHz and no load) VDD Operating Voltage tON 3.0 1 mA 3.5 mA 3.3 Power-up time (first locked cycle after power-up) ZOUT V Output impedance 3.6 V 5 mS Ω 45 Note: 1. XIN / CLKIN pin is pulled low. AC Electrical Characteristics for 3.3V Supply Symbol Parameter CLKIN ModOUT fd Typ Max Unit Input frequency 12 MHz Output frequency 12 MHz ±0.4 % Frequency Deviation 1 Output rise time (measured from 0.8 to 2.0V) 0.5 1.4 1.6 nS 1 Output fall time (measured at 2.0V to 0.8V) 0.4 1.0 1.2 nS ±200 ±300 pS 50 55 % tLH tHL Min tJC Jitter (Cycle-to-Cycle) tD Output duty cycle Note: 1. tLH and tHL are measured into a capacitive load of 15pF. Rev. 1 | Page 4 of 7 | www.onsemi.com 45 ASM3P2863A Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency 12MHz Frequency tolerance ±50ppm or better at 25°C Operating temperature range -25°C to +85°C Storage temperature -40°C to +85°C Load capacitance (CP) 18pF Shunt capacitance 7pF maximum ESR 25Ω Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency. Typical Crystal Interface Circuit R Crystal XIN Rx XOUT CL CL CL = 2*(CP – CS), Where CP = Load capacitance of crystal from crystal vendor datasheet. CS = Stray capacitance due to CIN, PCB, Trace, etc. Typical Application Schematic VDD C1 0.1µF C2 2.2µF VDD ASM3P2863A Rs ModOUT VSS Rev. 1 | Page 5 of 7 | www.onsemi.com ModOUT Clock ASM3P2863A Package Information 6L-TSOP Package Dimensions Symbol Inches Millimeters Min Max Min Max A …… 0.04 ….. 1.00 A1 0.00 0.004 0.00 0.10 A2 0.033 0.036 0.84 0.90 b 0.012 0.02 0.30 0.50 H 0.005 BSC 0.127 BSC D 0.114 BSC 2.90 BSC B 0.06 BSC 1.60 BSC e 0.0374 BSC 0.950 BSC C 0.11 BSC 2.80 BSC L 0.0118 0.02 0.30 0.50 θ 0° 4° 0° 4° Rev. 1 | Page 6 of 7 | www.onsemi.com ASM3P2863A Ordering Information Part Number ASM3P2863AF-06OR Marking Package Type Temperature V4L 6L-TSOP (6L-TSOT-23), TAPE & REEL, Pb Free 0°C to +70°C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US Patent #5,488,627 and #5,631,921. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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