PS200
Data Sheet
PowerSmart® Configurable
Battery Charger
© 2005 Microchip Technology Inc.
DS21891B
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
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RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
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written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
KEELOQ, MPLAB, PIC, PICmicro, PowerSmart and
SmartShunt are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
PowerCal, PowerInfo, PowerMate, PowerTool, Select Mode,
Smart Serial and SmartTel are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated. Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
DS21891B-page ii
© 2005 Microchip Technology Inc.
PS200
PowerSmart® Configurable Battery Charger
Features
Applications
• User configurable battery charger.
• Firmware available for the following cell
chemistries:
- Lithium Ion/Polymer (available now)
- NiMH, NiCd (available Q2 2005)
- Pb Acid (available Q3 2005)
• 10-bit ADC for voltage, current and temperature
measurement:
- Accurate Voltage Regulation (+/-1%)
- Accurate Current Regulation (+/-5%)
• Maximum integration for optimal size:
- Integrated voltage regulator
- Internal 8 MHz clock oscillator
- High-Frequency Switch mode charging –
configurable switching frequency up to 1 MHz
• 256 bytes EEPROM storage for charging
parameters
• Switch mode charger supports buck and
synchronous buck topologies
• Configurable charge status display via two LEDs
• Power-on Reset (POR)
• Brown-out Reset (BOR)
• Power-saving Sleep mode
•
•
•
•
•
•
•
•
•
© 2005 Microchip Technology Inc.
Notebook Computers
Personal Data Assistants
Cellular Telephones
Digital Still Cameras
Camcorders
Portable Audio Products
Bluetooth® Devices
Flashlights
Power Tools
VDD
LED2
VIN
RESET
CTRLOUT
CHGOUT
LOOPFBK
LOOPIN
CTRLIN
LED1
1
2
3
4
5
6
7
8
9
10
PS200
Pin Diagram
20
19
18
17
16
15
14
13
12
11
VSS
TEMP
VOVP
SHDN
CHGFBK
BATID
IFBOUT
IFBINA
IFBINB
HVOUT
20-Pin PDIP, SOIC, SSOP
DS21891B-page 1
PS200
Pinout Description
Pin
Pin Name
Pin Type Input Type Output Type
Description
1
VDD
Supply
Power
—
Supply voltage
2
LED2
O
—
CMOS
Status indicator
3
VIN
I
Analog
—
Battery voltage input
4
RESET
I
ST
—
5
CTRLOUT
O
—
CMOS
PWM output for setting current level
Reset
6
CHGOUT
O
—
CMOS
PWM output to a buck converter for charge control
7
LOOPFBK
I
Analog
—
8
LOOPIN
I
Analog
—
Current feedback loop input
9
CTRLIN
I
Analog
—
Current level control
Current feedback loop
10
LED1
O
—
CMOS
Status indicator
11
HVOUT
O
—
HVOD
High-voltage, open-drain output pin (optional)
12
IFBINB
I
Analog
—
Current feedback input pin B used for current scaling
13
IFBINA
I
Analog
—
Current feedback input pin A used for current scaling
14
IFBOUT
O
—
Analog
15
BATID
I
Analog
—
16
CHGFBK
I
Analog
—
17
SHDN
O
—
Analog
Current feedback output
Battery ID select
Charge control feedback
Shutdown signal, active-low
18
VOVP
I
Analog
—
Overvoltage protection
19
TEMP
I
Analog
—
Battery temperature input
20
VSS
Supply
Power
—
Supply ground
Legend: I = Input, O = Output, ST = Schmitt Trigger Input Buffer, HVOD = High-Voltage Open-Drain
DS21891B-page 2
© 2005 Microchip Technology Inc.
PS200
1.0
PS200 OVERVIEW
The PS200 is a configurable Switch mode charger
which is comprised of a PIC16F microcontroller core
and precision analog circuitry. This section explores the
hardware features in relation to generic Switch mode
charging. Subsequent sections will describe the operation of the PS200 with firmware for Lithium-based
(Section 2.0 “Lithium Chemistry Algorithm”),
Nickel-based (Section 3.0 “Nickel Chemistry Algorithm”) and Lead Acid (Section 4.0 “Lead Acid
Chemistry Algorithm”) charging.
•
•
•
•
•
•
•
•
•
•
•
Oscillator
Power-saving Sleep mode
Power-on Reset (POR)
Brown-out Reset (BOR)
High-Endurance Flash/EEPROM Cell:
- 100,000 write Flash endurance
- 1,000,000 write EEPROM endurance
- Flash/Data EEPROM retention: > 40 years
High-Speed Comparator module with:
- Two independent analog comparators
Operational Amplifier module with two
independent op amps
Two-Phase Asynchronous Feedback PWM
Voltage Regulator
10-bit (9-bit plus sign) A/D Converter
In-Circuit Serial Programming™ (ICSP™) via
two pins
1.1
Hardware Features
The PS200 features are well-suited for Switch mode
battery charging. The PS200 device’s block diagram
(Figure 1-1) is to be used in conjunction with the Switch
mode charger example (Figure 2-3, page 12).
• Current/Voltage Measurement Block – The
Current/Voltage Measurement Block consists of a
10-bit Analog-to-Digital converter, operational
amplifiers and a comparator. The output of this
block is fed into the Charge Control module.
Please refer to Figure 1-1.
The inputs into this block are to be connected as
described in Figure 2-3. The following signals are
inputs into this block:
-
LOOPFBK – to comparator
LOOPIN – to op amp and ADC
CTRLIN – to op amp
IFBINB – to op amp
IFBINA – to op amp
BATID – to ADC
TEMP – to ADC
CHGFBK – to comparator
© 2005 Microchip Technology Inc.
The following signals are outputs from this block:
- IFBOUT – from op amp
• Charge Control Module:
- The charge control module generates a
Pulse-Width Modulated signal called CHGOUT.
Its frequency is configurable and can be set up
to 1 MHz. This signal is connected to an
external DC/DC buck converter.
• Voltage Regulator
- The integrated voltage regulator is designed
to work with unregulated DC supplies.
- There are guidelines that should be followed.
A series limiting resistor (RVDD) should be
placed between the unregulated supply and
the VDD pin. The value for this series resistor
(RVDD) must be between RMIN and RMAX as
shown in the following equation:
EQUATION 1-1:
RMAX =
Vs(MIN) – 5V) * 1000
1.05 * (16 mA + I(led))
RMIN =
Vs(MAX) – 5V) * 1000
.95 * (50 mA)
Where:
RMAX = maximum value of series resistor (ohms)
RMIN = minimum value of series resistor (ohms)
Vs(MIN) = minimum value of charger DC supply (VDC)
Vs(MAX) = maximum value of charger DC supply (VDC)
I(led) = total current drawn by all LEDs when
illuminated simultaneously
The 1.05 and .95 constants are included to compensate
for the tolerance of 5% resistors. The 16 mA constant is
the anticipated load presented by the PS200, including
the loading due to external components and a 4 mA
minimum current for the shunt regulator itself. The
50 mA constant is the maximum acceptable current for
the shunt regulator.
• The precision internal 8 MHz clock oscillator
eliminates the need for external oscillator circuits.
• In-circuit configurability utilizing 256 bytes of
on-board EEPROM.
• Power on Reset – The POR insures the proper
start-up of the PS200 when voltage is applied to
VDD.
• Brown-out Reset – The BOR is activated when
the input voltage falls to 2.1V; the PS200 is reset.
DS21891B-page 3
PS200
FIGURE 1-1:
PS200 BLOCK DIAGRAM
RESET
VOVP
VDD
SHDN
VSS
Voltage
Regulator
Voltage
Reference
-
CTRLIN
LOOPIN
LOOPFBK
CHGFBK
IFBINB
IFBINA
IFBOUT
VIN
BATID
TEMP
DS21891B-page 4
C1
+
+
OA1
-
Current/Voltage
Measurement
Block
To Charge
Control Module
Internal
Oscillator
C2
+
+
OA2
-
CTRLOUT
10-bit
ADC
Charge
Control
Module
CHGOUT
LED1
LED2
HVOUT
© 2005 Microchip Technology Inc.
PS200
2.0
LITHIUM CHEMISTRY
ALGORITHM
The PS200 provides an unprecedented level of
configurability for charging Lithium Ion/Lithium Polymer
battery packs. It’s precision, 10-bit Analog-to-Digital
converter and high-frequency Pulse-Width Modulator
enable the PS200 to provide optimum control of
charging algorithms for lithium battery chemistries.
Special features include an internal voltage regulator
and an internal clock oscillator that reduce external
component count.
2.1
2.1.1
Lithium Overview
MULTI-STEP CHARGING
To ensure the proper treatment of lithium chemistries
during extreme temperature and voltage conditions,
multi-step charging is required. The PS200 starts the
charging cycle upon sensing the presence of a battery
pack and a valid charging supply. During charge
qualification, the battery’s temperature and voltage are
measured to determine the appropriate initial state.
The initial states include Charge Suspend, Precharge
and Current Regulation. Charge Suspend halts
charging when the user defined preset conditions for
charging are not met. Precharge allows for the
recovery of deeply discharged batteries by applying a
low-charge current. Current Regulation provides
constant current, voltage limited charge. Upon
reaching the target voltage during Current Regulation,
the Voltage Regulation state is entered. Charging
continues at a constant voltage until the current
decreases to the user specified minimum current
threshold (VRIMin). At this threshold, charging is
terminated and the End-Of-Charge state is reached.
2.1.2
USER CONFIGURABLE
PARAMETERS
The PS200 supports user configurable parameters that
allow for customizing the charging profile. This feature
allows for the maximum reuse of hardware, thus
reducing time-to-market. These parameters include:
• Battery Temperature:
- Minimum/maximum temperature for charge
initiation
- Maximum temperature allowed during charge
• Battery Voltage:
- Minimum/maximum voltage for charge
initiation
- Target voltage during Voltage Regulation
- Voltage at which the charger will restart
charging after completion of a valid charge
cycle
• Charge Current:
- Target current during Current Regulation
- Taper current threshold for End-Of-Charge
during Voltage Regulation
- Target current during Precharge
• Time:
- Precharge time limit
- Current Regulation time limit
- Voltage Regulation time limit
• Status Display:
- Two LEDs denote the charge states. Their
flash rates can be modified.
The state diagram illustrates the charging cycle (see
Figure 2-1).
© 2005 Microchip Technology Inc.
DS21891B-page 5
PS200
FIGURE 2-1:
PS200 STATE DIAGRAM LI CHARGER
(A) Charge Pending
(1) VCC Reset or
BATPRES = 0
(2) Vcc Reset or
BATPRES = 0
(3) VCC Reset or
BATPRES = 0
(4) BATPRES = 1
(5) V> VRCHG
(6) V > VMIN and
TMAX > T > TMIN
(B) Charge
Qualification
(8) V < VMIN and
TMAX > T > TMIN
(7) TMAX < T OR T < TMIN
(9) TMAX > T > TMIN and V < VRCHG
(C) Charge Suspend
(D) Precharge
(10) t > tp and V < VMIN or
T > TMAX or T < TMIN
(11) V > VMIN and
TMAX > T > TMIN
(E) Current Regulation
(12) V > VMAX or
T > TMAX or
t > ti or
T < TMIN
(13) VCC Reset or BATPRES = 0
(14) V > VREG,
T < TMAXCHG
(F) Voltage Regulation
(15) V > VMAX or
T > TMAXCHG or
t > tv
(16) VCC Reset
BATPRES = 0
(17) I < IMIN and V ≥ VREG
(18) BATPRES = 0 or
V < VRCHG or VCC Reset
Legend:
T
TMIN
TMAX
TMAXCHG
V
VMIN
VMAX
VREG
VRCHG
Note:
=
=
=
=
=
=
=
=
=
(G) Charge Complete
battery temperature
minimum temperature allowed during charging
maximum temperature allowed during charging
maximum temperature allowed during voltage regulation
battery voltage
minimum voltage for entering current regulation
maximum voltage for charge initiation
target voltage during charge regulation
voltage threshold at which charging will restart
I
IMIN
= charge current
= taper current threshold for
End-Of-Charge during voltage regulation
t
= time
tp
= precharge time limit
ti
= current regulation time limit
tv
= voltage current time limit
BATPRES= battery present variable; if ‘1’, then battery
is present; if ‘0’, then battery is not present
When the PS200 resets, it enters the Charge Pending state.
DS21891B-page 6
© 2005 Microchip Technology Inc.
PS200
2.2
Lithium Charging
To ensure the proper treatment of lithium chemistries
during extreme temperature and voltage conditions,
multi-step charging is required. The PS200 measures
key voltage, temperature and time parameters. It compares them to user defined voltage, temperature and
time limits. These limits are described in Section 2.4
“Lithium Configurable Parameters”.
Note:
2.2.1
2.2.3
The Precharge state allows for the recovery of a deeply
discharged battery pack by applying a low charge rate.
In this state, a user configured precharge current is
applied to the battery, resulting in an increase in the
battery’s voltage (refer to Figure 2-2). There are three
possible next states (see Figure 2-1).
1.
Refer to Figure 2-1 and Figure 2-2 for
clarification when reading this section.
CHARGE PENDING STATE –
BEGINNING THE CHARGE CYCLE
2.
The PS200 is initially set in the Charge Pending state
(A). In this state, the presence of a battery pack must
be sensed in order to begin the charging cycle. The
PS200 comes up in the Charge Pending state, after a
Reset, independent of the previous state.
2.2.2
CHARGE QUALIFICATION STATE
2.
3.
4.
If the battery’s temperature is outside of the
limits for charge initiation (TMAX, TMIN) then the
next state is Charge Suspend (C).
If the battery’s voltage is less than the minimum
voltage for charge initiation (VMIN) and its
temperature is within the limits for charge
initiation (TMAX, TMIN), then the next state is
Precharge (D).
If the battery’s voltage is above the minimum
voltage for charge initiation (VMIN) and its temperature is within the limits for charge initiation
(TMAX, TMIN), then the next state is Current
Regulation (E).
If the battery’s voltage is above the voltage at
which charging will restart (VRCHG), then the
next state is Charge Complete (G).
© 2005 Microchip Technology Inc.
If the battery’s voltage is above the minimum
voltage for charge initiation (VMIN) and the
battery’s temperature is within the limits for
charge initiation (TMAX, TMIN), then the next state
is Current Regulation (E).
If the Precharge state time limit is exceeded (tp)
and the battery’s voltage remains less than the
minimum voltage for charge initiation (VMIN),
then the next state is Charge Suspend (C).
If the Precharge state time limit is exceeded (tp)
and the battery’s temperature is greater than the
maximum temperature for charge initiation (TMAX),
then the next state is Charge Suspend (C).
If the Precharge state time limit is exceeded (tp)
and the battery’s temperature is less than the
minimum temperature for charge initiation (TMIN),
then the next state is Charge Suspend (C).
During charge qualification, the battery’s temperature
and voltage are measured to determine the next
charging state. There are four possible next states (see
Figure 2-1).
1.
PRECHARGE STATE
3.
If the battery pack is taken away (BATPRES = 0),
then the PS200 enters the Charge Pending (A)
state.
2.2.4
CHARGE SUSPEND STATE
In the Charge Suspend state, no current is applied to
the battery pack. There are two possible next states
(see Figure 2-1).
1.
2.
If the battery’s temperature is within the limits for
charge initiation (TMAX, TMIN) and its voltage is
less than the voltage at which charging would
restart (VRCHG), then the next state is Precharge
(D).
If the battery pack is taken away (BATPRES = 0),
then the PS200 enters the Charge Pending (A)
state.
DS21891B-page 7
PS200
CURRENT REGULATION STATE
The Current Regulation state can be entered from the
Precharge state or Charge Qualification state. Battery
charging is initiated. This state provides constant
current, voltage limited charging (refer to Figure 2-2).
The charge current is referred to as IREG or the regulation current. While the current is applied, the battery’s
voltage increases until it reaches a voltage limit
referred to as VREG or regulation voltage. Charging
continues, during which battery voltage and temperature are monitored. There are three possible next
states.
1.
2.
If the battery’s voltage reaches or exceeds the
voltage limit, VREG and its temperature remains
below the maximum allowable during current
regulated charging (TMAXCHG), then the next
state is Voltage Regulation (F).
If the battery exhibits any one of the following
conditions then the next state is Charge
Suspend (C):
- Battery voltage exceeds upper voltage limit
for charging (VMAX)
- Battery temperature exceeds upper
temperature limit for charging (TMAX)
- Battery temperature is below the lower
temperature limit for charging (TMIN)
If the time in the Current Regulation state
exceeds the time limit (ti), then the next state is
Charge Suspend (C).
3.
If the battery pack is taken away (BATPRES = 0),
then the PS200 enters the Charge Pending (A)
state.
FIGURE 2-2:
2.2.6
VOLTAGE REGULATION STATE
Voltage Regulation provides charging at a constant
voltage while the charge current decreases (or tapers)
to the user specified minimum current threshold (IMIN).
There are three possible next states.
1.
2.
3.
When the charge current reaches the taper
current threshold for End-Of-Charge (IMIN) and
the battery’s voltage remains at the regulated
voltage value (VREG), then the battery has
reached the Charge Complete (G) state.
If the battery exhibits any one of the following
conditions, then the next state is Charge
Suspend (C).
- Battery voltage exceeds upper voltage limit
for charging (VMAX)
- Battery temperature exceeds upper
temperature limit for charging (TMAXCHG)
If the time in the Voltage Regulation state
exceeds the time limit (tv), then the next state is
Charge Suspend (C).
If the battery pack is taken away (BATPRES = 0),
then the PS200 enters the Charge Pending (A)
state.
2.2.7
CHARGE CYCLE COMPLETE STATE
The user specified minimum current threshold (IMIN)
can be configured for various charging temperatures.
At this threshold, charging is terminated and the EndOf-Charge state is reached. The PS200 can renew the
charge cycle by entering the Charge Pending (A) state
when: 1) the battery is removed (BATPRES = 0), or 2) if
the battery’s voltage falls below the recharge threshold
voltage (VRCHG).
PS200 CHARGING PROFILE
Battery Voltage
Current
VREG
IREG
Voltage Regulation
Voltage
2.2.5
Current Regulation
Precharge
IMIN
Charge Current
Time
DS21891B-page 8
© 2005 Microchip Technology Inc.
PS200
2.3
KEELOQ® Algorithm
The PS200 includes Microchip’s KEELOQ decoder
algorithm. The KEELOQ code hopping technology is a
worldwide standard providing a simple, yet highly
secure, solution for authentication. Microchip’s battery
management products include the KEELOQ algorithm to
provide secure identification for rechargeable batteries.
When the KEELOQ algorithm is enabled, the PS200 will
issue a 32-bit challenge to the attached rechargeable
battery. The battery, which also includes the KEELOQ
decoder algorithm, will generate a response. See
Microchip application note AN827 “Using KEELOQ® to
Validate Subsystem Compatibility” (DS00827) for
details on implementing a complete KEELOQ battery
authentication system.
2.4
Lithium Configurable Parameters
The PS200 device’s configurable parameters allow for
flexible changes in designing battery chargers. The
parameters are categorized as follows:
• Configuration
• Charging Limits
- Precharge
- Current Regulation
- Voltage Regulation
• LED Display Configuration
Please refer to Table 2-1 “PS200 Lithium Configurable
Parameters”.
2.4.1
CONFIGURATION PARAMETERS
The configuration parameters provide an identity to the
battery pack and provide its basic characteristics to the
PS200.
2.4.2
2.4.2.1
2.4.2.2
Current Regulation Parameters
The Current Regulation parameters configure the
charger’s operation during this second battery charging
phase.
2.4.2.3
Voltage Regulation Parameters
The Voltage Regulation parameters configure the
charger’s operation during this third battery charging
phase.
2.4.3
LED DISPLAY CONFIGURATION
The PS200 supports a two-LED charging state display.
These LEDs can be configured to identify seven unique
charger states:
• Charge Pending – charger is waiting for battery
pack that needs charge.
• Charge Qualification – charger is determining if
the battery pack can be safely charged.
• Precharge – charger is charging the battery pack
under the conditions configured for precharge.
• Charge Suspend – charger has temporarily
suspended charging the battery pack. This state
is usually entered as a result of violating a
maximum temperature requirement. Charging will
resume when conditions are within required
charging parameter values.
• Current Regulation – charger is charging the
battery pack with a constant current.
• Voltage Regulation – charger is charging the
battery pack at the constant target voltage.
• Charge Complete – charger has completed
charging the battery pack.
CHARGING LIMITS
Precharge Parameters
The Precharge parameters configure the charger’s
operation during this initial battery charging phase.
© 2005 Microchip Technology Inc.
DS21891B-page 9
PS200
TABLE 2-1:
PS200 LITHIUM CONFIGURABLE PARAMETERS
Step 1 – Configuration
Parameter Name
#
Lower Upper
Bytes Limit Limit
MfgName
—
N/A
DevName
—
SeriesCells
1
Capacity (mAh)
PWMFreq
Typical
Value
Description
N/A
Microchip
ASCII value.
N/A
N/A
PS200
ASCII value.
1
255
4
2
0
65535
2000
1
7
83
15
Number of series connected cells in the battery pack.
Full-charge capacity of the battery pack.
LUT value which determines the PWM frequency.
Step 2 – Charging Limits
Parameter Name
#
Lower Upper
Bytes Limit Limit
Typical
Value
Description
PCVMin (mV)
2
0
65535
2500
Minimum cell voltage required to enable charging with precharge
conditions.
PCVMax (mV)
2
0
65535
3000
Maximum cell voltage required to enable charging with
precharge conditions.
PCCurrent (mA)
2
0
65535
200
Charging current during precharge.
PCTempMin
1
0
255
50
Minimum temperature required to enable charging with
precharge conditions.
PCTempMin value = (temperature °C * 10 + 200)/4;
so typical value of 50 = 0°C.
PCTempMax
1
0
255
175
Maximum temperature required to enable charging with
precharge conditions.
PCTempMax value = (temperature °C * 10 + 200)/4;
so typical value of 175 = 50°C.
PCTime (min)
1
0
255
60
Duration of precharge.
CRVTarg (mV)
2
0
65535
4200
Target cell voltage in current regulation. This is set to the fully
charged voltage of one cell, typically, as specified by the cell
manufacturer.
CRCurrent (mA)
2
0
65536
2000
Charging current during current regulation.
CRTimeMax (min)
1
0
255
90
VRVrech (mV)
2
0
65536
3780
Voltage regulation recharge cell voltage. Charger will
automatically begin charging if cell voltage of pack falls below
SeriesCells * VRVrech.
VRIMin (mA)
2
0
65536
150
Voltage regulation fully charged current. This is the value of the
taper current or IMIN which will determine that the battery is fully
charged.
VRTimeMax (min)
1
0
255
90
Voltage regulation time limit.
TempMax
1
0
255
200
Maximum temperature required to enable charging during
current regulation and voltage regulation.
TempMax value = (temperature °C * 10 + 200)/4;
so typical value of 200 = 60°C.
DS21891B-page 10
Current regulation time limit.
© 2005 Microchip Technology Inc.
PS200
TABLE 2-1:
PS200 LITHIUM CONFIGURABLE PARAMETERS (CONTINUED)
Step 3 – LED Display
Parameter Name
#
Lower Upper
Bytes Limit Limit
Typical
Value
Description
LED1Pending
1
N/A
N/A
0b00000000 LED1 display when charge is pending.
LED2Pending
1
N/A
N/A
0b00000000 LED2 display when charge is pending.
LED1Qual
1
N/A
N/A
0b00000000 LED1 display during charge qualification.
LED2Qual
1
N/A
N/A
0b00000000 LED2 display during charge qualification.
LED1PC
1
N/A
N/A
0b00000000 LED1 display during precharge.
LED2PC
1
N/A
N/A
0b00000000 LED2 display during precharge.
LED1Suspend
1
N/A
N/A
0b00000000 LED1 display when charge has been temporarily suspended.
LED2Suspend
1
N/A
N/A
0b00000000 LED2 display when charge has been temporarily suspended.
LED1CR
1
N/A
N/A
0b00000000 LED1 display during charge regulation.
LED2CR
1
N/A
N/A
0b00000000 LED2 display during charge regulation.
LED1VR
1
N/A
N/A
0b00000000 LED1 display during voltage regulation.
LED2VR
1
N/A
N/A
0b00000000 LED2 display during voltage regulation.
LED1Full
1
N/A
N/A
0b00000000 LED1 display when battery is fully charged.
LED2Full
1
N/A
N/A
0b00000000 LED2 display when battery is fully charged.
Miscellaneous
Parameter Name
#
Lower Upper
Bytes Limit Limit
Typical
Value
Description
PatternID
2
0x0
0xFFFF
0x0
BatIDMin
1
0
255
0
BATID input pin value minimum.
BatIDMax
1
0
255
255
BATID input pin value maximum.
© 2005 Microchip Technology Inc.
Pattern ID.
DS21891B-page 11
R5/R9/C9 FORM A LOW-PASS FILTER, WITH
A TIME CONSTANT OF 4.7 MILLISECONDS. THIS
ALLOWS FIRMWARE LOOP UPDATE RATES OF
UP TO 50 TIMES A SECOND.
CTRLOUT IS COMPARE OUTPUT, WHICH IS
A FIRMWARE CONTROLLED PWM THAT SETS
CURRENT LEVEL. R5/R9/C9 SCALE AND
FILTER THE VOLTAGE FROM CTRLOUT,
FOR APPLICATION TO OP1.
FIRMWARE CURRENT CONTROL OUTPUT:
VDD
R9
10.0K
COMG
MCLR
DATA
1-WIRE
COMM.
ACCESS
C1
100 nF
CCOMP2
+
CP2
+
RVL
T/ID
RVH
CIH
RIH
IFBINA
13
12
6
16
Rt
15
11
19
R20
10.0K
Q4
2N7002
RD1
RIL
CIH IS USED IN SOME
APPLICATIONS
TO FILTER NOISE/SPIKES FROM
CURRENT SENSE SIGNAL.
OP2 IS CURRENT SENSE AMP.
RIH, RIL, RSENSE DETERMINE
CURRENT SIGNAL SCALING.
1.00K
R1
10.0K
D5
1N4148
MMBT4401
Q6
Q1
Q2
Cout
L1
CP +
CN -
CHARGER OUTPUT
(TO BATTERY)
CONSULT MICROCHIP FOR GUIDANCE IN DEFINING
THESE COMPONENT VALUES.
COMPONENTS THAT DO NOT HAVE A NUMERICAL
VALUE ASSOCIATED WITH THEM ARE DEPENDENT
UPON THE VOLTAGE/CURRENT SPECIFICATIONS OF
THE PARTICULAR APPLICATION.
Q2 IS AN N-CHANNEL, LOGIC LEVEL DRIVE (VGS = 5V) MOSFET,
WITH AN INTEGRATED SCHOTTKY DIODE.
Q1 IS SELECTED FOR LOW Rdson, TO MINIMIZE CONDUCTION LOSSES
(SEPARATE MOSFET AND SCHOTTKY DEVICES CAN ALSO BE USED).
Q1 IS A P-CHANNEL MOSFET, SELECTED FOR AN OPTIMUM BALANCE
BETWEEN SWITCHING SPEED AND LOW Rdson.
RSENSE
Q3
Q3 -- REVERSE
CONDUCTION
BLOCKING SWITCH
TP
TN
THERMISTOR/ID
CONNECTIONS
FOR REVISION HISTORY, SEE 826216 CHANGE LOG
1.0M
PS200-BASED CHARGER REFERENCE DESIGN – SYNCHRONOUS BUCK TOPOLOGY
> HARDWARE CONFIGURED AS A CONSTANT-CURRENT LOOP, CONTROLLING PWM.
> FIRMWARE ALSO CONSTANTLY MEASURES VOLTAGE; WHEN VOLTAGE SETPOINT
REACHED, FIRMWARE DYNAMICALLY ADJUSTS CURRENT TO MAINTAIN CONSTANT
VOLTAGE.
> FIRMWARE SETS CURRENT LEVEL BY ADJUSTING PWM SIGNAL AT CTRLOUT.
4
4
CIN/COUT/L1/Q1/Q2:
SYNCHRONOUS-BUCK
POWER SECTION
Q8 RG2
MMBT4403
Q7
MMBT4401
RG1
CIN
IF SUPPLY VOLTAGE EXCEEDS VGS RATING OF Q1, A
ZENER DIODE CAN BE PLACED IN SERIES WITH THE DRAIN
OF Q4, TO LIMIT VGS OF Q1 TO A SAFE LEVEL.
RGx/RD1 VALUES ARE DEPENDENT UPON
CHARACTERISTICS OF Q1 AND Q2
DISCRETE MOSFET DRIVERS:
SUPPLY MUST BE
FUSED OR CURRENT LIMITED
Rt/Ct/D6 CONVERT PWM OUTPUT TO RAMP
WAVEFORM, WHICH IS FED BACK TO CP2
AND COMPARED TO ERROR AMP SIGNAL TO
DETERMINE PWM DUTY CYCLE.
Ct
D6
BAT54
Rt/Ct/D6
PWM RAMP
GENERATOR.
R19
10.0K
C23
POWER SUPPLY INPUT
THIS DESIGN IS A DUAL LOOP TOPOLOGY, WITH HARDWARE-BASED
CURRENT FEEDBACK CONTROL AND FIRMWARE-BASED VOLTAGE FEEDBACK
CONTROL.
+
OP2
-
IFBINB
PH2
CHGFBK
PH1
HVOUT
SHDN
PWM
C3
100 nF
U1
PS200
CP1
HARDWARE FEEDBACK TO PWM: OP1 IS
ERROR AMP. CCOMP1/CCOMP2/RCOMP ARE
LOOP COMPENSATION COMPONENTS.
RCOMP
CCOMP1
LOOPIN -
OP1
CTRLOUT
CTRLIN
VSS
VDD
RESET
VREF
C18
4.7 μF
ROVL
RVDD
4.7 μF
SN
+
SP
Figure 2-3 is an example of the PS200 in a synchronous buck charger for Lithium Ion batteries. The sense
resistor (RSENSE) is in a low side configuration.
10.0K
8
5
9
20
1
4
LED2
LED1
ROVP
VIN DIVIDER
RVDD:
POWER SUPPLY
DROPPING
RESISTOR
Lithium Application
R8
10.0K
R12
C9
470 nF
R5
10.0K
1.5K
R4
2
10
R10
1.5K
R2
1.5K
OVP DIVIDER
18
VOVP
3
VIN
17
SHDN
LOOPFBK
7
3
GRNLED
IFBOUT
14
1
2
1
2
3
5
6
7
8
5
6
7
8
DS21891B-page 12
1
2
3
FIGURE 2-3:
R11
2.5
REDLED
PS200
Refer to the Microchip web site (www.microchip.com)
for the latest Application Notes that reference this
theory of operation and component values.
SWITCH MODE CHARGER CIRCUIT EXAMPLE
© 2005 Microchip Technology Inc.
PS200
3.0
NICKEL CHEMISTRY
ALGORITHM
The PS200 algorithms for NiMH and NiCd chemistries
are currently being developed.
© 2005 Microchip Technology Inc.
4.0
LEAD ACID CHEMISTRY
ALGORITHM
The PS200 algorithms for lead acid chemistries are
currently being developed.
DS21891B-page 13
PS200
NOTES:
DS21891B-page 14
© 2005 Microchip Technology Inc.
PS200
5.0
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings†
Ambient temperature under bias................................................................................................................. -40 to +125°C
Storage temperature .............................................................................................................................. -65°C to +150°C
Voltage on VDD with respect to VSS ............................................................................................................ -0.3 to +6.5V
Voltage on RESET with respect to Vss ......................................................................................................-0.3 to +13.5V
Voltage on HVOUT with respect to Vss ........................................................................................................... 0V to +8.5V
Voltage on all other pins with respect to VSS ................................................................................. -0.3V to (VDD + 0.3V)
Total power dissipation(1) .....................................................................................................................................800 mW
Maximum current out of VSS pin ...........................................................................................................................300 mA
Maximum current into VDD pin ..............................................................................................................................250 mA
Input clamp current, IIK (VI < 0 or VI > VDD)...................................................................................................................... ±20 mA
Output clamp current, IOK (Vo < 0 or Vo >VDD)................................................................................................................ ±20 mA
Maximum output current sunk by any I/O pin...................................................................................................... 25 mA(2)
Maximum output current sourced by each Port .................................................................................................. 50 mA(2)
Note 1: Power dissipation is calculated as follows: PDIS = VDD x {IDD – ∑ IOH} + ∑ {(VDD – VOH) x IOH} + ∑(VOL x IOL).
2: Total source current must not exceed the shunt regulator capacity.
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above
those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
5.1
Reliability Targets
The device must be designed to target the following reliability specifications:
ESD:
±4000V HBM
±400V MM
all pins including VDD, VSS, RESET
Latch-up: ±400 mA @ 125°C
5.2
Design Targets
The AC/DC specifications included in the following sections are preliminary specifications that we intend to publish
at product introduction. As the product matures, we intend to expand the specifications. Therefore, design should
try and meet the following extended VDD/temperature targets:
1.
2.
Frequency of operation: DC – 4 MHz, VDD = 2.0V – 5.5V, -40°C to 125°C
Frequency of operation: DC – 20 MHz, VDD = 4.5V – 5.5V, -40°C to 125°C
© 2005 Microchip Technology Inc.
DS21891B-page 15
PS200
5.3
DC Characteristics
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C to +85°C
DC CHARACTERISTICS
Param
No.
Sym
Characteristic
Min
Typ†
Max
Units
Conditions
D001B
D001C
VDD
Supply Voltage
2.0
4.5
—
—
5.0
5.0
V
V
FOSC <= 4 MHz
FOSC > 4 MHz
D002
VDR
RAM Data Retention Voltage(1)
1.5*
—
—
V
Device in Sleep mode
D003
VPOR
VDD Start Voltage to ensure
internal Power-on Reset signal
—
VSS
—
V
See section on Power-on Reset
for details
D004
SVDD
VDD Rise Rate to ensure internal 0.05*
Power-on Reset signal
—
—
D005
VBOR
VDD Voltage required to initiate a
Brown-out Detect
—
2.1
—
V
D010S
IDD
Supply Current(2)
—
—
—
mA
VDD and current are constant due
to shunt regulator.
D020
IPD
Power-Down Current(3)
—
2.9
TBD
nA
VDD = 5.0V, WDT disabled
V/ms See section on Power-on Reset
for details
Legend: TBD = To Be Determined
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested
Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
2: The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave,
from rail to rail; all I/O pins tri-stated, pulled to VDD; RESET = VDD.
3: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is
measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD and VSS.
5.4
Shunt Regulator
TABLE 5-1:
SHUNT REGULATOR SPECIFICATIONS
Shunt Regulator Specifications
Characteristic
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C to +125°C
Sym
Min
Typ
Max
Units
Shunt Voltage
VSHUNT
4.75
—
5.25
Volts
Shunt Current
ISHUNT
4
—
50
mA
Shunt Resistance
RSHUNT
—
—
3
Ω
Settling Time*
TSETTLE
—
—
150
ns
To 1% of final value
Load Capacitance
CLOAD
0.01
—
10
μF
Bypass capacitor on
VDD pin
Regulator Operating Current
ΔISNT
—
180
—
μA
Includes band gap
reference current
*
Note:
Comments
These parameters are characterized but not tested.
The Δ current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
DS21891B-page 16
© 2005 Microchip Technology Inc.
PS200
5.5
DC Characteristics
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C to +85°C
DC CHARACTERISTICS
Param
No.
Sym
VIL
D032
Characteristic
Min
Typ†
Max
Units
VSS
—
0.2 VDD
V
4.5V ≤ VDD ≤ 5.5V,
otherwise entire range
0.8 VDD
—
VDD
V
4.5V ≤ VDD ≤ 5.5V,
otherwise entire range
Input Low Voltage
RESET
VIH
D042
Conditions
Input High Voltage
RESET
Input Leakage Current(2)
IIL
D060A
Analog inputs
—
±0.1
±1
μA
Vss ≤ VPIN ≤ VDD
D061
RESET(1)
—
±1
±5
μA
Vss ≤ VPIN ≤ VDD
—
—
0.6
V
IOL = 8.5 mA, VDD = 4.5V
VDD – 0.7
—
—
V
IOH = -3.0 mA, VDD = 4.5V
Output Low Voltage
D080
VOL
D090
VOH
Pins LED1, LED2, CTRLOUT,
CHGOUT, HVOUT
Output High Voltage
Pins LED1, LED2, CTRLOUT,
CHGOUT, HVOUT
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified levels
represent normal operating conditions. Higher leakage current may be measured at different input voltages.
2: Negative current is defined as current sourced by the pin.
5.6
DC Characteristics
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C to +85°C
DC CHARACTERISTICS
Param
No.
Sym
Characteristic
Min
Typ†
Max
Units
—
—
50*
pF
1M
10M
—
VMIN
—
5.5
V
—
5
6
ms
Conditions
Capacitive Loading Specs
on Output Pins
D101
CIO
Pins LED1, LED2, CTRLOUT,
CHGOUT, HVOUT
D120
ED
Endurance
D121
VDRW
VDD for read/write
D122
TDEW
Erase/Write cycle time
Data EEPROM Memory
E/W 25°C at 5V
VMIN = Minimum operating
voltage
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
© 2005 Microchip Technology Inc.
DS21891B-page 17
PS200
5.7
AC Characteristics: PS200 (Industrial)
FIGURE 5-1:
EXTERNAL CLOCK TIMING
Q4
Q1
Q2
Q3
Q4
Q1
FOSC
1
3
4
3
4
2
TABLE 5-2:
Param
No.
Sym
FOSC
1
TOSC
EXTERNAL CLOCK TIMING REQUIREMENTS
Characteristic
Oscillator Frequency(1)
Oscillator
Period(1)
Min
Typ†
Max
Units
Conditions
—
8
—
MHz
Using PS200 internal oscillator
—
125
—
ns
Using PS200 internal oscillator
† Data in “Typ” column is at 5 V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
DS21891B-page 18
© 2005 Microchip Technology Inc.
PS200
FIGURE 5-2:
CLKO AND I/O TIMING
Q1
Q4
Q2
Q3
FOSC
11
10
22
23
13
12
19
18
14
LED1, LED2,
CTRLOUT,
CHGOUT, HVOUT
(input)
15
17
LED1, LED2,
CTRLOUT,
CHGOUT, HVOUT
(output)
16
New Value
Old Value
20, 21
TABLE 5-3:
Param
No.
17
CLKO AND I/O TIMING REQUIREMENTS
Sym
TosH2ioV
Characteristic
FOSC ↑ (Q1 cycle) to Port Out Valid
FOSC ↑ (Q2 cycle) to Port Input
Invalid (I/O in hold time)
Min
Typ†
Max
Units
—
50
150*
ns
—
—
300
ns
100
—
—
ns
18
TosH2ioI
19
TioV2osH Port Input Valid to FOSC ↑
(I/O in setup time)
0
—
—
ns
20
TioR
Port Output Rise Time
—
10
40
ns
TioF
Port Output Fall Time
—
10
40
ns
21
Conditions
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0 V, 25°C unless otherwise stated.
© 2005 Microchip Technology Inc.
DS21891B-page 19
PS200
FIGURE 5-3:
RESET AND POWER-UP TIMER TIMING
VDD
RESET
30
Internal
POR
33
PWRT
Time-out
32
Internal
Reset
34
LED1, LED2,
CTRLOUT,
CHGOUT, HVOUT
(input)
FIGURE 5-4:
BROWN-OUT DETECT TIMING AND CHARACTERISTICS
VDD
BVDD
BVHY
BVDD + BVHY
35
Reset (due to BOR)
(Device not in Brown-out Detect)
DS21891B-page 20
(Device in Brown-out Detect)
64 ms Time-out
(if PWRTE)
© 2005 Microchip Technology Inc.
PS200
TABLE 5-4:
Param
No.
Sym
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT DETECT REQUIREMENTS
Characteristic
30
TMCL
RESET Pulse Width (low)
32
TOST
Oscillation Start-up Timer Period
33*
TPWRT
Power-up Timer Period
(4 x TWDT)
34
TIOZ
I/O High-Impedance from RESET
Low or Watchdog Timer Reset
BVDD
Brown-out Detect Voltage
BVHY
Brown-out Hysteresis
TBOR
Brown-out Detect Pulse Width
35
Min
Typ†
2
11
—
18
Max Units
—
24
Conditions
μs
ms
VDD = 5V, -40°C to +85°C
Extended temperature
—
1024 TOSC
—
—
TOSC = FOSC period
28*
TBD
64
TBD
132*
TBD
ms
ms
VDD = 5V, -40°C to +85°C
—
—
2.0
μs
2.175
V
2.025
25
100*
—
mV
—
μs
VDD ≤ BVDD (D005)
Legend: TBD = To Be Determined
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
TABLE 5-5:
Param
No.
F10
F14
Sym
FOSC
PRECISION INTERNAL OSCILLATOR PARAMETERS
Characteristic
Internal Calibrated
INTOSC Frequency(1)
TIOSCST Oscillator Wake-up from
Sleep Start-up Time*
Freq
Min
Tolerance
Typ†
Max
Units
Conditions
±1%
—
8.00
TBD
MHz VDD and Temperature (TBD)
±2%
—
8.00
TBD
MHz 2.5V ≤ VDD ≤ 5.5V
0°C ≤ TA ≤ +85°C
±5%
—
8.00
TBD
MHz 2.0V ≤ VDD ≤ 5.5V
-40°C ≤ TA ≤ +85°C (Ind.)
-40°C ≤ TA ≤ +125°C (Ext.)
—
—
TBD
TBD
μs
VDD = 2.0V, -40°C to +85°C
—
—
TBD
TBD
μs
VDD = 3.0V, -40°C to +85°C
—
—
TBD
TBD
μs
VDD = 5.0V, -40°C to +85°C
Legend: TBD = To Be Determined
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to
the device as possible. 0.1 μF and .01 μF values in parallel are recommended.
© 2005 Microchip Technology Inc.
DS21891B-page 21
PS200
FIGURE 5-5:
CTRLOUT TIMINGS (PIN 5)
CTRLOUT
TABLE 5-6:
Param
No.
Sym
CTRLOUT REQUIREMENTS
Characteristic
Min
Typ†
Max Units
53*
TccR
CTRLOUT Output Rise Time
—
25
50
ns
54*
TccF
CTRLOUT Output Fall Time
—
25
45
ns
Conditions
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
DS21891B-page 22
© 2005 Microchip Technology Inc.
PS200
5.8
Current Voltage Measurement Block
TABLE 5-7:
DC CHARACTERISTICS (PINS LOOPIN, CTRLIN, IFBINB, IFBINA INPUTS;
PIN IFBOUT OUTPUT)
Standard Operating Conditions (unless otherwise stated)
VDD = 2.7V to 5.5V, TA = 25°C, VCM = VDD/2,
RL = 100 kΩ to VDD/2 and VOUT ~ VDD/2
Operating Temperature -40°C to +85°C for Industrial
DC CHARACTERISTICS
Param
Sym
No.
Parameters
Min
Typ
Max
Units
Conditions
001
VOS
Input Offset Voltage
—
±5
—
mV
002
003
IB
IOS
Input Current and Impedance
Input Bias Current
Input Offset Bias Current
—
—
±2*
±1*
—
—
nA
pA
004
005
VCM
CMR
Common Mode
Common Mode Input Range
Common Mode Rejection
VSS
TBD
—
70
VDD – 1.4
—
V
dB
VDD = 5V
VCM = VDD/2, Frequency = DC
006A
006B
AOL
AOL
Open-Loop Gain
DC Open-Loop Gain
DC Open-Loop Gain
—
—
90
60
—
—
dB
dB
No load
Standard load
007
008
VOUT
ISC
Output
Output Voltage Swing
Output Short Circuit Current
VSS + 50
—
—
25
VDD – 50
TBD
mV
mA
TO VDD/2 (20 kΩ connected to VDD,
20 kΩ + 20 pF to VSS)
010
PSR
Power Supply
Power Supply Rejection
80
—
—
dB
Legend: TBD = To Be Determined
* These parameters are characterized but not tested.
TABLE 5-8:
AC CHARACTERISTICS (PINS LOOPIN, CTRLIN, IFBINB, IFBINA INPUTS;
PIN IFBOUT OUTPUT)
Standard Operating Conditions (unless otherwise stated)
VDD = 2.7V to 5.5V, VSS = GND, TA = 25°C, VCM = VDD/2,
RL = 100 kΩ to VDD/2 and VOUT = VDD/2
Operating Temperature -40°C to +85°C for Industrial
AC CHARACTERISTICS
Param
No.
Sym
Parameters
Min
Typ
Max
Units
Conditions
011
GBWP
Gain Bandwidth Product
—
3
—
MHz
VDD = 5V
012
TON
Turn-on Time
—
10
TBD
μs
VDD = 5V
013
ΘM
Phase Margin
—
60
—
014
SR
Slew Rate
2
TBD
—
degrees VDD = 5V
V/μs
VDD = 5V
Legend: TBD = To Be Determined
© 2005 Microchip Technology Inc.
DS21891B-page 23
PS200
TABLE 5-9:
COMPARATOR SPECIFICATIONS (PINS LOOPFBK, CHGFBK, SHDN, VOVP)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C ≤ TA ≤ +125°C
Comparator Specifications
Param
No.
Symbol
Characteristics
Min
Typ
Max
Units
Comments
C01
VOS
Input Offset Voltage
—
±2
±5
mV
C02
VCM
Input Common Mode Voltage
0
—
VDD – 1.5
V
C03
ILC
Input Leakage Current
C04
CMRR
Common Mode Rejection
Ratio
C05
TRT
Response Time(1)
*
Note 1:
These parameters are characterized but not tested.
Response time measured with one comparator input at (VDD – 1.5)/2, while the other input transitions from
VSS to VDD – 1.5V.
TABLE 5-10:
—
200*
nA
—
—
dB
—
—
—
—
20*
40*
ns
ns
Internal
Output to pin
COMPARATOR VOLTAGE REFERENCE (VREF) SPECIFICATIONS
Comparator Voltage Reference Specifications
Param
No.
—
+70*
Min
Typ
Max
Units
Resolution
—
—
VDD/24*
VDD/32
—
—
LSb
LSb
Low Range (VRR = 1)
High Range (VRR = 0)
CV02
Absolute Accuracy
—
—
—
—
±1/4*
±1/2*
LSb
LSb
Low Range (VRR = 1)
High Range (VRR = 0)
CV03
Unit Resistor Value (R)
—
2K*
—
Ω
—
—
10*
μs
CV01
Symbol
CVRES
CV04
*
Note 1:
Characteristics
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C ≤ TA ≤ +125°C
Settling Time
(1)
Comments
These parameters are characterized but not tested.
Settling time measured while VRR = 1 and VR<3:0> transitions from 0000 to 1111.
DS21891B-page 24
© 2005 Microchip Technology Inc.
PS200
TABLE 5-11:
Param
No.
A01
A/D CONVERTER CHARACTERISTICS
Sym
Characteristic
Resolution
NR
(1)
Min
Typ†
Max
Units
—
—
10 bits
bit
Conditions
A02
EABS
Total Absolute Error*
—
—
±1
LSb VREF = 5.0V
A03
EIL
Integral Error
—
—
±1
LSb VREF = 5.0V
A04
EDL
Differential Error
—
—
±1
LSb No missing codes to 10 bits,
VREF = 5.0V
A05
EFS
Full-Scale Range
2.2*
—
5.5*
A06
EOFF
Offset Error
—
—
±1
LSb VREF = 5.0V
A07
EGN
Gain Error
—
—
±1
LSb VREF = 5.0V
A10
—
Monotonicity
(2)
—
—
—
—
VDD + 0.3
V
guaranteed
(4)
V
2.2
2.5
—
Analog Input Voltage
VSS
—
VREF(5)
V
ZAIN
Recommended
Impedance of Analog
Voltage Source
—
—
10
kΩ
IREF
VREF Input Current*(3)
10
—
1000
μA
—
—
10
μA
A20
A20A
VREF
A25
VAIN
A30
A50
Reference Voltage
VSS ≤ VAIN ≤ VREF
Absolute minimum to ensure
10-bit accuracy
During VAIN acquisition.
Based on differential of VHOLD
to VAIN.
During A/D conversion cycle.
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Total Absolute Error includes Integral, Differential, Offset and Gain Errors.
2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
3: VREF current is from external VREF or VDD pin, whichever is selected as reference input.
4: Only limited when VDD is at or below 2.5V. If VDD is above 2.5V, VREF is allowed to go as low as 1.0V.
5: Analog input voltages are allowed up to VDD, however, the conversion accuracy is limited to VSS to VREF.
FIGURE 5-6:
A/D CONVERSION TIMING (NORMAL MODE)
1/2 TCY
134
131
Q4
130
A/D CLK
9
A/D DATA
8
7
6
3
OLD_DATA
ADRES
2
1
0
NEW_DATA
ADIF
GO
SAMPLE
DONE
132
SAMPLING STOPPED
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
© 2005 Microchip Technology Inc.
DS21891B-page 25
PS200
TABLE 5-12:
Param
No.
A/D CONVERSION REQUIREMENTS
Sym
Characteristic
Min
Typ†
Max
Units
1.6
—
—
μs
3.0*
—
—
μs
TOSC based, VREF full range
μs
ADCS<1:0> = 11 (RC mode)
At VDD = 2.5V
130*
TAD
A/D Clock Period
130*
TAD
A/D Internal RC
Oscillator Period
3.0*
6.0
9.0*
Conditions
TOSC based, VREF ≥ 2.5V
2.0*
4.0
6.0*
μs
At VDD = 5.0V
131*
TCNV
Conversion Time
(not including
acquisition time)(1)
—
11 TAD
—
TAD
Set GO bit to new data in
A/D Result register
132*
TACQ
Acquisition Time
—
11.5
—
μs
5*
—
—
μs
The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
1 mV @ 4.096V) from the last
sampled voltage (as stated on
CHOLD).
—
TOSC/2
—
—
If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
134*
Q4 to A/D Clock
Start
TGO
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRES register may be read on the following TCY cycle.
FIGURE 5-7:
A/D CONVERSION TIMING (SLEEP MODE)
134
131
Q4
130
A/D CLK
9
A/D DATA
8
7
6
OLD_DATA
ADRES
3
2
1
0
NEW_DATA
ADIF
GO
SAMPLE
DONE
132
SAMPLING STOPPED
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
DS21891B-page 26
© 2005 Microchip Technology Inc.
PS200
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
20-Lead PDIP
Example
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
YYWWNNN
20-Lead SOIC
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
PS200-I/P e3
0510017
Example
PS200/SO e3
0510017
YYWWNNN
20-Lead SSOP
XXXXXXXXXXX
XXXXXXXXXXX
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example
PS200/SS e3
0510017
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2005 Microchip Technology Inc.
DS21891B-page 27
PS200
6.2
Package Details
The following sections give the technical details of the
packages.
20-Lead Plastic Dual In-line (P) – 300 mil Body (PDIP)
E1
D
2
n
α
1
E
A2
A
L
c
A1
β
B1
eB
p
B
Units
Dimension Limits
n
p
MIN
INCHES*
NOM
20
.100
.155
.130
MAX
MILLIMETERS
NOM
20
2.54
3.56
3.94
2.92
3.30
0.38
7.49
7.87
6.10
6.35
26.04
26.24
3.05
3.30
0.20
0.29
1.40
1.52
0.36
0.46
7.87
9.40
5
10
5
10
MIN
Number of Pins
Pitch
Top to Seating Plane
A
.140
.170
Molded Package Thickness
A2
.115
.145
Base to Seating Plane
A1
.015
Shoulder to Shoulder Width
E
.295
.310
.325
Molded Package Width
E1
.240
.250
.260
Overall Length
D
1.025
1.033
1.040
Tip to Seating Plane
L
.120
.130
.140
c
Lead Thickness
.008
.012
.015
Upper Lead Width
B1
.055
.060
.065
Lower Lead Width
B
.014
.018
.022
Overall Row Spacing
§
eB
.310
.370
.430
α
Mold Draft Angle Top
5
10
15
β
Mold Draft Angle Bottom
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-019
DS21891B-page 28
MAX
4.32
3.68
8.26
6.60
26.42
3.56
0.38
1.65
0.56
10.92
15
15
© 2005 Microchip Technology Inc.
PS200
20-Lead Plastic Small Outline (SO) – Wide, 300 mil Body (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
A1
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.093
.088
.004
.394
.291
.496
.010
.016
0
.009
.014
0
0
INCHES*
NOM
20
.050
.099
.091
.008
.407
.295
.504
.020
.033
4
.011
.017
12
12
MAX
.104
.094
.012
.420
.299
.512
.029
.050
8
.013
.020
15
15
MILLIMETERS
NOM
20
1.27
2.36
2.50
2.24
2.31
0.10
0.20
10.01
10.34
7.39
7.49
12.60
12.80
0.25
0.50
0.41
0.84
0
4
0.23
0.28
0.36
0.42
0
12
0
12
MIN
MAX
2.64
2.39
0.30
10.67
7.59
13.00
0.74
1.27
8
0.33
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-013
Drawing No. C04-094
© 2005 Microchip Technology Inc.
DS21891B-page 29
PS200
20-Lead Plastic Shrink Small Outline (SS) – 209 mil Body, 5.30 mm (SSOP)
E
E1
p
D
B
2
1
n
c
A2
A
f
L
Units
Dimension Limits
n
p
MIN
A1
INCHES
NOM
20
.026
.069
.307
.209
.283
.030
4°
-
MAX
MILLIMETERS*
NOM
20
0.65
1.65
1.75
0.05
7.40
7.80
5.00
5.30
.295
7.20
0.55
0.75
0.09
0°
4°
0.22
-
MIN
Number of Pins
Pitch
Overall Height
A
.079
Molded Package Thickness
A2
.065
.073
Standoff
A1
.002
Overall Width
E
.291
.323
Molded Package Width
E1
.197
.220
Overall Length
D
.272
.289
Foot Length
L
.022
.037
c
Lead Thickness
.004
.010
f
Foot Angle
0°
8°
Lead Width
B
.009
.015
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions
shall not exceed .010" (0.254mm) per side.
MAX
2.00
1.85
8.20
5.60
7.50
0.95
0.25
8°
0.38
JEDEC Equivalent: MO-150
Drawing No. C04-072
DS21891B-page 30
Revised 11/03/03
© 2005 Microchip Technology Inc.
PS200
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
•
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the web site
at: http://support.microchip.com
In addition, there is a Development Systems
Information Line which lists the latest versions of
Microchip’s development systems software products.
This line also provides information on how customers
can receive currently available upgrade kits.
The Development
numbers are:
Systems
Information
Line
1-800-755-2345 – United States and most of Canada
1-480-792-7302 – Other International Locations
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.
© 2005 Microchip Technology Inc.
DS21891B-page 31
PS200
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: PS200
Y
N
Literature Number: DS21891B
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21891B-page 32
© 2005 Microchip Technology Inc.
PS200
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
/XX
XXX
Device
Temperature
Range
Package
Pattern
Examples:
a)
b)
c)
Device
PS200
Temperature Range
I
= -20°C to +85°C (Industrial)
Package
P
SO
SS
=
=
=
PS200-I/SO = Industrial Temperature, SOIC
package
PS200-I/SS = Industrial Temperature, SSOP
package
PS200-I/P = Industrial Temperature, PDIP
package
PDIP
SOIC
SSOP
© 2005 Microchip Technology Inc.
DS21891B-page 33
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
India - Bangalore
Tel: 91-80-2229-0061
Fax: 91-80-2229-0062
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
India - New Delhi
Tel: 91-11-5160-8631
Fax: 91-11-5160-8632
Austria - Weis
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark - Ballerup
Tel: 45-4450-2828
Fax: 45-4485-2829
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Tel: 86-28-8676-6200
Fax: 86-28-8676-6599
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Tel: 81-45-471- 6166
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Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
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Tel: 86-21-5407-5533
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Tel: 949-462-9523
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Fax: 650-961-0286
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
10/20/04
DS21891B-page 34
© 2005 Microchip Technology Inc.