SILAN SC3333

SC3333
ENERGY METERING IC WITH PULSE OUTPUT
DESCRIPTION
The SC3333 is a high accuracy electrical energy measurement IC
that can provides superior stability and accuracy over extremes in
environmental conditions and over time. The SC3333 does not exhibit
any creep when there is no load.
The SC3333 supplies average real power information on the low
frequency outputs F1 and F2. This logic outputs may be used to
directly drive an electromechanically counter or interface to an MCU.
SOP-16-225-1.27
The CF logic output gives instantaneous real power information. This
output is intended to be used for calibration purposes, or interfacing to
an MCU.
The SC3333 includes a power supply monitoring circuit on the VDD
supply pin. If the supply falls below 4V, the SC3333 will be reset and
F1, F2 will be set to logic high, CF will be set to logic low at the same ORDERING INFORMATION
time.
The SC3333 provides synchronous frequency output for auto-
Device
Package
SC3333
SOP-16-225-1.27
reading meter system. The CF logic output is synchronous with the F1
and F2 logic output to ensure the show value of the meter is
consonant with the real value.
FEATURES
* Single 5V supply, low power.
* On-chip power supply monitoring.
* On-chip reference with external overdrive capability.
* Supplies average real power on the frequency outputs F1 and F2, which can drive for electromechanical
counters directly.
* The high frequency output CF is intended for calibration and supplies instantaneous real power.
* Less than 0.1% error over a dynamic range of 500 to 1.
* On-chip creep protection (No load threshold).
* The logic output REVP can be used to indicate a potential miswiring or negative power.
* A PGA in the current channel make flexible to select the shunt and burden resistance.
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SC3333
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATING (Tamb=25°C, unless otherwise specified)
Characteristics
Symbol
Ratings
Unit
VDD
-0.3 ~ +7
V
AVIN
-6 ~ +6
V
Reference Input voltage to AGND
VREF
-0.3 ~ VDD+0.3
V
Digital Input Voltage to DGND
DVIN
-0.3 ~ VDD+0.3
V
DVOUT
-0.3 ~ VDD+0.3
V
PD
450
mW
Operating Temperature Range
TOPR
-40~ +85
°C
Storage Temperature
TSTG
-65~ +150
°C
Junction Temperature
TJ
+150
°C
VDD to AGND/DGND
Analog Input Voltage to AGND
V1P, V1N, V2P and V2N
Digital Output Voltage to DGND
Power Dissipation
ELECTRICAL CHARACTERISTICS (Tamb=25°C, unless otherwise specified)
Characteristics
Symbol
Test conditions
Min.
Typ.
Max.
Unit
4.75
--
5.25
V
Power Supply
Power Supply
VDD
5V±5%
Analog Input Current
AIDD
(2mA) TYP.
--
--
3
Digital Input Current
DIDD
(1.5mA) TYP.
--
--
2.5
Over a dynamic range 500 to 1
--
0.1
--
%
Over a dynamic range 500 to 1
--
0.1
--
%
mA
ACCURACY
Measurement Gain=1
1
Error on
Channel 1
Gain=16
EM
(To be continued)
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SC3333
(Continued)
Characteristics
Phase Error
1
Symbol
Test conditions
V1 Phase Lead
Between
37°
Channels
V1 Phase Lag 60°
EP
Output Frequency Rejection (AC)
CFA
Output Frequency Rejection (DC)
CFD
--
V1=100mV, V2=100mV,
SET=0
V1=100mV, V2=100mV,
VDD=5V±250mV
Min.
Typ.
Max.
Unit
--
--
±0.1
°
--
--
±0.1
°
--
0.01
--
%
--
0.01
--
%
--
--
±1
V
400
--
--
kΩ
--
14
--
kHz
--
--
15
mV
ANALOG INPUTS
Maximum Signal Levels
Input Impedance (DC)
Bandwidth (-3dB)
1,2
ADC Offset Error
LEVS
V1P, VIN V2N and V2P to AGND
IMIN
CLKIN=3.58MHz
BW
CLKIN/256, CLKIN=3.58MHz
EADC
EG
V1=470mV, V2=660mV
--
±4
--
%
EGM
External 2.5V reference
--
±0.2
--
%
REFIN/OUT Input Voltage Range
VINR
2.5V±8%
2.3
--
2.7
V
Input Impedance
IMIN
--
3.7
--
--
kΩ
Input Capacitance
CIN
--
--
--
10
pF
--
--
200
mV
--
30
60
ppm/°C
1
--
4
MHz
1
Gain Error
1
Gain Error Match
REFERENCE INPUT
ON-CHIP REFERENCE
Reference Error
ER
Temperature Coefficient
TC
Nominal 2.5V
CLKIN
Input Clock Frequency
CLKIN
Note all specifications for
CLKIN of 3.58MHz
LOGIC INPUTS3
Input High Voltage
VINH
VDD=5V±5%
2.4
--
--
V
Input Low Voltage
VINL
VDD=5V±5%
--
--
0.8
V
Typically 10nA, VIN=0V to VDD
--
--
±3
μA
--
--
10
pF
4.5
--
--
V
Input Current
IIN
Input Capacitance
CIN
LOGIC
OUTPUTS3
Output High
F1 and F2
Voltage
Output Low
Voltage
Output High
CF and REVP
Voltage
Output Low
Voltage
VOH
ISOURCE=10mA,VDD=5V
VOL
ISINK=10mA, VDD=5V
--
--
0.5
V
VOH
ISOURCE=5mA,VDD=5V
4
--
--
V
VOL
ISINK=5mA, VDD=5V
--
--
0.5
V
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SC3333
PIN CONFIGURATION
1
16 F1
V1P
2
15 F2
V1N
3
14 CF
V2N
4
V2P
5
RESET
6
11 CLKOUT
REFIN/OUT
7
10 CLKIN
AGND
8
9
SC3333
VDD
13 DGND
12 REVP
SET
PIN DESCRIPTION
Pin No.
Symbol
Description
1
VDD
Power Supply.
2
V1P
Positive and Negative Inputs for Channel 1 (Current Channel). Channel 1 has a
3
V1N
these pins is ±1V with respect to AGND.
4
V2N
Negative and Positive Inputs for Channel 2 (Voltage Channel). The maximum
5
V2P
6
RESET
7
REFIN/OUT
8
AGND
9
SET
10
CLKIN
11
CLKOUT
12
REVP
13
DGND
14
CF
Calibration Frequency Logic Output..
15
F2
Low Frequency Logic Outputs. They can be used to directly drive a stepper motor
16
F1
or electromechanical impulse counter.
PGA and the gain selections are outlined in Table I. The maximum signal level at
differential input voltage is ±660mV for specified operation. The maximum signal
level at these pins is ±1V with respect to AGND.
Reset Pin for the SC3333. A logic low is valid.
Reference voltage input/output pin.
Analog ground.
Channel 1 gain select pin. See table 1.
3.58MHZ crystal oscillator input pin.
3.58MHZ crystal oscillator output pin.
State indication pin. While negative power or a potential miswriting occurs, it will be
set to logic high.
Digital ground.
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SC3333
TIMIING CHARACTERISTICS1,2
(VDD=5V±5%, AGND=DGND=0V, On-chip Reference, CLKIN=3.58MHZ, TMIN to TMAX=-40°C~+85°C.)
Parameter
3
Test Condition
t1
F1 and F2 Pulse-width
t2
F1 and F2 Pulse Period.
t3
Time Between F1 Falling Edge and F2 Falling Edge
3
t4
Test Data
Units
275
ms
TBD
1/2 t2
sec
90
ms
TBD
sec
CLKIN/4
sec
CF Pulse-width
t5
CF Pulse Period.
t6
Minimum Time Between F1 and F2 Pulse
sec
NOTE: 1. Sample tested during initial release and after any redesign or process change that may after this
parameter.
2. See the following figure.
3. The pulse-widths of F1, F2 and CF are not fixed for higher output frequencies.
Timing Diagram for Frequency outputs
Timing Diagram for Frequency Outputs shows a timing diagram for the various frequency outputs of the
SC3333. The low frequency outputs, F1 and F2 can drive electromechanical counters and two phase stepper
motors directly. As the figure show, the F1 and F2 outputs provide two alternating low going pulses. The pulse
width (t1) is set at 275ms and the time between the falling edges of F1 and F2 (t3) is approximately half the
period of F1 (t2). If however the period of F1 and F2 falls below 550 ms (1.81Hz) the pulse width of F1 and F2 is
set to half of their period. The frequency of F1 and F2 corresponds to the input voltages, and F=
2
(13.6*V1*V2*G)/ VREF ,The values of G can be set by consumers, and the selection of G please refer to the
table I , V1 and V2 are the rms value of the two inputs, VREF is the voltage of reference, whose value is 2.5+0.2v
when the internal bandgap reference of SC3333 is valid.
The high frequency output, CF is intended for calibration and supplies instantaneous real power. CF produces
a 90ms wide active high pulse (t4) at a frequency proportional to active power. As in the case of F1 and F2, if the
period of CF (t5) falls below 180ms, the CF pulse-width is set to half the period.
APPENDIX
Table I. gain selection for channel 1
SET
Gain
Maximum Differential Signal
0
1
±470mV
1
16
±30mV
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SC3333
TYPICAL APPLICATION CIRCUIT
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SC3333
PACKAGE OUTLINE
3.9±0.3
5.72±0.25
UNIT: mm
6.0±0.4
SOP-16-225-1.27
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against
electrostatic discharge but they can be damaged if the following precautions are not taken:
• Persons at a work bench should be earthed via a wrist strap.
• Equipment cases should be earthed.
• All tools used during assembly, including soldering tools and solder baths, must be earthed.
• MOS devices should be packed for dispatch in antistatic/conductive containers.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.1
2008.04.29
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