CY2318BNZ 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs Features Functional Description • One input to 18 output buffer/driver • Supports up to four SDRAM DIMMs • Two additional outputs for feedback • SMBus interface for individual output control • Low skew outputs (< 200 ps) • Up to 100 MHz operation for Industrial temperatures • Up to 133 MHz operation for Commercial temperatures The CY2318BNZ is a 3.3V buffer designed to distribute high-speed clocks in PC applications. The part has 18 outputs, 16 of which can be used to drive up to four SDRAM DIMMs, and the remaining can be used for external feedback to a PLL. The device operates at 3.3V and outputs can run up to 100 MHz, thus making it compatible with Pentium II® processors. The CY2318BNZ can be used in conjunction with the CY2280, CY2281, CY2282 or similar clock synthesizer for a complete Pentium II motherboard solution. The CY2318BNZ also includes an SMBus interface which can enable or disable each output clock. On power-up, all output clocks are enabled (internal pull up). A separate Output Enable pin facilitates testing on ATE. • Dedicated OE pin for testing • Space-saving 48-pin SSOP package • 3.3V operation Block Diagram Pin Configuration SSOP Top View NC NC VDD SDRAM0 SDRAM1 VSS VDD SDRAM2 SDRAM3 VSS BUF_IN VDD SDRAM4 SDRAM5 VSS VDD SDRAM6 SDRAM7 VSS VDD SDRAM16 VSS VDDIIC SDATA BUF_IN SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDATA SMBus Decoding SDRAM9 SDRAM10 SDRAM11 SCLOCK SDRAM12 SDRAM13 SDRAM14 SDRAM15 SDRAM16 SDRAM17 OE 1 2 48 47 3 4 46 45 5 6 44 43 7 42 8 9 10 41 40 39 11 38 12 37 13 14 36 35 15 16 34 33 17 18 32 31 19 30 20 21 22 29 28 27 23 26 24 25 NC NC VDD SDRAM15 SDRAM14 VSS VDD SDRAM13 SDRAM12 VSS OE VDD SDRAM11 SDRAM10 VSS VDD SDRAM9 SDRAM8 VSS VDD SDRAM17 VSS VSSIIC SCLOCK Pentium II is a registered trademark of Intel Corporation. Cypress Semiconductor Corporation Document #: 38-07217 Rev. ** • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised December 4, 2001 CY2318BNZ Pin Summary Name Pins Description VDD 3, 7, 12, 16, 20, 29, 33, 37, 42, 46 3.3V Digital voltage supply VSS 6, 10, 15, 19, 22, 27, 30, 34, 39, 43 Ground VDDIIC 23 SMBus Voltage supply VSSIIC 26 Ground for SMBus BUF_IN 11 Input clock (5V tolerant) OE 38 Output Enable (active HIGH), Three-state outputs when LOW[1] SDATA 24 SMBus data input[1] SCLK 25 SMBus clock input[1] SDRAM [0–3] 4, 5, 8, 9 SDRAM byte 0 clock outputs SDRAM [4–7] 13, 14, 17, 18 SDRAM byte 1 clock outputs SDRAM [8–11] 31, 32, 35, 36 SDRAM byte 2 clock outputs SDRAM [12–15] 40, 41, 44, 45 SDRAM byte 3 clock outputs SDRAM [16–17] 21, 28 SDRAM clock outputs usable for feedback N/C 1, 2, 47, 48 Reserved for future modifications, do not connect in system Note: 1. Internal pull-up resistor to VDD (value > 100 kohms). Device Functionality OE SDRAM [0–17] 0 Hi-Z 1 1 x BUF_IN Document #: 38-07217 Rev. ** Page 2 of 8 CY2318BNZ Serial Configuration Map • The Serial bits will be read by the clock driver in the following order: Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0 Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0 . . Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0 • Reserved and unused bits should be programmed to “0”. • SMBus Address for the CY2318BNZ is: Byte 1: SDRAM Active/Inactive Register (1 = Active, 0 = Inactive), Default = Active Bit Pin # Description Bit 7 45 SDRAM15 (Active/Inactive) Bit 6 44 SDRAM14 (Active/Inactive) Bit 5 41 SDRAM13 (Active/Inactive) Bit 4 40 SDRAM12 (Active/Inactive) Bit 3 36 SDRAM11 (Active/Inactive) Bit 2 35 SDRAM10 (Active/Inactive) Bit 1 32 SDRAM9 (Active/Inactive) Bit 0 31 SDRAM8 (Active/Inactive) • • A6 A5 A4 A3 A2 A1 A0 R/W 1 1 0 1 0 0 1 ---- • • Byte 0:SDRAM Active/Inactive Register (1 = Active, 0 = Inactive), Default = Active Bit Pin # Byte 2: SDRAM Active/Inactive Register (1 = Active, 0 = Inactive), Default = Active Bit Description Pin # Description Bit 7 28 SDRAM17 (Active/Inactive) 21 SDRAM16 (Active/Inactive) Bit 7 18 SDRAM7 (Active/Inactive) Bit 6 Bit 6 17 SDRAM6 (Active/Inactive) Bit 5 -- Reserved, drive to 0 Bit 5 14 SDRAM5 (Active/Inactive) Bit 4 -- Reserved, drive to 0 Bit 4 13 SDRAM4 (Active/Inactive) Bit 3 -- Reserved, drive to 0 Bit 3 9 SDRAM3 (Active/Inactive) Bit 2 -- Reserved, drive to 0 Bit 2 8 SDRAM2 (Active/Inactive) Bit 1 -- Reserved, drive to 0 Bit 1 5 SDRAM1 (Active/Inactive) Bit 0 -- Reserved, drive to 0 Bit 0 4 SDRAM0 (Active/Inactive) Maximum Ratings Supply Voltage to Ground Potential ..................–0.5 to +7.0V DC Input Voltage (except BUF_IN) .......... –0.5V to VDD + 0.5 DC Input Voltage (BUF_IN).............................. –0.5V to 7.0V Storage Temperature .................................–65°C to +150°C Static Discharge Voltage (per MIL-STD-883, Method 3015)..............................>2000V Ambient Temperature under BIAS ..............–55°C to +125°C Parameter Absolute Maximum Ratings Stresses greater than those listed in this table may cause permanent damage to the device. These represent a stress rating only. Operation of the device at these or any other conditions above those specified in the operating sections of this specification is not implied. Maximum conditions for extended periods may affect reliability. Description Rating Unit V VDD, VIN Voltage on Any Pin with Respect to GND –0.5 to +7.0 –65 to +150 °C 0 to +70 °C –55 to +125 °C TSTG Storage Temperature TA Operating Temperature TB Ambient Temperature under Bias Operating Conditions Parameter Description Min. Max. Unit 3.135 3.465 V VDD, VDDIIC Supply Voltage TA Operating Temperature (Ambient Temperature) –40 85 °C CL Load Capacitance 20 30 pF CIN Input Capacitance 7 pF Document #: 38-07217 Rev. ** Page 3 of 8 CY2318BNZ DC Electrical Characteristics: TA = -40°C to +85°C, VDDQ3 = 3.3V±5% Parameter Description Test Condition/ Comments Min Typ Max Unit 140 165 200 mA IDD 3.3V Supply Current BUF_IN = 64 MHz IDD Tristate 3.3V Supply Current in Three-state BUF_IN = 100 MHz 5 mA Logic Inputs (BUF_IN, OE, SCLOCK, SDATA) VIL Input Low Voltage GND–0.3 0.8 V VIH Input High Voltage 2.0 VDDQ3 + 0.5 V IILEAK Input Leakage Current, BUF_IN –5 +5 µA –20 +5 µA 50 mV IILEAK [2] Input Leakage Current Logic Outputs (SDRAM0:17)[3] VOL Output Low Voltage IOL = 1 mA VOH Output High Voltage IOH = –1 mA 3.1 IOL Output Low Current VOL = 1.5V 70 110 185 mA IOH Output High Current VOH = 1.5V 65 100 160 mA V Pin Capacitance/Inductance CIN Input Pin Capacitance (Except BUF_IN) 5 pF COUT Output Pin Capacitance 6 pF LIN Input Pin Inductance 7 nH Document #: 38-07217 Rev. ** Page 4 of 8 CY2318BNZ AC Electrical Characteristics: TA = –40°C to +85°C, VDDQ3 = 3.3V±5% (Lump Capacitance Test Load = 30 pF) Parameter Description Test Condition Min Typ Max Unit 0 133 MHz fIN Input Frequency Commercial Temperature Range tR Output Rise Edge Rate Measured from 0.4V to 2.4V 1.5 4.0 V/ns tF Output Fall Edge Rate Measured from 2.4V to 0.4V 1.5 4.0 V/ns tSR Output Skew, Rising Edges 200 ps tSF Output Skew, Falling Edges 200 ps tEN Output Enable Time 1.0 8.0 ns tDIS Output Disable Time 1.0 8.0 ns tPR Rising Edge Propagation Delay 3.0 3.85 5.0 ns tPF Falling Edge Propagation Delay 3.0 3.85 5.0 ns tD Duty Cycle 60 % Zo AC Output Impedance Measured at 1.5V 50 15 Ω Notes: 2. OE, SCLOCK, and SDATA logic pins have a 250-kΩ internal pull-up resistor (not CMOS level). 3. Outputs loaded by 6" 60Ω transmission lines with 20-pF capacitors. Test Circuit VDD 0.1 µF OUTPUTS CLK out CLOAD GND Document #: 38-07217 Rev. ** Page 5 of 8 CY2318BNZ Application Circuit Rs CPUCLK BUF_IN PCICLK USBCLK REF APIC Rs SDATA SDATA SCLK SDRAM ( 0-12) SDRAM ( 0-12) SCLK V DD 3.3V Ct V DD * CY2280 48 PIN SSOP (or CY2281 or CY2282) Cd 0.1uF V SS CY2313 28 PIN SOIC CY2313A: 28-PIN SOIC * THIS FREQUENCY SYNTHESIZER IS USED TO GENERATE CPU, PCI, USB, REF, AND APIC CLOCKS. Cd = DECOUP LING CAPACITOR S Ct = OPTIONAL EMI-R EDUCING CAP ACI TORS Rs = SERIES TERMINATING RESISTORS Ordering Information Ordering Code Package Name Package Type Operating Range CY2318BNZPVI-11 O48 48-Pin SSOP Industrial (–40°C to 85°C) CY2318BNZPVC-11 O48 48-Pin SSOP Commercial (0°C to 70°C) Package Diagram Document #: 38-07217 Rev. ** Page 6 of 8 CY2318BNZ 48-Lead Shrunk Small Outline Package O48 51-85061-B Document #: 38-07217 Rev. ** Page 7 of 8 © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY2318BNZ Revision History Document Title: CY2318BNZ 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs Document Number: 38-07217 REV. ECN NO. Issue Date Orig. of Change ** 111855 12/09/01 DSG Document #: 38-07217 Rev. ** Description of Change Change from Spec number: 38-01091 to 38-07217 Page 8 of 8