74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 02 — 3 April 2008 Product data sheet 1. General description The 74AUP1G18 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The 74AUP1G18 buffers the data on input pin (A) and passes it either to output 1Y or 2Y, depending on whether the state of the select input pin (S) is LOW or HIGH. 2. Features n Wide supply voltage range from 0.8 V to 3.6 V n High noise immunity n Complies with JEDEC standards: u JESD8-12 (0.8 V to 1.3 V) u JESD8-11 (0.9 V to 1.65 V) u JESD8-7 (1.2 V to 1.95 V) u JESD8-5 (1.8 V to 2.7 V) u JESD8-B (2.7 V to 3.6 V) n ESD protection: u HBM JESD22-A114E Class 3A exceeds 5000 V u MM JESD22-A115-A exceeds 200 V u CDM JESD22-C101C exceeds 1000 V n Low static power consumption; ICC = 0.9 µA (maximum) n Latch-up performance exceeds 100 mA per JESD 78 Class II n Inputs accept voltages up to 3.6 V n Low noise overshoot and undershoot < 10 % of VCC n IOFF circuitry provides partial Power-down mode operation n Multiple package options n Specified from −40 °C to +85 °C and −40 °C to +125 °C 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G18GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74AUP1G18GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 × 1.45 × 0.5 mm 74AUP1G18GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1 × 1 × 0.5 mm 4. Marking Table 2. Marking Type number Marking code 74AUP1G18GW pW 74AUP1G18GM pW 74AUP1G18GF pW 5. Functional diagram 1Y 1 3 6 S A 2Y 4 mnb088 Fig 1. Logic symbol 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 2 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 6. Pinning information 6.1 Pinning 74AUP1G18 74AUP1G18 S 1 6 S 1 6 1Y GND 2 5 VCC 1Y GND 2 5 VCC A 3 4 2Y A 3 4 2Y 74AUP1G18 S 1 6 1Y GND 2 5 VCC A 3 4 2Y 001aad869 001aad870 Transparent top view Transparent top view 001aae822 Fig 2. Pin configuration SOT363 (SC-88) Fig 3. Pin configuration SOT886 (XSON6) Fig 4. Pin configuration SOT891 (XSON6) 6.2 Pin description Table 3. Pin description Symbol Pin Description S 1 data select GND 2 ground (0 V) A 3 data input 2Y 4 data output VCC 5 supply voltage 1Y 6 data output 7. Functional description Table 4. Function table[1] Input Output S A 1Y 2Y L L L Z L H H Z H L Z L H H Z H [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 3 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions IIK input clamping current VI input voltage VI < 0 V IOK output clamping current VO > VCC or VO < 0 V [1] VO output voltage Active mode and Power-down mode VO = 0 V to VCC [1] Min Max Unit −0.5 +4.6 V −50 - mA −0.5 +4.6 V - ±50 mA −0.5 +4.6 V IO output current - ±20 mA ICC supply current - 50 mA IGND ground current −50 - mA Tstg storage temperature −65 +150 °C - 250 mW total power dissipation Ptot Tamb = −40 °C to +125 °C [2] [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SC-88 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature ∆t/∆V input transition rise and fall rate Conditions Max Unit 0.8 3.6 V 0 3.6 V Active mode 0 VCC V Power-down mode; VCC = 0 V 0 3.6 V −40 +125 °C 0 200 ns/V VCC = 0.8 V to 3.6 V 74AUP1G18_2 Product data sheet Min © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 4 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 0.8 V 0.70 × VCC - - V VCC = 0.9 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30 × VCC V VCC = 0.9 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V IO = −20 µA; VCC = 0.8 V to 3.6 V VCC − 0.1 - - V IO = −1.1 mA; VCC = 1.1 V 0.75 × VCC - - V IO = −1.7 mA; VCC = 1.4 V 1.11 - V VI = VIH or VIL - IO = −1.9 mA; VCC = 1.65 V 1.32 - - V IO = −2.3 mA; VCC = 2.3 V 2.05 - - V IO = −3.1 mA; VCC = 2.3 V 1.9 - - V IO = −2.7 mA; VCC = 3.0 V 2.72 - - V IO = −4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 µA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3 × VCC V VI = VIH or VIL IO = 1.7 mA; VCC = 1.4 V - - 0.31 V IO = 1.9 mA; VCC = 1.65 V - - 0.31 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 µA IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 µA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.2 µA ∆IOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.2 µA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.5 µA ∆ICC additional supply current VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V - - 40 µA CI input capacitance VCC = 0 V to 3.6 V; VI = GND or VCC - 0.8 - pF CO output capacitance VO = GND; VCC = 0 V - 1.7 - pF 74AUP1G18_2 Product data sheet [1] © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 5 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min VCC = 0.8 V Typ Max Unit 0.70 × VCC - - V VCC = 0.9 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30 × VCC V VCC = 0.9 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V Tamb = −40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V VCC − 0.1 - - V IO = −1.1 mA; VCC = 1.1 V 0.7 × VCC - - V IO = −1.7 mA; VCC = 1.4 V 1.03 - - V IO = −1.9 mA; VCC = 1.65 V 1.30 - - V IO = −2.3 mA; VCC = 2.3 V 1.97 - - V IO = −3.1 mA; VCC = 2.3 V 1.85 - - V IO = −2.7 mA; VCC = 3.0 V 2.67 - - V IO = −4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 µA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3 × VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.37 V VI = VIH or VIL IO = 1.9 mA; VCC = 1.65 V - - 0.35 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V - - 0.45 V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V IO = 4.0 mA; VCC = 3.0 V - - ±0.5 µA IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 µA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 µA ∆IOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.6 µA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.9 µA ∆ICC additional supply current VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V - - 50 µA 74AUP1G18_2 Product data sheet [1] © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 6 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min VCC = 0.8 V Typ Max Unit 0.75 × VCC - - V VCC = 0.9 V to 1.95 V 0.70 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.25 × VCC V VCC = 0.9 V to 1.95 V - - 0.30 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V Tamb = −40 °C to +125 °C HIGH-level input voltage VIH LOW-level input voltage VIL VOH HIGH-level output voltage LOW-level output voltage VOL VI = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V VCC − 0.11 - - V IO = −1.1 mA; VCC = 1.1 V 0.6 × VCC - - V IO = −1.7 mA; VCC = 1.4 V 0.93 - - V IO = −1.9 mA; VCC = 1.65 V 1.17 - - V IO = −2.3 mA; VCC = 2.3 V 1.77 - - V IO = −3.1 mA; VCC = 2.3 V 1.67 - - V IO = −2.7 mA; VCC = 3.0 V 2.40 - - V IO = −4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 µA; VCC = 0.8 V to 3.6 V - - 0.11 V IO = 1.1 mA; VCC = 1.1 V - - 0.33 × VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.41 VI = VIH or VIL V IO = 1.9 mA; VCC = 1.65 V - - 0.39 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V - - 0.50 V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V IO = 4.0 mA; VCC = 3.0 V - - ±0.75 µA IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 µA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 µA ∆IOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.75 µA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 1.4 µA ∆ICC additional supply current VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V - - 75 µA [1] [1] One input at VCC − 0.6 V, other input at VCC or GND. 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 7 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter 25 °C Conditions −40 °C to +125 °C Unit Min Typ[1] Max Min Max (85 °C) Max (125 °C) - 20.4 - - - - VCC = 1.1 V to 1.3 V 2.7 5.6 10.6 2.4 10.7 10.7 ns VCC = 1.4 V to 1.6 V 2.4 3.9 6.1 2.2 6.5 6.7 ns VCC = 1.65 V to 1.95 V 1.8 3.1 4.7 1.6 5.3 5.6 ns VCC = 2.3 V to 2.7 V 1.6 2.4 3.6 1.4 4.0 4.2 ns 1.4 2.2 3.1 1.2 3.4 3.5 ns CL = 5 pF tpd [2] propagation delay A to nY; see Figure 5 VCC = 0.8 V VCC = 3.0 V to 3.6 V ten enable time [3] S to nY; see Figure 6 VCC = 0.8 V disable time - 46.1 - - - - ns VCC = 1.1 V to 1.3 V 3.1 5.6 9.7 2.9 10.1 11.1 ns VCC = 1.4 V to 1.6 V 2.5 4.0 6.2 2.2 6.6 7.3 ns VCC = 1.65 V to 1.95 V 2.1 3.3 5.1 1.8 5.5 6.1 ns VCC = 2.3 V to 2.7 V 1.7 2.7 3.9 1.4 4.2 4.6 ns 1.5 2.4 3.5 1.2 3.7 4.1 ns - 12.6 - - - - ns VCC = 1.1 V to 1.3 V 3.0 4.7 7.5 2.9 7.9 8.7 ns VCC = 1.4 V to 1.6 V 2.3 3.5 5.2 2.2 5.5 6.1 ns VCC = 3.0 V to 3.6 V tdis ns [4] S to nY; see Figure 6 VCC = 0.8 V VCC = 1.65 V to 1.95 V 2.3 3.4 4.8 2.1 5.1 5.6 ns VCC = 2.3 V to 2.7 V 1.7 2.5 3.6 1.5 3.9 4.3 ns VCC = 3.0 V to 3.6 V 2.0 2.9 3.8 1.8 4.1 4.5 ns - 23.9 - - - - ns VCC = 1.1 V to 1.3 V 2.9 6.4 12.2 2.9 12.3 12.3 ns VCC = 1.4 V to 1.6 V 2.7 4.5 7.1 2.4 7.6 7.9 ns CL = 10 pF tpd [2] propagation delay A to nY; see Figure 5 VCC = 0.8 V VCC = 1.65 V to 1.95 V 2.3 3.7 5.5 2.1 6.0 6.3 ns VCC = 2.3 V to 2.7 V 1.9 3.0 4.2 1.8 4.6 4.9 ns VCC = 3.0 V to 3.6 V 1.8 2.7 3.9 1.6 4.1 4.3 ns 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 8 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter ten enable time 25 °C Conditions Max Min Max (85 °C) Max (125 °C) - 50.1 - - - - ns VCC = 1.1 V to 1.3 V 3.6 6.5 11.1 3.3 11.6 12.8 ns VCC = 1.4 V to 1.6 V 2.9 4.6 7.0 2.6 7.6 8.4 ns [3] S to nY; see Figure 6 VCC = 1.65 V to 1.95 V 2.5 3.9 5.8 2.2 6.3 6.9 ns VCC = 2.3 V to 2.7 V 2.1 3.2 4.6 1.7 4.9 5.4 ns 2.0 2.9 4.2 1.6 4.4 4.8 ns VCC = 3.0 V to 3.6 V disable time Unit Min VCC = 0.8 V tdis −40 °C to +125 °C Typ[1] [4] S to nY; see Figure 6 VCC = 0.8 V - 14.5 - - - - ns VCC = 1.1 V to 1.3 V 4.1 5.8 8.7 3.9 9.1 10.0 ns VCC = 1.4 V to 1.6 V 3.2 4.4 6.1 3.0 6.5 7.2 ns VCC = 1.65 V to 1.95 V 3.3 4.5 6.0 3.2 6.3 6.9 ns VCC = 2.3 V to 2.7 V 2.4 3.3 4.4 2.2 4.7 5.2 ns VCC = 3.0 V to 3.6 V 3.1 4.1 5.2 3.0 5.5 6.1 ns CL = 15 pF tpd [2] propagation delay A to nY; see Figure 5 VCC = 0.8 V ten enable time - 27.4 - VCC = 1.1 V to 1.3 V 3.4 7.2 13.7 3.2 13.9 13.9 ns VCC = 1.4 V to 1.6 V 3.2 5.0 7.9 2.8 8.7 9.1 ns VCC = 1.65 V to 1.95 V 2.5 4.2 6.3 2.4 7.0 7.4 ns VCC = 2.3 V to 2.7 V 2.3 3.4 4.9 2.2 5.3 5.7 ns VCC = 3.0 V to 3.6 V 2.2 3.2 4.4 1.9 4.8 5.0 ns - 53.9 - VCC = 1.1 V to 1.3 V 4.1 7.3 12.4 3.6 12.9 14.2 ns VCC = 1.4 V to 1.6 V 3.3 5.2 7.8 2.9 8.4 9.2 ns VCC = 1.65 V to 1.95 V 2.9 4.4 6.4 2.5 7.0 7.7 ns VCC = 2.3 V to 2.7 V 2.5 3.6 5.2 2.1 5.5 6.1 ns 2.3 3.4 4.8 1.9 4.9 5.4 ns - 16.3 - VCC = 1.1 V to 1.3 V 5.1 6.9 10.0 4.9 10.4 11.4 ns VCC = 1.4 V to 1.6 V 4.0 5.3 7.1 3.8 7.4 8.1 ns VCC = 1.65 V to 1.95 V 4.3 5.6 7.3 4.2 7.6 8.4 ns VCC = 2.3 V to 2.7 V 3.1 4.1 5.3 3.0 5.6 6.2 ns VCC = 3.0 V to 3.6 V 4.2 5.3 6.6 4.1 6.9 7.6 ns [3] S to nY; see Figure 6 VCC = 0.8 V VCC = 3.0 V to 3.6 V tdis disable time ns [4] S to nY; see Figure 6 VCC = 0.8 V 74AUP1G18_2 Product data sheet ns ns © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 9 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter 25 °C Conditions −40 °C to +125 °C Unit Min Typ[1] Max Min Max (85 °C) Max (125 °C) - 37.8 - - - - ns VCC = 1.1 V to 1.3 V 4.1 9.5 18.0 4.1 18.5 18.9 ns VCC = 1.4 V to 1.6 V 3.7 6.6 10.4 3.8 11.5 12.1 ns VCC = 1.65 V to 1.95 V 3.4 5.5 8.3 3.3 9.2 9.8 ns VCC = 2.3 V to 2.7 V 3.2 4.5 6.3 3.0 6.8 7.3 ns 3.1 4.2 5.8 2.9 6.6 7.0 ns - 66.3 - - - - ns VCC = 1.1 V to 1.3 V 5.3 9.6 16.4 4.7 17.0 18.7 ns VCC = 1.4 V to 1.6 V 4.4 6.8 10.0 3.9 10.9 12.0 ns CL = 30 pF tpd [2] propagation delay A to nY; see Figure 5 VCC = 0.8 V VCC = 3.0 V to 3.6 V ten enable time [3] S to nY; see Figure 6 VCC = 0.8 V VCC = 1.65 V to 1.95 V 4.0 5.7 8.2 3.4 8.9 9.8 ns VCC = 2.3 V to 2.7 V 3.4 4.8 6.6 2.9 7.0 7.7 ns 3.2 4.5 6.1 2.8 6.5 7.2 ns VCC = 3.0 V to 3.6 V tdis disable time [4] S to nY; see Figure 6 VCC = 0.8 V - 21.8 - - - - ns VCC = 1.1 V to 1.3 V 8.2 10.4 14.3 8.0 14.7 16.2 ns VCC = 1.4 V to 1.6 V 6.5 8.0 10.0 6.3 10.4 11.4 ns VCC = 1.65 V to 1.95 V 7.4 9.0 11.0 7.3 11.3 12.4 ns VCC = 2.3 V to 2.7 V 5.3 6.5 7.9 5.2 8.2 9.0 ns VCC = 3.0 V to 3.6 V 7.6 9.0 10.7 7.4 11.0 12.1 ns 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 10 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter 25 °C Conditions −40 °C to +125 °C Unit Min Typ[1] Max Min Max (85 °C) Max (125 °C) VCC = 0.8 V - 2.8 - - - - pF VCC = 1.1 V to 1.3 V - 2.9 - - - - pF VCC = 1.4 V to 1.6 V - 3.0 - - - - pF VCC = 1.65 V to 1.95 V - 3.2 - - - - pF VCC = 2.3 V to 2.7 V - 3.7 - - - - pF VCC = 3.0 V to 3.6 V - 4.2 - - - - pF CL = 5 pF, 10 pF, 15 pF and 30 pF power dissipation capacitance CPD [5] fi = 1 MHz; VI = GND to VCC [1] All typical values are measured at nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] ten is the same as tPZH and tPZL. [4] tdis is the same as tPHZ and tPLZ. [5] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. 12. Waveforms VI VM VM A input GND tPLH tPHL VOH VM nY output VM VOL mnb089 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 5. The data input (A) to output (nY) propagation delays Table 9. Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 0.8 V to 3.6 V 0.5 × VCC 0.5 × VCC VCC ≤ 3.0 ns 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 11 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output VI S input VM GND t PLZ t PZL VCC nY output LOW-to-OFF OFF-to-LOW VM VX VOL t PZH t PHZ VOH VY nY output HIGH-to-OFF OFF-to-HIGH VM GND output enabled output enabled output disabled mnb090 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 6. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VM VX VY 0.8 V to 1.6 V 0.5 × VCC 0.5 × VCC VOL + 0.1 V VOH − 0.1 V 1.65 V to 2.7 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH − 0.15 V 3.0 V to 3.6 V 0.5 × VCC 0.5 × VCC VOL + 0.3 V VOH − 0.3 V 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 12 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output VCC VEXT 5 kΩ G VI VO DUT RT CL RL 001aac521 Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 7. Load circuitry for switching times Table 11. Test data Supply voltage Load VEXT VCC CL 0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ [1] RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ open GND 2 × VCC For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 13 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 13. Package outline Plastic surface-mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT363 JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 8. Package outline SOT363 (SC-88) 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 14 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× (2) L L1 e 6 5 e1 4 e1 6× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 1.5 1.4 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 MO-252 Fig 9. Package outline SOT886 (XSON6) 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 15 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm 1 SOT891 b 3 2 4× (1) L L1 e 6 5 e1 4 e1 6× A (1) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 max b D E e e1 L L1 mm 0.5 0.04 0.20 0.12 1.05 0.95 1.05 0.95 0.55 0.35 0.35 0.27 0.40 0.32 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-04-06 07-05-15 SOT891 Fig 10. Package outline SOT891 (XSON6) 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 16 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 14. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AUP1G18_2 20080403 Product data sheet - 74AUP1G18_1 Modifications: • Section 2 “Features”: • Section 10 “Static characteristics”: Changed: ESD HBM voltage from 4000 V to 5000 V. Changed: input capacitance. • Section 11 “Dynamic characteristics”: Changed: propagation delays, enable times, disable times and typical power dissipation capacitance. 74AUP1G18_1 20061013 Product data sheet 74AUP1G18_2 Product data sheet - - © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 17 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74AUP1G18_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 April 2008 18 of 19 74AUP1G18 NXP Semiconductors Low-power 1-of-2 demultiplexer with 3-state deselected output 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 3 April 2008 Document identifier: 74AUP1G18_2