ONSEMI CAT4103V-GT2

CAT4103
3-Channel Constant-Current RGB LED Driver
FEATURES
DESCRIPTION
„ 3 independent current sinks rated to 25V
„ LED current to 175mA per channel set by
separate external resistors
„ High-speed 25MHz 4-wire serial interface
„ Buffered output drivers to ensure data integrity
„ Cascadable devices
„ Low dropout current source (0.4V at 175mA)
„ 3V to 5.5V logic supply
„ Thermal shutdown protection
„ RoHS-compliant 16-lead SOIC package
The CAT4103 is a 3-channel, linear based constantcurrent LED driver designed for RGB LED control,
requiring no inductor and provides a low noise operation.
LED channel currents up to 175mA are programmed
independently via separate external resistors. Low output
voltage operation of 0.4V at 175mA allows for more
power efficient designs across wider supply voltage
range. The three LED pins are compatible with high
voltage up to 25V supporting applications with long
strings of LEDs.
APPLICATIONS
„ Multi-color, intelligent LED, architectural
lighting
„ High-visual impact LED signs and displays
„ LCD backlight
ORDERING INFORMATION
Part
Number
Package
Quantity
per Reel
Package
Marking
CAT4103V-GT2
SOIC-16*
2,000
CAT4103V
A high-speed 4-wire 25MHz serial interface controls each
individual channel using a shift register and latch
configuration. Output data pins allow multiple devices to
be cascaded and programmed via one serial interface
with no need for external drivers or timing considerations.
The device also includes a blanking control pin (BIN) that
can be used to disable all channels independently of the
interface.
Thermal shutdown protection is incorporated in the device
to disable the LED outputs whenever the die temperature
exceeds 150ºC.
The device is available in a 16-lead SOIC package.
* Lead Finish NiPdAu
PIN CONFIGURATION
TYPICAL APPLICATION CIRCUIT
16-Lead SOIC (W)
Top View
VIN
5V to 25V
GND
1
16
VDD
BIN
2
15
BOUT
VDD
3V to 5.5V
C1
1µF
VDD
LIN
3
14
LOUT
SIN
4
13
SOUT
RED
LED1
LIN
CONTROLLER
CAT4103
CIN
5
12
COUT
6
11
LED1
CIN
RSET2
7
10
LED2
GND RSET1
RSET1
8
9
LED3
SIN
LOUT
SOUT
NEXT
CAT4103
DEVICE
COUT
R1
1
BLUE
LED3
BOUT
BIN
RSET3
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
GREEN
LED2
RSET2
R2
RSET3
R3
Doc. No. MD-5038, Rev. A
CAT4103
ABSOLUTE MAXIMUM RATINGS
Parameter
VDD Voltage
Input Voltage Range (SIN, BIN, CIN, LIN)
Output voltage range (SOUT, BOUT, COUT, LOUT)
LED1, LED2, LED3 Voltage
DC Output Current on LED1 to LED3
Storage Temperature Range
Junction Temperature Range
Lead Soldering Temperature (10sec.)
ESD Rating: All Pins
Human Body Model
Machine Model
Rating
Units
6
-0.3V to VDD+0.3V
-0.3V to VDD+0.3V
25
200
-55 to +160
-40 to +150
300
V
V
V
V
mA
°C
°C
°C
2000
200
V
Range
Units
3.0 to 5.5
up to 25
up to 6*
2 to 175
-40 to +85
V
V
V
mA
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
VDD
Voltage applied to LED1 to LED3, outputs off
Voltage applied to LED1 to LED3, outputs on
Output Current on LED1 to LED3
Ambient Temperature Range
* Keeping the LEDx pin voltage below 6V in operation is recommended to minimize thermal dissipation in the package.
ELECTRICAL OPERATING CHARACTERISTICS
DC CHARACTERISTICS
Min and Max values are over recommended operating conditions unless specified otherwise.
Typical values are at VIN = 5.0V, TAMB = 25°C
Symbol Name
IDD1
IDD2
IDD3
IDD4
ILKG
RLIN
RBIN
Supply Current Outputs Off
Supply Current Outputs Off
Supply Current Outputs On
Supply Current Outputs On
LED Output Leakage
LIN Pull-down Resistance
BIN Pull-up Resistance
VIH
VIL
Logic high input voltage
Logic low input voltage
IIL
VOH
VOL
VRSET
TSD
THYS
VLED = 5V, RSET = 24.9kΩ
VLED = 5V, RSET = 5.23kΩ
VLED = 0.5V, RSET = 24.9kΩ
VLED = 0.5V, RSET = 5.23kΩ
VLED = 5V, Outputs Off
RSETx Regulated Voltage
Thermal Shutdown
Thermal Hysteresis
-1
140
140
Typ
Max
Units
2
4
2
4
5
10
5
10
1
250
250
mA
mA
mA
mA
µA
kΩ
kΩ
0.7x VDD
V
5
µA
180
180
-5
100mA LED Current
0
VCC-0.3V
0.3
1.17
Undervoltage Lockout (UVLO)
Threshold
Doc. No. MD-5038, Rev. A
Min
0.3x VDD
Logic Input Leakage Current
VI = VDD or GND
(CIN, SIN)
xOUT Logic High Output Voltage IOH = -1mA
xOUT Logic Low Output Voltage IOL = 1mA
ILED/IRSET RSET to LED Current Gain ratio
VUVLO
Conditions
1.2
150
20
V
°C
°C
400
1.8
2
1.23
V
V
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
TIMING CHARACTERISTICS
Min and Max values are over recommended operating conditions unless specified otherwise.
Typical values are at VIN = 5.0V, TAMB = 25°C
Symbol
Name
Conditions
Min
Typ
Max
Units
25
MHz
CIN
fcin
CIN Clock Frequency
tcwh
CIN Pulse Width High
18
ns
tcwl
CIN Pulse Width Low
18
ns
tssu
Setup time SIN to CIN
4
ns
tsh
Hold time SIN to CIN
4
ns
Tlwh
LIN Pulse width
20
ns
tlchd
Hold time LIN to CIN
4
ns
tlcsu
Setup time LIN to CIN
8
ns
SIN
LIN
LEDn
tledplon
Turn on Propagation delay LIN
LIN to LED(n) on
380
ns
tledploff
Turn off Propagation delay LIN
LIN to LED(n) off
130
ns
tledpbon
Turn on Propagation delay BIN
BIN to LED(n) on
380
ns
tledpboff
Turn off Propagation delay BIN
BIN to LED(n) off
130
ns
tledr
LED rise time (10% to 90%)
Pullup resistor = 50Ω to 3.0V
160
ns
tledf
LED fall time (90% to 10%)
Pullup resistor = 50Ω to 3.0V
140
ns
SOUT
tsr
SOUT rise time (10% to 90%)
CL = 15pF
5
ns
tsf
SOUT fall time (90% to 10%)
CL = 15pF
5
ns
tsdf
Propagation delay time SOUT
CIN falling to SOUT falling
6
18
ns
tsdr
Propagation delay time SOUT
CIN falling to SOUT rising
6
18
ns
tcr
COUT rise time (10% to 90%)
CL = 15pF
5
ns
tcf
COUT fall time (90% to 10%)
CL = 15pF
5
ns
tcdf
Propagation delay time COUT
CIN falling to COUT falling
4
10
ns
tcdr
Propagation delay time COUT
CIN rising to COUT rising
4
10
ns
tlr
LOUT rise time (10% to 90%)
CL = 15pF
5
ns
tlf
LOUT fall time (90% to 10%)
CL = 15pF
5
ns
tldf
Propagation delay time LOUT
LIN falling to LOUT falling
4
10
ns
tldr
Propagation delay time LOUT
LIN rising to LOUT rising
5
10
ns
tbr
BOUT rise time (10% to 90%)
CL = 15pF
5
ns
tbf
BOUT fall time (90% to 10%)
CL = 15pF
5
ns
tbdf
Propagation delay time BOUT
BIN falling to BOUT falling
6
20
ns
tbdr
Propagation delay time BOUT
BIN rising to BOUT rising
8
20
ns
COUT
LOUT
BOUT
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-5038, Rev. A
CAT4103
1/fcin
CIN
tssu
tsh
tcwl
tcwh
SIN
tsdf
tlchd
tlcsu
tsdr
SOUT
tlwd
LIN
Figure 2. Timing Diagram A
tledploff
tledplon
LIN
tledpboff
BIN
tledpbon
LED(n)
Figure 3. Timing Diagram B
Doc. No. MD-5038, Rev. A
4
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VDD = 5V, C1 = 1μF, TAMB = 25°C unless otherwise specified.
Quiescent Current vs. Input Voltage (ILED = 0mA)
Quiescent Current vs. RSET Current
8.0
QUIESCENT CURRENT [mA]
QUIESCENT CURRENT [mA]
1.2
No Load
1.0
0.8
0.6
0.4
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
2.0
5.5
0
Quiescent Current vs. Input Voltage (ILED = 175mA)
100
200
300
RSET CURRENT [μA]
400
LED Current vs. LED Pin Voltage
6.0
200
Full Load
LED CURRENT [mA]
QUIESCENT CURRENT [mA]
4.0
0.0
3.0
5.5
5.0
4.5
4.0
160
120
80
40
0
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
5.5
0.0
0.2
0.4
0.6
0.8
LED PIN VOLTAGE [V]
1.0
LED Current Change vs. Temperature
LED Current Change vs. Input Voltage
200
200
160
160
LED CURRENT [mA]
LED CURRENT [mA]
6.0
120
80
40
0
120
80
40
0
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
5.5
-40
5
0
40
80
TEMPERATURE [ºC]
120
Doc. No. MD-5038, Rev. A
CAT4103
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VDD = 5V, C1 = 1μF, TAMB = 25°C unless otherwise specified.
RSET Pin Voltage vs. Input Voltage
RSET Pin Voltage vs. Temperature
1.30
RSET VOLTAGE [V]
RSET VOLTAGE [V]
1.30
1.25
1.20
1.15
1.25
1.20
1.15
1.10
1.10
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
-40
5.5
0
40
80
TEMPERATURE [ºC]
120
BIN Transient Response
LED Current vs. RSET Resistor
LED CURRENT [mA]
200
160
120
80
40
0
0
Doc. No. MD-5038, Rev. A
15
30
RSET [kΩ]
45
60
6
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
PIN DESCRIPTIONS
Name
Pin Number
Function
GND
1
Ground Reference
BIN
2
Blank input pin
LIN
3
Latch Data input pin
SIN
4
Serial Data input pin
CIN
5
Serial Clock input pin
RSET3
6
LED current set pin for LED3
RSET2
7
LED current set pin for LED2
RSET1
8
LED current set pin for LED1
LED3
9
LED channel 3 cathode terminal
LED2
10
LED channel 2 cathode terminal
LED1
11
LED channel 1 cathode terminal
COUT
12
Serial Clock output pin
SOUT
13
Serial Data output pin
LOUT
14
Latch Data output pin
BOUT
15
Blank output pin
VDD
16
Device Supply pin
PIN FUNCTION
GND is the ground reference pin for the entire device.
This pin must be connected to the ground plane on
the PCB.
LED1 to LED3 are the LED current sink inputs. These
pins are connected to the bottom cathodes of the LED
strings. The current sinks bias the LEDs with a current
equal to 400 times the RSET pin current. For the LED
sink to operate correctly, the voltage on the LED pin
must be above 0.4V. Each LED channel can
withstand and operate with voltages up to 25V.
BIN is the blank input used to disable all channels.
When low, all LED channels are enabled according to
the output latch content. When high, all LED channels
are turned off. This pin can be used to turn all the
LEDs off while preserving the data in the output
latches.
COUT is a driven output of CIN and can be connected
to the next device in the cascade.
LIN is the latch data input. On the rising edge of LIN,
data is loaded from the 3-bit serial shift register into
the output register latch. On the falling edge of LIN the
data is latched in the output register and isolated from
the state of the serial shift register.
SOUT is the output of the 3-bit serial shift register.
Connect to SIN of the next device in the cascade.
SOUT is clocked on the falling edge of CIN.
LOUT is a driven output of LIN and can be connected
to the next chip in the cascade.
SIN is the serial data input. Data is loaded into the
internal register on each rising edge of CIN.
BOUT is a driven output of BIN and can be connected
to the next chip in the cascade.
CIN is the serial clock input. On each rising CIN edge,
data is transferred from SIN to the internal 3-bit serial
shift register.
VDD is the positive supply pin voltage for the
entire device. A small 1µF ceramic capacitor is
recommended close to the pin.
RSET1 to RSET3 are the LED current set inputs. The
current pulled out of these pins will be mirrored in the
corresponding LED channel with a gain of 400.
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
7
Doc. No. MD-5038, Rev. A
CAT4103
BLOCK DIAGRAM
LED1 LED2 LED3
Upon power-up, an under-voltage lockout circuit
clears all latches and shift registers and sets all
outputs to off. Once the VDD supply voltage is greater
than the under-voltage lockout threshold, the device
can be programmed.
1.2V Ref
RSET1
Current Setting
RSET2
+
VDD
Current Setting
CURRENT
SINKS
Current Setting
BIN
Pull-up and pull-down resistors are internally provided
to set the state of the BIN and LIN pins to low current
off state when not externally driven.
RSET3
BOUT
A high-speed 4-wire interface is provided to program
the state of each LED channel ON or OFF.
BLANK
LATCH
LIN
L0
L1
L2
The 4-wire interface contains a 3-bit serial-to-parallel
shift register (S0-S2) and a 3-bit latch (L0-L2). The
shift register operates on a first-in first-out (FIFO)
basis. The most significant bit S2 corresponds to the
first data entered in from SIN. Programming the
serial-to-parallel register is accomplished via SIN and
CIN input pins. On each rising edge of the CIN signal
the data from SIN is moved through the shift register
serially. Data is also moved out of SOUT to the next
device if programming more than one device on the
same interface.
LOUT
SIN
CIN
SHIFT
REGISTER
S0
S1
S2
D
Q
SOUT
CK
CLOCK
COUT
GND
Figure 1. CAT4103 Functional Block Diagram
BASIC OPERATION
On the rising edge of LIN, the data content of the serial
to parallel shift register is reflected in the latches. On
the falling edge of LIN, the state of the serial-to-parallel
register at that particular time is saved in the latches
and does not change regardless of the content of the
serial to parallel register.
The CAT4103 uses 3 independent current sinks to
accurately regulate the current in each LED channel
to 400 times the current sink from the corresponding
RSET pin. Each of the resistors tied to the RSET1,
RSET2, RSET3 pins set the current respectively in
the LED1, LED2, and LED3 channels. Table 1 shows
some standard resistor values for RSET and the
corresponding LED current.
BIN is used to disable all LEDs off at one time while
still maintaining the data contents of the latch register.
BIN is an active low input pin. When low the outputs
reflect the data in the latches. When high the outputs
are all high impedance (LEDs off).
Table 1. RSET Resistor Settings
LED Current [mA]
RSET[kΩ]
20
24.9
60
8.45
100
5.23
175
3.01
All 4-wire inputs have a corresponding output driver
for cascaded systems (SOUT, COUT, LOUT, BOUT).
These output buffers allow many CAT4103 drivers to
be cascaded without signal and timing degradation
due to long wire interconnections.
Tight current regulation for all channels is possible
over a wide range of input and LED voltages due to
independent current sensing circuitry on each
channel. The LED channels have a low dropout of
0.4V or less for all current ranges and supply
voltages. This helps improve heat dissipation and
efficiency over other competing solutions.
Doc. No. MD-5038, Rev. A
8
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
APPLICATION INFORMATION
CASCADING MULTIPLE DEVICES
The CAT4103 is designed to be cascaded for driving
multiple RGD LEDs. Figure 5 shows three CAT4103
drivers cascaded together. The programming data
from the controller travels serially through each
device. Figure 4 shows a programming example
turning on the following LED channels: BLUE3,
GREEN2 and RED1. The programming waveforms
are measured from the controller to the inputs of the
first CAT4103.
Figure 4. Programming Example
5V
C1
1µF
RED1
CONTROLLER
VDD LED1
GREEN1
LED2
BIN
LIN
SIN
CAT4103
#1
CIN
GND RSET1
R1
RSET2
R2
BLUE1
LED3
C2
1µF
VDD LED1
BOUT
BIN
LOUT
LIN
SOUT
SIN
COUT
CIN
RSET3
R3
RED2
GREEN2
LED2
CAT4103
#2
GND RSET1
R4
RSET2
R5
BLUE2
LED3
C3
1µF
VDD LED1
BOUT
BIN
LOUT
LIN
SOUT
SIN
COUT
CIN
RSET3
R6
RED3
GREEN3
LED2
BLUE3
LED3
BOUT
CAT4103
#3
LOUT
SOUT
COUT
GND RSET1
R7
RSET2
R8
RSET3
R9
Figure 5. Three Cascaded CAT4103 Devices
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
9
Doc. No. MD-5038, Rev. A
CAT4103
POWER DISSIPATION
RECOMMENDED LAYOUT
The power dissipation (PD) of the CAT4103 can be
calculated as follows:
Bypass capacitor C1 should be placed as close to the
IC as possible. RSET resistors should be directly
connected to the GND pin of the device. For better
thermal dissipation, multiple via can be used to
connect the GND pad to a large ground plane. It is
also recommended to use large pads and traces on
the PCB wherever possible to spread out the heat.
The LEDs for this layout are driven from a separate
supply (VLED+), but they can also be driven from the
same supply connected to VDD.
PD = (VDD × IDD ) + Σ(VLEDN × ILEDN )
where VLEDN is the voltage at the LED pin, and ILEDN is
the associated LED current. Combinations of high
VLED voltage or high ambient temperature can cause
the CAT4103 to enter thermal shutdown. In
applications where VLEDN is high, a resistor can be
inserted in series with the LED string to lower PD.
Thermal dissipation of the junction heat consists
primarily of two paths in series. The first path is the
junction to the case (θJC) thermal resistance which is
defined by the package style, and the second path is
the case to ambient (θCA) thermal resistance, which is
dependent on board layout. The overall junction to
ambient (θJA) thermal resistance is equal to:
θJA = θJC + θCA
For a given package style and board layout, the
operating junction temperature TJ is a function of the
power dissipation PD, and the ambient temperature,
resulting in the following equation:
TJ = TAMB + PD (θJC + θCA)
= TAMB + PD θJA
When mounted on a double-sided printed circuit
board with two square inches of copper allocated for
“heat spreading”, the resulting θJA is about 74°C/W.
Figure 6. Recommended Layout
For example, at 60°C ambient temperature, the
maximum power dissipation is calculated as follow:
PDmax =
(TJmax - TAMB ) (150 - 60)
=
= 1.2W
θJA
74
Doc. No. MD-5038, Rev. A
10
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
PACKAGE OUTLINE DRAWING
SOIC 16-LEAD 150MILS (V)
(1)(2)
0
E1
SYMBOL
MIN
A
1.35
1.75
A1
0.10
0.25
E
MAX
b
0.33
0.51
c
0.19
0.25
D
9.80
9.90
10.00
E
5.80
6.00
6.20
E1
3.80
3.90
4.00
e
PIN#1 IDENTIFICATION
NOM
1.27 BSC
h
0.25
0.50
L
0.40
1.27
θ
0º
8º
TOP VIEW
D
h
θ
A
e
b
A1
SIDE VIEW
c
L
END VIEW
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions in millimeters. Angle in degrees.
(2) Compiles with JEDEC standard-012.
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
11
Doc. No. MD-5038, Rev. A
CAT4103
EXAMPLE OF ORDERING INFORMATION (1)
1F1F1F
Prefix
CAT
Device # Suffix
4103
V
–
G
Package
V: SOIC
Company ID
T2
Tape & Reel
T: Tape & Reel
2: 2,000/Reel
Product Number
4103
Lead Finish
G: NiPdAu
Blank: Matte-Tin
Notes:
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).
(2) The standard plated finish is NiPdAu.
(3) The device used in the above example is a CAT4103V-GT2 (SOIC, NiPdAu, Tape & Reel, 2,000/Reel).
(4) For additional temperature options, please contact your nearest ON Semiconductor Sales office.
Doc. No. MD-5038, Rev. A
12
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
REVISION HISTORY
Date
Revision
Description
31-Oct-08
A
Initial Issue
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to
any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: [email protected]
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
N. American Technical Support: 800-282-9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center:
Phone: 81-3-5773-3850
13
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
Doc. No. MD-5038, Rev. A