ETC LD7750R

LD7750R
05/12/2010
High Voltage Green-Mode PWM Controller with
Over Temperature Protection
Rev. 00
Features
General Description
The LD7750R integrates several functions of protections,
z
High-Voltage (500V) Startup Circuit
and EMI-improved solution in a SOP-7, SOP-8 or DIP-8
z
Current Mode Control
package to minimize the component counts and the circuit
z
Green Mode Control
space.
z
UVLO (Under Voltage Lockout)
z
LEB (Leading-Edge Blanking) on CS Pin
z
Internal Frequency Swapping
z
Internal Slope Compensation
z
Internal Over Current Protection
z
OVP (Over Voltage Protection) on Vcc
z
OLP (Over Load Protection)
z
External OTP through a NTC
z
500mA Driving Capability
The device provides functions of low startup current,
green-mode
power-saving
operation,
leading-edge
blanking of the current sensing and internal slope
compensation.
Also, the LD7750R features more
protections like OLP (Over Load Protection), OVP (Over
Voltage
Protection),
and
OTP
(Over
Temperature
Protection) to prevent the circuit being damaged under the
abnormal conditions. The LD7750R features built-in
Applications
auto-recovery function for OVP on Vcc pin and OLP.
z
Switching AC/DC Adaptor and Battery Charger
z
Open Frame Switching Power Supply
z
LCD Monitor/TV Power
Typical Application
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LD7750R
Pin Configuration
NC
VCC
5
8
7
6
6
OUT
HV
7
SOP-8 /DIP-8 (TOP VIEW)
OUT
HV
VCC
SOP-7 (TOP VIEW)
5
4
1
OTP
2
3
4
GND
3
CS
2
YY:
WW:
PP:
C OMP
1
GND
YYWWPP
CS
YYWWPP
COMP
TOP MARK
OTP
TOP MARK
Year code
Week code
Production code
Ordering Information
Part number
Switching Freq.
Package
LD7750R GS
65kHz
SOP-8 Green package
LD7750R GS 2500 /tape & reel
LD7750R GR
65kHz
SOP-7 Green package
LD7750R GR 2500 /tape & reel
DIP-8
LD7750R GN 3600 /tube /Carton
LD7750R GN
65kHz
The LD7750R is ROHS compliant.
Top Mark
Green package
Shipping
Protection Mode
Part number
Switching Freq.
VCC OVP
OLP
OTP Pin
LD7750R
65kHz
Auto recovery
Auto recovery
Latch
Pin Descriptions
SOP-8
SOP-7
NAME
FUNCTION
Pulling this pin below 0.95V will shutdown the controller to enter latch
1
1
OTP
mode until the AC power-on recycles.
Connecting a NTC between
this pin and ground will achieve OTP protection function. Let this pin
float to disable the latch protection.
Voltage feedback pin. By connecting a photo-coupler to close the
2
2
COMP
3
3
CS
4
4
GND
Ground.
5
5
OUT
Gate drive output to drive the external MOSFET.
6
6
VCC
Supply voltage pin.
NC
Unconnected Pin.
7
control loop can achieve the regulation.
Current sense pin, for sensing the MOSFET current.
Connect this pin to a positive terminal of bulk capacitor to provide the
8
7
HV
startup current for the controller. When Vcc voltage trips the UVLO(on),
this HV loop will be turned off to reduce the power loss on the startup
circuit.
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LD7750R
Block Diagram
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LD7750R
Absolute Maximum Ratings
Supply Voltage VCC
-0.3V~30V
High-Voltage Pin, HV
-0.3V~500V
COMP, OTP, CS
-0.3 ~7V
OUT
-0.3 ~Vcc+0.3
Maximum Junction Temperature
150°C
Operating Ambient Temperature
-20°C to 85°C
Operating Junction Temperature
-40°C to 125°C
Storage Temperature Range
-65°C to 150°C
Package Thermal Resistance (SOP-7/ SOP-8)
160°C/W
Package Thermal Resistance (DIP-8)
100°C/W
Power Dissipation (SOP-7/ SOP-8, at Ambient Temperature = 85°C)
400mW
Power Dissipation (DIP-8, at Ambient Temperature = 85°C)
650mW
Lead temperature (Soldering, 10sec)
260°C
ESD Voltage Protection, Human Body Model (except HV Pin)
2.5KV
ESD Voltage Protection, Machine Model
250V
Gate Output Current
500mA
Caution:
Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied.
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LD7750R
Electrical Characteristics
(TA = +25°C unless otherwise stated, VCC=15.0V)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0.5
1.0
1.5
mA
35
μA
400
μA
High-Voltage Supply (HV Pin)
High-Voltage Current Source
VCC< UVLO(on), HV=500V
Off-State Leakage Current
VCC> UVLO(off), HV=500V
Supply Voltage (Vcc Pin)
Startup Current
200
320
VCOMP=0V
1.2
mA
Operating Current
VCOMP=3V,
2.3
mA
(with 1nF load on OUT pin)
OLP tripped
0.61
mA
OVP tripped, VCC=OVP
0.70
mA
UVLO (off)
9.0
10.0
11.0
V
UVLO (on)
15.0
16.0
17.0
V
OVP Level
25.0
26.0
27.0
V
0.32
mA
Voltage Feedback (COMP Pin)
Short Circuit Current
VCOMP=0V
0.20
0.26
Open Loop Voltage
COMP pin open
5.5
6.0
V
Green Mode Threshold VCOMP
2.75
V
Zero Duty
1.8
V
Current Sensing (CS Pin)
Maximum Input Voltage, Vcs_off
0.80
Leading Edge Blanking Time
250
Input impedance
1
Delay to Output
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0.90
V
ns
MΩ
100
5
Leadtrend Technology Corporation
0.85
ns
LD7750R
Electrical Characteristics
(TA = +25°C unless otherwise stated, VCC=15.0V)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Oscillator for Switching Frequency
Frequency
61.0
Green Mode Frequency
Trembling Frequency
°
°
Temp. Stability
-20 C~85 C
Voltage Stability
(VCC=11V-25V)
65.0
69.0
KHz
20
KHz
±4
kHz
5
%
1
%
OTP Pin Latch Protection (OTP Pin)
92
100
108
μA
Turn-On Trip Level
1.00
1.05
1.10
V
Turn-Off Trip Level
0.90
0.95
1.0
V
OTP Pin Source Current
De-latch VCC Level
(PDR, Power Down Reset)
8.0
V
Gate Drive Output (OUT Pin)
Output Low Level
VCC=15V, Io=20mA
Output High Level
VCC=15V, Io=20mA
Rising Time
Load Capacitance=1000pF
100
160
ns
Falling Time
Load Capacitance=1000pF
30
60
ns
5.0
5.2
V
1
9
V
V
OLP (Over Load Protection)
OLP Trip Level
4.8
OLP Delay Time
64
ms
2
ms
OTP Level
140
°C
OTP Hysteresis
30
°C
Soft Start Duration
Soft Start Duration
On Chip OTP (Internal Over Temperature Protection, Auto-Recovery)
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LD7750R
Typical Performance Characteristics
0.88
0.87
1.3
VCS (off) (V)
HV Current Source (mA)
1.5
1.1
0.86
0.85
0.9
0.84
0.7
-40
0
40
80
0.83
120 125
-40
Temperature (°C)
UVLO (off) (V)
UVLO (on) (V)
120 125
11.2
17.2
16.4
15.6
10.4
9. 6
8.8
14.8
8
-40
0
40
80
120 125
-40
Temperature (°C)
Fig. 3 UVLO (on) vs. Temperature
0
40
80
120
125
120
125
Temperature (°C)
Fig. 4 UVLO (off ) vs. Temperature
70
25
68
23
Frequency (KHz)
Frequency (KHz)
80
12
18.0
66
64
21
19
17
62
60
40
Temperature (°C)
Fig. 2 VCS (off) vs. Temperature
Fig. 1 HV Current Source vs. Temperature (HV=500V, Vcc=0V)
14.0
0
-40
0
40
80
120
15
125
-40
80
Fig. 6 Green Mode Frequency vs. Temperature
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40
Temperature (°C)
Temperature (°C)
Fig. 5 Frequency vs. Temperature
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LD7750R
25
Green mode frequency (KHz)
70
Frequency (KHz)
68
66
64
62
12
14
16
18
20
22
24
19
17
14
16
18
20
22
Vcc (V)
Fig. 7 Frequency vs. Vcc
Fig. 8 Green mode frequency vs. Vcc
85
35
80
30
75
70
24
25
120
125
25
20
15
60
-40
0
40
80
10
120 125
-40
0
40
80
Temperature (°C)
Temperature (°C)
Fig. 9 Max Duty vs. Temperature
Fig. 10 VCC OVP vs. Temperature
6.0
6.5
5.5
6.0
5.0
OLP (V)
7.0
5.5
5.0
4.5
12
Vcc (V)
65
VCOMP (V)
21
15
11
25
VCC OVP (V)
Max Duty (%)
60
11
23
4.5
4.0
-40
0
40
80
3.5
120 125
-40
Temperature (°C)
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LD7750R-DS-00 May 2010
40
80
Temperature (°C)
Fig. 12 OLP-Trip Level vs. Temperature
Fig. 11 VCO MP open loop voltage vs. Temperature
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120
125
LD7750R
Application Information
signal, disable the high-voltage current source, and the
Operation Overview
Vcc supply current will be only provided from the auxiliary
winding of the transformer.
As green power requirements become a trend and the
Therefore, the power loss for
the startup circuit after the startup period can be
power saving gets more and more important for the
eliminated and the power saving can be easily achieved.
switching power supplies and switching adaptors, the
In
traditional PWM controllers are not able to support such
general
application,
a
39KΩ
resistor
is
still
recommended to be placed in high voltage path to limit
new requirements. Furthermore, the cost and size
the current if there is a negative voltage applying in any
limitations force PWM controllers to be more powerful by
case.
integrating more functions and, thus, reducing the
LD7750R is designed for such
An UVLO comparator is included to detect the voltage of
application to provide an easy and cost effective solution.
the VCC pin to ensure the supply voltage is high enough to
Its detailed features are described as below.
power on the LD7750R PWM controller and in addition to
external part count.
drive the power MOSFET as well.
As shown in Fig. 14, a
Internal High-Voltage Startup Circuit and
Hysteresis is provided to prevent the shutdown caused by
Under Voltage Lockout (UVLO)
the voltage dip during startup. The turn-on and turn-off
threshold levels are set at 16V and 10.0V, respectively.
The traditional circuits power on the PWM controller
through a startup resistor to constantly provide current
from a rectified voltage to the capacitor connected to Vcc
pin. Nevertheless, this startup resistor was usually of
larger resistance, and it therefore consumed more power
and required longer time to start up.
To achieve an optimized topology, as shown in Fig. 13,
The LD7750R is built in with high voltage startup circuit to
optimize the power saving. During the startup sequence, a
high-voltage current source sinks current from CBULK
capacitor to provide the startup current as well as to
Fig. 13
charge the Vcc capacitor C1. During the initialization of
the startup, Vcc voltage is below UVLO(off) threshold thus
the current source is on to supply a current of 1mA.
Meanwhile, as the Vcc current consumed by the LD7750R
is only 320μA thus most of the HV current is left to charge
the Vcc capacitor.
With using such configuration, the
turn-on delay time will be almost the same no matter what
operation condition is under low-line or high-line.
When Vcc voltage reaches UVLO(on) threshold, the
LD7750R is powered on to start issuing the gate drive
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LD7750R
R-C filter (as shown in Fig. 16) for higher power
applications to avoid the CS pin being damaged by the
negative turn-on spike.
Fig. 14
Current Sensing, Leading-edge Blanking
and the Negative Spike on CS Pin
Fig. 15
The typical current mode PWM controller feedbacks both
current signal and voltage signal to close the control loop
and achieve regulation. The LD7750R detects the primary
MOSFET current from the CS pin, which is not only for the
peak current mode control but also for the pulse-by-pulse
current limit. The maximum voltage threshold of the
current sensing pin is set as 0.85V. Thus the MOSFET
peak current can be calculated as:
IPEAK(MAX) =
0.85V
RS
A 250nS leading-edge blanking (LEB) time is included in
the input of CS pin to prevent false-trigger caused by the
current spike. For low power applications, if the total pulse
width of the turn-on spike is less than 250nS and the
negative spike on the CS pin is above -0.3V, the R-C filter
(as shown in Fig.15) is eliminatable.
However, the total pulse width of the turn-on spike is
related to the output power, circuit design and PCB layout.
Fig. 16
Nevertheless, it is strongly recommended to add a small
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LD7750R
Oscillator and Switching Frequency
On/Off Control
The LD7750R is implemented with Frequency Swapping
The LD7750R can be turned off by pulling COMP pin to
function which helps the power supply designers to both
below 1.8V.
optimize EMI performance and minimize the system
disabled immediately under such condition. The off-mode
cost. The switching frequency substantially centers at
can be released when the pull-low signal is removed.
The gate output pin of LD7750R will be
65KHz, and swaps between a range of ±4KHz.
Green-Mode Operation
Output Stage and Maximum Duty-Cycle
By using the green-mode control, the switching frequency
An output stage of a CMOS buffer with driving capability
can be reduced under the light load condition. This feature
of 500mA typically is incorporated to drive a power
helps to improve the efficiency in light load conditions.
MOSFET directly.
The green-mode control is Leadtrend Technology’s own
And the maximum duty-cycle of
IP.
LD7750R is limited to 75% to avoid the transformer
saturation.
Over
Load
Protection
(OLP)
-
Auto
Voltage Feedback Loop
Recovery
The voltage feedback signal is provided from the TL431 in
To protect the circuit from damage due to overload
the secondary side through the photo-coupler to the
condition or output short condition, a smart OLP function
COMP pin of LD7750R.
The input stage of LD7750R,
is implemented in the LD7750R for it. The OLP function is
like the UC384X, is incorporated with 2 diodes voltage
an auto-recovery type protection. Fig. 17 shows the
offset circuit and a voltage divider with 1/3 ratio.
waveforms of the OLP operation.
Therefore,
condition, the feedback system will force the voltage loop
1
V+ (PWM COMPARATOR ) = × ( VCOMP − 2VF )
3
Under such fault
toward saturation and thus pull up the voltage of COMP
pin (VCOMP). If the VCOMP trips the OLP threshold of
A pulled-high resistor is embedded internally and thus no
5.0V and stays for over 63mS, the protection will be
external one is required.
activated to turn off the gate output and to shutdown the
switching of power circuit. The 30mS delay time is to
prevent the false-trigger during the power-on and turn-off
Internal Slope Compensation
transient.
Stability is crucial for current mode control when it
A divided-by-2 counter is implemented to reduce the
operates at more than 50% of duty-cycle. To stabilize the
average power consumption under OLP behavior.
control loop, the slope compensation is required in the
Whenever OLP is activated, the output is latched off and
traditional UC384X design by injecting the ramp signal
the divided-by-2 counter starts to count the number of
from the RT/CT pin through a coupling capacitor. In the
UVLO(off). The latch will be released if the 2nd UVLO(off)
LD7750R, the internal slope compensation circuit has
point is counted, and then the output recovers switching
been implemented to simplify the external circuit design.
again.
By using such protection mechanism, the average input
power can be reduced to a very low level so that the
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LD7750R
VCC
component temperature and stress can be controlled
OVP Tripped
within a safe operating area.
OVP Level
UVLO(on)
UVLO(off)
t
OUT
Switching
Non-Switching
Switching
t
Fig. 18
OTP Pin --- Latched Mode Protection
To protect the power circuit from damage due to system
failure, over temperature protection (OTP) is required. The
OTP circuit is implemented to sense a hot-spot of power
Fig. 17
circuit like power MOSFET or output rectifier. It can be
easily achieved by connecting a NTC with OTP pin. As
the device temperature or ambient temperature rises, the
OVP (Over Voltage Protection) on Vcc- Auto
resistance of NTC decreases. So, the voltage on the OTP
Recovery
pin could be written as below.
The VGS ratings of the nowadays power MOSFETs are
VOTP = 100μA ⋅ R NTC
mostly 30V maximum. To protect the VGS from the fault
When the VOTP falls below the defined threshold (typ.
condition, LD7750R is implemented with OVP function at
Vcc.
0.95V), LD7750R will shut down the gate output and then
Once the Vcc voltage is larger than the OVP
latch off the power supply.
threshold voltage, the output gate drive circuit will be shut
The controller will remain
latched unless the Vcc drops below 8V (power down reset)
down simultaneously and stop switching of the power
and the fault condition is removed at the same time.
MOSFET until the next UVLO(ON).
There are 2 conditions required to restart it successfully.
The Vcc OVP function in LD7750R is an auto-recovery
First, cool down the circuit so that NTC resistance will
type protection.
If the OVP condition, usually caused by
increase and raise VOTP above 1.05V. Then, remove the
open feedback loop, is not released, the Vcc will trip the
AC power cord and restart AC power-on recycling. The
OVP level again and shutdown the output. The Vcc is
detailed operation is depicted in Fig. 19.
working in hiccup mode. Fig. 18 shows its operation.
Once the OVP condition is removed, the Vcc and the
output will resume to normal operation.
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LD7750R
V(-)Latch
OTP Release
1.05V
0.95V
OTP
t
VCC
UVLO(on)
UVLO(off)
PDR (8V)
Latch Released
t
AC input Voltage
AC Off
AC On (Recycle)
t
OUT
Fig. 20
Switching
Non-Switching
Switching
t
Fig. 19
Pull-Low Resistor on the Gate Pin of
i = Cgd ⋅
MOSFET
dVbulk
dt
An anti-floating resistor is built in with the OUT pin to
prevent the output from any uncertain state. Otherwise, it
may cause the MOSFET work abnormally or mis-trigger.
However, such design won’t cover the condition of
disconnection between the OUT pin and the gate terminal
for the MOSFET. Thus it is still strongly recommended
to have a resistor connected at the MOSFET gate
terminal (as shown in Fig. 20) to provide extra protection
for fault conditions.
This external pull-low resistor is to prevent the MOSFET
Fig. 21
from damaging during power-on when the gate resistor Rg
is disconnected. In such a fault condition, as show in Fig.
Protection Resistor on the Hi-V Path
21, the resistor R8 can provide a discharge path to avoid
the MOSFET from being falsely triggered by the current
In some Hi-V processes and designs, there may be a
through the gate-to-drain capacitor CGD. Therefore, the
parasitic SCR between HV pin, Vcc and GND. As shown
MOSFET should be always pulled-low to persist in
in Fig. 22, a small negative spike on the HV pin may
off-state.
trigger this parasitic SCR and cause latchup between Vcc
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LD7750R
and GND. And such latchup will easily damage the chip
because of the equivalent short-circuit induced.
With the Leadtrend’s proprietary Hi-V technology, there is
no such parasitic SCR in LD7750R. Fig. 23 shows the
equivalent circuit of LD7750R’s Hi-V structure.
The
LD7750R has higher capability to sustain negative voltage
than similar products. Nevertheless, a 39KΩ resistor is
recommended to plant in the Hi-V path as a current limit
resistor, no matter what negative voltage is present in any
situation.
Fig. 23
Fig. 22
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LD7750R
Reference Application Circuit ---19V/2.15A Adapter
Pin < 0.10W when Pout = 0W & Vin = 264Vac
L
N
6 VCC
NC
8 HV
CS 3
OUT 5
LD7750R
2 COMP
1 OTP
4
GND
D6
RM8
IC432
ZENER1
LD7750R-DS-00 May 2010
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+Vo
RTN
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LD7750R
Package Information
SOP-7
Dimensions in Millimeters
Dimensions in Inch
Symbols
MIN
MAX
MIN
MAX
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.178
0.229
0.007
0.009
I
0.102
0.254
0.004
0.010
J
5.791
6.198
0.228
0.244
M
0.406
1.270
0.016
0.050
θ
0°
8°
0°
8°
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LD7750R
Package Information
SOP-8
Dimensions in Millimeters
Dimensions in Inch
Symbols
MIN
MAX
MIN
MAX
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.178
0.229
0.007
0.009
I
0.102
0.254
0.004
0.010
J
5.791
6.198
0.228
0.244
M
0.406
1.270
0.016
0.050
θ
0°
8°
0°
8°
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LD7750R
Package Information
DIP-8
Symbol
Dimension in Millimeters
Dimensions in Inches
Min
Max
Min
Max
A
9.017
10.160
0.355
0.400
B
6.096
7.112
0.240
0.280
C
-----
5.334
------
0.210
D
0.356
0.584
0.014
0.023
E
1.143
1.778
0.045
0.070
F
2.337
2.743
0.092
0.108
I
2.921
3.556
0.115
0.140
J
7.366
8.255
0.29
0.325
L
0.381
------
0.015
--------
Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers
should verify the datasheets are current and complete before placing order.
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LD7750R
Revision History
Rev.
Date
Change Notice
00
5/12/2010
Original specification
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