ETC LD7575B

LD7575B
5/26/2008
Green-Mode PWM Controller with High-Voltage
Start-Up Circuit
Rev. 00
General Description
Features
The LD7575B is a current-mode PWM controller with
z
High-Voltage (500V) Startup Circuit
excellent power-saving operation.
It features a high-
z
Current Mode Control
voltage current source to directly supply the startup current
z
Non-Audible-Noise Green Mode Control
from bulk capacitor and further to provide a lossless startup
z
UVLO (Under Voltage Lockout)
circuit.
z
LEB (Leading-Edge Blanking) on CS Pin
blanking of the current sensing, internal slope compensation,
z
Programmable Switching Frequency
and the small package provide the users a high efficiency,
z
Internal Slope Compensation
minimum external component counts, and low cost solution
z
OVP (Over Voltage Protection) on Vcc
for AC/DC power applications.
z
OLP (Over Load Protection)
z
500mA Driving Capability
The integrated functions such as the leading-edge
Furthermore, the embedded over voltage protection, over
load protection and the special green-mode control provide
Applications
the solution for users to design a high performance power
circuit easily.
The LD7575B is offered in both SOP-8 and
DIP-8 package.
Typical Application
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
z
Switching AC/DC Adapter and Battery Charger
z
Open Frame Switching Power Supply
z
LCD Monitor/TV Power
LD7575B
Pin Configuration
HV
NC
VCC
OUT
SOP-8 & DIP-8 (TOP VIEW)
8
7
6
5
YY:
WW:
PP:
TOP MARK
2
3
4
CS
GND
RT
1
COMP
YYWWPP
Year code
Week code
Production code
Ordering Information
Part number
Package
Top Mark
Shipping
LD7575B GS
SOP-8 (Green PK)
LD7575BGS
2500 /tape & reel
LD7575B GN
DIP-8 (Green PK)
LD7575BGN
3600 /tube /Carton
LD7575B PS
SOP-8 (Pb Free)
LD7575BPS
2500 /tape & reel
LD7575B PN
DIP-8 (Pb Free)
LD7575BPN
3600 /tube /Carton
The LD7575B is ROHS Complaint.
Pin Descriptions
PIN
NAME
FUNCTION
1
RT
2
COMP
3
CS
4
GND
Ground
5
OUT
Gate drive output to drive the external MOSFET
6
VCC
Supply voltage pin
7
NC
Unconnected Pin
This pin is to program the switching frequency. By connecting a resistor to ground
to set the switching frequency.
Voltage feedback pin (same as the COMP pin in UC384X), By connecting a
photo-coupler to close the control loop and achieve the regulation.
Current sense pin, connect to sense the MOSFET current
Connect this pin to positive terminal of bulk capacitor to provide the startup current
8
HV
for the controller. When Vcc voltage trips the UVLO(on), this HV loop will be off to
save the power loss on the startup circuit.
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
LD7575B
Block Diagram
HV
1mA
8V
POR
UVLO
Comparator
32V
OVP
Comparator
internal bias
& Vref
16.0V/
10.0V
VCC
27.5V
VCC OK
RT
PG
OSC
Vref OK
S
Q
R
OVP
Green-Mode
Control
PG
Vbias
S
Q
PWM
Comparator
COMP
2R
OLP
R
R
∑
+
Leading
Edge
Blanking
CS
+
Slope
Compensation
Driver
Stage
POR
OCP
Comparator
0.85V
clear
30mS
Delay
5.0V
OLP
Comparator
S
/2
Counter
PG
GND
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
R
Q
OUT
LD7575B
Absolute Maximum Ratings
Supply Voltage VCC
30V
High-Voltage Pin, HV
-0.3V~500V
COMP, RT, CS
-0.3 ~7V
Junction Temperature
150°C
Operating Ambient Temperature
-20°C to 85°C
Storage Temperature Range
-65°C to 150°C
Package Thermal Resistance (SOP-8)
160°C/W
Package Thermal Resistance (DIP-8)
100°C/W
Power Dissipation (SOP-8, at Ambient Temperature = 85°C)
400mW
Power Dissipation (DIP-8, at Ambient Temperature = 85°C)
650mW
Lead temperature (Soldering, 10sec)
260°C
ESD Voltage Protection, Human Body Model (except HV Pin)
3KV
ESD Voltage Protection, Machine Model (except HV Pin)
300V
Gate Output Current
500mA
Caution:
Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied.
Recommended Operating Conditions
Item
Min.
Max.
Unit
Supply Voltage Vcc
11
25
V
Vcc Capacitor
10
33
μF
Switching Frequency
50
130
KHz
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LD7575B-DS-00 May 2008
LD7575B
Electrical Characteristics
o
(TA = +25 C unless otherwise stated, VCC=15.0V)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0.5
1.0
1.5
mA
35
μA
High-Voltage Supply (HV Pin)
High-Voltage Current Source
Vcc< UVLO(on), HV=500V
Off-State Leakage Current
Vcc> UVLO(off), HV=500V
Supply Voltage (Vcc Pin)
Startup Current
0.5
mA
VCOMP=0V
2.4
3.4
mA
Operating Current
VCOMP=3V
2.9
4.4
mA
(with 1nF load on OUT pin)
Protection tripped (OVP)
0.5
mA
Protection tripped (OLP)
0.43
mA
UVLO (off)
9.0
10.0
11.0
V
UVLO (on)
15.0
16.0
17.0
V
OVP Level
25.0
27.5
30.0
V
2.2
mA
Voltage Feedback (Comp Pin)
Short Circuit Current
VCOMP=0V
1.5
Open Loop Voltage
COMP pin open
6.3
V
2.35
V
Green Mode Threshold VCOMP
Current Sensing (CS Pin)
Maximum Input Voltage
0.80
Leading Edge Blanking Time
0.85
0.90
220
Input impedance
nS
1
Delay to Output
V
MΩ
100
nS
Oscillator (RT pin)
Frequency
RT=100KΩ
60.0
65.0
70.0
Green Mode Frequency
Fs=65.0KHz
Temp. Stability
(-40°C ~105°C)
5
%
Voltage Stability
(VCC=11V-25V)
1
%
Output Low Level
VCC=15V, Io=20mA
1
V
Output High Level
VCC=15V, Io=20mA
Rising Time
Load Capacitance=1000pF
50
160
nS
Falling Time
Load Capacitance=1000pF
30
60
nS
21
KHz
KHz
Gate Drive Output (OUT Pin)
9
V
OLP (Over Load Protection)
OLP Trip Level
OLP Delay Time (note)
Fs=65KHz
5.0
V
33
mS
Note: The OLP delay time is proportional to the period of switching cycle. So that, the lower RT value will set the higher
switching frequency and the shorter OLP delay time.
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LD7575B-DS-00 May 2008
LD7575B
Typical Performance Characteristics
0.90
0.88
1.3
VSENSE (off) (V)
HV Current Source (mA)
1.5
1.1
0.86
0.84
0.9
0.82
0.7
-40
0
40
0.80
-40
120 125
80
-20
Temperature (°C)
0
20
40
60
80
100
120
100
120
Temperature (°C)
Fig. 2 VSEN SE (off) vs. Temperature
Fig. 1 HV Current Source vs. Temperature (HV=500V, Vcc=0V)
17. 5
10. 8
17. 0
10. 6
16. 5
10. 4
UVLO (off) (V)
UVLO (on) (V)
10. 2
16. 0
15. 5
15. 0
14. 5
10. 0
9.8
9.6
9.4
9.2
14. 0
9.0
13. 5
-40
8.8
-20
0
20
40
60
80
100
- 40
120
-20
20
40
60
80
Temperature (°C)
Fig. 4 UVLO (off ) vs. Temperature
70
24
68
23
Green Frequency (KHz)
Frequency (KHz)
Temperature (°C)
Fig. 3 UVLO (on) vs. Temperature
0
66
64
62
60
22
21
20
19
18
58
- 40
16
-20
0
20
40
60
80
100
120
-40
140
20
40
60
80
100
120
140
Fig. 6 Green Mode Frequency vs. Temperature
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LD7575B-DS-00 May 2008
0
Temperature (°C)
Temperature (°C)
Fig. 5 Frequency vs. Temperature
Leadtrend Technology Corporation
-20
LD7575B
25
Green mode frequency (KHz)
70
Frequency (KHz)
68
66
64
62
12
14
16
18
20
22
24
21
19
17
15
11
25
14
16
18
20
22
Vcc (V)
Fig. 7 Frequency vs. Vcc
Fig. 8 Green mode frequency vs. Vcc
80
35
78
30
76
74
24
25
120
125
120
125
25
20
15
72
70
- 40
12
Vcc (V)
VCC OVP (V)
Max Duty (%)
60
11
23
- 20
0
20
40
60
80
100
10
120
-40
40
0
80
Temperature (°C)
Temperature (°C)
Fig. 10
Fig. 9 Max Duty vs. Temperature
VCC OVP vs. Temperature
6.0
6.6
6.4
5.5
6.0
OLP (V)
V COMP (V)
6.2
5.8
5.6
5.0
4.5
5.4
4.0
5.2
5.0
-40
-20
0
20
40
60
80
100
3.5
120
-40
0
Temperature ( °C)
Fig. 11 VCOMP open loop voltage vs. Temperature
Fig. 12
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LD7575B-DS-00 May 2008
40
80
Temperature (°C)
OLP-Trip Level vs. Temperature
LD7575B
Application Information
threshold thus the current source is on to supply a current
Operation Overview
with 1mA.
As long as the green power requirement becomes a trend
Meanwhile, the Vcc supply current is 500μA
thus half of the HV current is utilized to charge the Vcc
and the power saving is getting more and more important for
capacitor. Thus start-up time can be calculated as:
the switching power supplies and switching adaptors, the
TStart −up = 0.032C
traditional PWM controllers are not able to support such new
C is capacitance value of C1 in uF
requirements. Furthermore, the cost and size limitation force
the PWM controllers need to be powerful to integrate more
functions to reduce the external part counts.
Second
By using such configuration, the turn-on delay time will be
The LD7575B
almost same no matter under low-line or high-line
is targeted on such application to provide an easy and cost
conditions.
effective solution; its detail features are described as below:
Whenever the Vcc voltage is higher than UVLO(on) to
power on the LD7575B and further to deliver the gate drive
signal, the high-voltage current source is off and the supply
Internal High-Voltage Startup Circuit and
current is provided from the auxiliary winding of the
Under Voltage Lockout (UVLO)
transformer.
Therefore, the power losses on the startup
circuit can be eliminated and the power saving can be easily
achieved.
Vin
An UVLO comparator is included to detect the voltage on
Cbulk
the Vcc pin to ensure the supply voltage enough to power
D1
R1
on the LD7575B PWM controller and in addition to drive the
power MOSFET.
C1
during startup.
HV
VCC
OUT
CS
GND
Rs
Fig. 13
Traditional circuit powers up the PWM controller through a
startup resistor to provide the startup current. However, the
startup resistor consumes significant power which is more
and more critical whenever the power saving requirement is
coming tight.
Theoretically, this startup resistor can be
very high resistance value. However, higher resistor value
will cause longer startup time.
To achieve an optimized topology, as shown in figure 13,
LD7575B implements a high-voltage startup circuit for such
requirement. During the startup, a high-voltage current
source sinks current from the bulk capacitor to provide the
startup current as well as charge the Vcc capacitor C1.
During the startup transient, the Vcc is lower than the UVLO
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LD7575B-DS-00 May 2008
The turn-on and turn-off threshold level are
set at 16V and 10.0V, respectively.
LD7575B
Comp
As shown in Fig. 14, a hysteresis is
provided to prevent the shutdown from the voltage dip
LD7575B
Vcc
Output Stage and Maximum Duty-Cycle
UVLO(on)
An output stage of a CMOS buffer, with typical 500mA
UVLO(off)
driving capability, is incorporated to drive a power MOSFET
directly.
And the maximum duty-cycle of LD7575B is
limited to 75% to avoid the transformer saturation.
t
Voltage Feedback Loop
HV Current
The voltage feedback signal is provided from the TL431 in
1mA
the secondary side through the photo-coupler to the COMP
pin of LD7575B.
~ 0mA (off)
The input stage of LD7575B, like the
UC384X, is with 2 diodes voltage offset then feeding into the
voltage divider with 1/3 ratio, that is,
t
V+ (PWM COMPARATOR ) =
Vcc current
Operating Current
(Supply from Auxiliary Winding)
Startup Current
(500uA)
1
× ( VCOMP − 2VF )
3
A pull-high resistor is embedded internally thus can be
eliminated on the external circuit.
Fig. 14
Current Sensing, Leading-edge Blanking and
the Negative Spike on CS Pin
The typical current mode PWM controller feedbacks both
current signal and voltage signal to close the control loop
and achieve regulation. The LD7575B detects the primary
MOSFET current from the CS pin, which is not only for the
220ns
blanking
time
peak current mode control but also for the pulse-by-pulse
VCC
current limit. The maximum voltage threshold of the current
OUT
sensing pin is set as 0.85V. Thus the MOSFET peak current
can be calculated as:
IPEAK(MAX) =
LD7575B
0.85 V
RS
CS
A 220nS leading-edge blanking (LEB) time is included in the
GND
input of CS pin to prevent the false-trigger caused by the
current spike. In the low power application, if the total pulse
width of the turn-on spikes is less than 220nS and the
Can be removed if the negative
spike is not over spec. (-0.3V).
negative spike on the CS pin is not exceed -0.3V, the R-C
filter (as shown in figure15) can be eliminated.
Fig. 15
However, the total pulse width of the turn-on spike is related
to the output power, circuit design and PCB layout.
It is
strongly recommended to add the small R-C filter (as shown
in figure 16) for higher power application to avoid the CS pin
damaged by the negative turn-on spike.
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
LD7575B
be disabled immediately under such condition. The off mode
can be released when the pull-low signal is removed.
Dual-Oscillator Green-Mode Operation
There
are
many
difference
topologies
has
been
implemented in different chips for the green-mode or power
saving
requirements
such
as
“burst-mode
control”,
“skipping-cycle Mode”, “variable off-time control “…etc. The
basic operation theory of all these approaches intended to
reduce the switching cycles under light-load or no-load
condition either by skipping some switching pulses or
reduce the switching frequency.
By using this dual-oscillator control, the green-mode
frequency can be well controlled and further to avoid the
generation of audible noise.
Over Load Protection (OLP)
To protect the circuit from the damage during over load
condition or short condition, a smart OLP function is
Fig. 16
implemented in the LD7575B. Figure 17 shows the
waveforms of the OLP operation.
Under such fault
condition, the feedback system will force the voltage loop
toward the saturation and thus pull the voltage on COMP pin
Oscillator and Switching Frequency
(VCOMP) to high.
Connecting a resistor from RT pin to GND according to the
threshold 5.0V and keeps longer than 30mS (when
equation can program the normal switching frequency:
switching frequency is 65KHz), the protection is activated
65.0
× 100(KHz )
fSW =
RT(KΩ)
and then turns off the gate output to stop the switching of
power circuit.
Whenever the VCOMP trips the OLP
The 30mS delay time is to prevent the false
trigger from the power-on and turn-off transient.
A divide-2 counter is implemented to reduce the average
The suggested operating frequency range of LD7575B is
power under OLP behavior.
within 50KHz to 130KHz.
Whenever OLP is activated,
the output is latched off and the divide-2 counter starts to
count the number of UVLO(off).
The latch is released if
Internal Slope Compensation
the 2nd UVLO(off) point is counted then the output is
A fundamental issue of current mode control is the stability
recovery to switching again.
problem when its duty-cycle is operated more than 50%. To
By using such protection mechanism, the average input
stabilize the control loop, the slope compensation is needed
power can be reduced to very low level so that the
in the traditional UC384X design by injecting the ramp signal
component temperature and stress can be controlled within
from the RT/CT pin through a coupling capacitor. In
the safe operating area.
LD7575B, the internal slope compensation circuit has been
implemented to simplify the external circuit design.
On/Off Control
The LD7575B can be controlled to turn off by pulling COMP
pin to lower than 1.2V.
The gate output pin of LD7575B will
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
LD7575B
VCC
UVLO(on)
UVLO(off)
OLP
2nd UVLO(off)
OLP Counter Reset
t
COMP
30mS
5.0V
OLP trip Level
t
OUT
Fig. 18
Switching
Non-Switching
Switching
Fault Protection
t
A lot of protection features have been implemented in the
LD7575B to prevent the power supply or adapter from being
Fig. 17
damaged caused by single fault condition on the open or
short condition on the pin of LD7575B. Under the conditions
OVP (Over Voltage Protection) on Vcc
listed below, the gate output will be off immediately to
The Vgs ratings of the nowadays power MOSFETs are most
protect the power circuit ---
with maximum 30V. To prevent the Vgs from the fault
y
RT pin short to ground
condition, LD7575B is implemented an OVP function on Vcc.
y
RT pin floating
Whenever the Vcc voltage is higher than the OVP threshold
y
CS pin floating
voltage, the output gate drive circuit will be shutdown
simultaneous thus to stop the switching of the power
Pull-Low Resistor on the Gate Pin of MOSFET
MOSFET until the next UVLO(on).
The Vcc OVP function in LD7575B is an auto-recovery type
In LD7575B, an anti-floating resistor is implemented on the
protection.
If the OVP condition, usually caused by the
OUT pin to prevent the output from any uncertain state
feedback loop opened, is not released, the Vcc will tripped
which may causes the MOSFET working abnormally or false
the OVP level again and re-shutdown the output.
triggered-on.
is working as a hiccup mode.
The Vcc
However, such design won’t cover the
condition of disconnection of gate resistor Rg thus it is still
Figure 18 shows its
operation.
strongly recommended to have a resistor connected on the
On the other hand, if the OVP condition is removed, the Vcc
MOSFET gate terminal (as shown in figure 19) to provide
level will get back to normal level and the output is
extra protection for fault condition.
automatically returned to the normal operation.
This external pull-low resistor is to prevent the MOSFET
from damage during power-on under the gate resistor is
disconnected.
In such single-fault condition, as show in
figure 20, the resistor R8 can provide a discharge path to
avoid the MOSFET from being false-triggered by the current
through the gate-to-drain capacitor Cgd.
Therefore, the
MOSFET is always pull-low and kept in the off-state
whenever the gate resistor is disconnected or opened in any
case.
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
LD7575B
in figure 21, a small negative spike on the HV pin may
trigger this parasitic SCR and causes the latchup between
Vcc and GND.
And such latchup is easy to damage the
chip because of the equivalent short-circuit which is induced
by such latchup behavior.
Thanks to the Leadtrend’s proprietary Hi-V technology,
there is no such parasitic SCR in LD7575B.
Figure 22
shows the equivalent circuit of LD7575B’s Hi-V structure.
So that LD7575B is with higher capability to sustain
negative voltage than similar products. However, a 40KΩ
resistor is recommended to implement on the Hi-V path to
be played the role as a current limit resistor whenever a
negative voltage is applied in any case.
Fig. 19
Fig. 21
dV
i = Cgd ⋅ bulk
dt
Fig. 22
Fig. 20
Protection Resistor on the Hi-V Path
In some other Hi-V process and design, there may cause a
parasitic SCR between HV pin, Vcc and GND.
As shown
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
LD7575B
Reference Application Circuit --- 10W (5V/2A) Adapter
Pin < 0.15W when Pout = 0W & Vin = 264Vac
Schematic
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
LD7575B
BOM
P/N
Component Value
Original
P/N
Component Value
Note
R1A
N/A
C1
22μF, 400V
R1B
N/A
C2
22μF, 50V
L-tec
R4A
39KΩ, 1206
C4
1000pF, 1000V, 1206
Holystone
R4B
39KΩ, 1206
C5
0.01μF, 16V, 0805
R6
2.2Ω, 1206
C51
1000pF, 50V, 0805
R7
10Ω, 1206
C52
1000μF, 10V
L-tec
R8
10KΩ, 1206
C54
470μF, 10V
L-tec
R9
10KΩ, 1206
C55
0.022μF, 16V, 0805
RS1
2.7Ω, 1206, 1%
CX1
0.1μF
X-cap
RS2
2.7Ω, 1206, 1%
CY1
2200pF
Y-cap
RT
100KΩ, 0805, 1%
D1A
1N4007
R51A
100Ω, 1206
D1B
1N4007
R51B
100Ω, 1206
D1C
1N4007
R52
2.49KΩ, 0805, 1%
D1D
1N4007
R53
2.49KΩ, 0805, 1%
D2
PS102R
R54
100Ω, 0805
D4
1N4007
R55
1KΩ, 0805
Q1
2N60B
R56A
2.7KΩ, 1206
CR51
SB540
R56B
N/A
ZD51
6V2C
NTC1
5Ω, 3A
08SP005
IC1
LD7575B
FL1
20mH
UU9.8
IC2
EL817B
T1
EI-22
IC51
TL431
L51
2.7μH
F1
250V, 1A
Z1
N/A
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LD7575B-DS-00 May 2008
L-tec
600V, 2A
SOP-8
1%
LD7575B
Package Information
SOP-8
Dimensions in Millimeters
Dimensions in Inch
Symbols
MIN
MAX
MIN
MAX
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.178
0.229
0.007
0.009
I
0.102
0.254
0.004
0.010
J
5.791
6.198
0.228
0.244
M
0.406
1.270
0.016
0.050
θ
0°
8°
0°
8°
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LD7575B-DS-00 May 2008
LD7575B
Package Information
DIP-8
Dimension in Millimeters
Dimensions in Inches
Symbol
Min
Max
Min
Max
A
9.017
10.160
0.355
0.400
B
6.096
7.112
0.240
0.280
C
-----
5.334
------
0.210
D
0.356
0.584
0.014
0.023
E
1.143
1.778
0.045
0.070
F
2.337
2.743
0.092
0.108
I
2.921
3.556
0.115
0.140
J
7.366
8.255
0.29
0.325
L
0.381
------
0.015
--------
Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should
verify the datasheets are current and complete before placing order.
0
□
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Leadtrend Technology Corporation
LD7575B-DS-00 May 2008
LD7575B
Revision History
Rev.
Date
Change Notice
00
5/26/2008
Original Specification.
17
Leadtrend Technology Corporation
LD7575B-DS-00 May 2008