ETC UBA2212

UBA2212
Half-bridge power IC family for CFL lamps
Rev. 1 — 9 December 2011
Objective data sheet
1. General description
The UBA2212 family of integrated circuits are a range of high voltage monolithic ICs for
driving Compact Fluorescent Lamps (CFL) in half-bridge configurations. The family is
designed to provide easy integration of lamp loads across a range of burner power and
mains voltages.
2. Features and benefits
2.1 System integration
 Integrated half-bridge power transistors
 UBA2212CT: 120 V; 2 ; 3.5 A maximum ignition current
 UBA2212CP: 120 V; 2 ; 3.5 A maximum ignition current
 Integrated bootstrap diode
 Integrated high-voltage supply
2.2 General
 Adjustable current controlled preheat mode enables the preheat time (tph) to be set
 RMS current control
2.3 Fast and smooth light out
 Boost with externally controlled timing
 Temperature controlled timing during boost state
 Smooth transition from ignition to boost and boost to burn state
2.4 Burner lifetime




Current controlled preheat with adjustable preheat time
Minimum glow time control to support cold start
Lamp power independent from mains voltage variations
Lamp inductor saturation protection during ignition
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
2.5 Safety





Saturation Current Protection (SCP)
OverTemperature Protection (OTP)
Capacitive Mode Protection (CMP)
Overpower control
System shutdown when the burner fails to ignite
2.6 Ease of use
 Adjustable operating frequency for easy fit with various burners
 Each device in the family incorporates the same controller functionality ensuring easy
power scaling and roll-out across a complete range of CFLs
3. Applications
 Compact Fluorescent Lamps up to 23 W for 120 V (AC) indoor and outdoor
applications
4. Ordering information
Table 1.
Ordering information
Type number
UBA2212
Objective data sheet
Package
Name
Description
Version
UBA2212CP/1
DIP14
plastic dual inline package; 14 leads
SOT27-1
UBA2212CT/1
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
2 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
5. Block diagram
startup
UBA2212
VDD
DVDT
HV
6
5
3
4 PGND
VDD
14 FS
VDD
VO(ref)RMS
OTP170
OTP120
Isat
reset
HSPT
DRIVER
LATCH
reset
HSPT
set
1 OUT
GLOW AND Isat
CONTROL
PULSE
RC 7
SW 8
boost/burn
VOLTAGE
CONTROLLED
OSCILLATOR
fosc
:2
HS on
NON-OVERLAP LS on
TIMER
VSW
CB 9
LSPT
preheat
RMS control
preheat
LSPT
DRIVER
12 SENSE
boost/burn
10 CSI
X2 - VO(ref)RMS2
preheat
PREHEAT TIMER
SGND 2, 11, 13
preheat state
boost
BOOST TIMER
Vref(ph)
boost state
burn state
Vref(boost)
Vref(burn)
001aan301
Fig 1.
Block diagram
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
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UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
6. Pinning information
6.1 Pinning
OUT
1
14 FS
SGND
2
13 SGND
HV
3
12 SENSE
PGND
4
DVDT
5
VDD
6
9
RC
7
8
UBA2212
OUT
1
14 FS
SGND
2
13 SGND
HV
3
12 SENSE
11 SGND
PGND
4
10 CSI
DVDT
5
CB
VDD
6
9
CB
SW
RC
7
8
SW
UBA2212
10 CSI
001aan336
aaa-000382
Fig 2.
11 SGND
Pin configuration for UBA2212CP (SOT27-1)
Fig 3.
Pin configuration for UBA2212CT (SOT108-1)
6.2 Pin description
Table 2.
UBA2212
Objective data sheet
Pin description
Symbol
Pin
Description
OUT
1
half-bridge output
SGND
2, 11, 13
signal ground
HV
3
high-voltage supply
PGND
4
DVDT supply ground
DVDT
5
DVDT supply input
VDD
6
internal low-voltage supply output
RC
7
internal oscillator input
SW
8
sweep timing and VCO input
CB
9
boost timing capacitor/preheat integrating capacitor
CSI
10
current feedback sense input
SENSE
12
voltage sense for preheat and RMS control
FS
14
high-side floating supply output
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
4 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
7. Functional description
7.1 Supply voltage
The UBA2212 family is powered using a start-up current source and a DVDT supply.
When the voltage on pin HV increases, the VDD capacitor (CVDD) is charged using the
internal Junction gate Field-Effect Transistor (JFET) current source. The voltage on pin
VDD rises until VDD equals VDD(start). The start-up current source is then disabled. The
half-bridge starts switching causing the charge pump to generate the required VDD supply.
The amount of current flowing towards VDD equals VHV  CDVDT  f where f represents the
momentary frequency. The charge pump consists of an external half-bridge capacitor
(CDVDT). The DIP14 and SO14 packages contain two internal diodes with an internal
Zener diode. The Zener diode ensures the VDD voltage cannot rise above the maximum
VDD rating.
The DVDT supply has its own ground pin (PGND) to prevent large peak currents from
flowing through the external small signal ground pin (SGND).
The start-up current source is enabled when the voltage on pin VDD is below VDD(stop).
7.2 Start-up state
When the supply voltage on pin VDD increases, the IC enters the start-up state. In the
start-up state, the High-Side Power Transistor (HSPT) is switched off and the Low-Side
Power Transistor (LSPT) is switched on. The circuit is reset and the capacitors on the
bootstrap pin FS (Cbs) and the low-voltage supply pin VDD (CVDD) are charged. Pins RC
and SW are switched to ground.
When pin VDD is above VDD(start), the start-up state is exited and the preheat state is
entered. If the voltage on pin VDD falls below VDD(stop), the system returns to the start-up
state.
Remark: If OTP is active, the IC remains in the start-up state for as long as this is the
case. The VDD voltage slowly oscillates between VDD = VDD(stop) and VDD = VDD(start).
7.3 Reset
A DC reset circuit is incorporated in the high-side driver. The high-side transistor is
switched off when the voltage on pin FS is below the high-side lockout voltage.
7.4 Oscillation control
The oscillation frequency is based on the 555-timer function. A self oscillating circuit is
created comprising the external components: resistors Rosc, RSENSE and capacitor Cosc.
Rosc and Cosc determine the nominal oscillating frequency.
An internal divider 0.5  fosc(int) is used to generate the accurate 50 % duty cycle. The
divider sets the bridge frequency at half the oscillator frequency.
The input on pin SW generates signal VSW. The VSW signal is used to determine the
frequency in all states except preheat and boost. Signal VSW(ph) is an internally generated
signal used to determine the frequency during the preheat state.
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
5 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
The output voltage of the bridge changes with the falling edge of the signal on pin RC. The
nominal half-bridge frequency is shown in Equation 1:
1
f osc  nom  = ------------------------------------------k osc  R osc  C osc
(1)
The maximum frequency is 2.5  fosc(nom) and is set at VSW. An overview of the oscillator,
internal LSPT and HSPT drive signals and the output is shown in Figure 4.
VRC
0
time (s)
HSPT driver
time (s)
0
LSPT driver
time (s)
0
VOUT
half-bridge
time (s)
0
001aam035
Fig 4.
Oscillator, HSPT/LSPT drivers and output signals
7.5 Preheat state
The IC enters the preheat state, the half-bridge circuit starts oscillating when the voltage
on pin VDD > VDD(start) and OTP is not activated. Current ISW charges the capacitor on pin
SW for the preheat timing. The RMS current control is active. This control sets the
frequency so that the RMS voltage across the sense resistor (RSENSE) is equal to Vref(ph).
This action ensures that RMS current through filament of the lamp is constant. In addition,
it ensures the power delivered is controlled to a pre-defined level during preheat stage.
During one oscillator cycle, the voltage on pin SENSE is squared and converted into a
positive current. This discharge current is added to the external capacitor CCB. During the
other oscillator clock cycle, the input of the squarer is connected to the internal reference
voltage Vref(ph). This voltage is squared and converted into a negative current. This charge
current is also added to capacitor CCB. When both currents are equal, then the Equation 2
is true:
T osc
1
---------T osc

0
T osc
1
V SENSE  t  dt = ---------T osc
2

V
ref  ph 
2
dt
(2)
0
Taking the square root of both sides results in:
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
6 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
T osc
1
---------T osc

T osc
2
V SENSE  t  dt =
0
1
---------T osc

V
ref  ph 
2
(3)
dt
0
or:
(4)
V SENSE  RMS  = R SENSE I LS = V ref  ph 
or:
V ref  ph 
I LS = -----------------R SENSE
(5)
Thus the current through the power switches together with the lamp filament (via a
constant ratio) is constant. In addition, the internal reference voltage Vref(ph) and the
external resistor RSENSE define the current; see Figure 4.
Vlamp
fosc(nom)
... ...
VCB
VSW
VCO input
time (s)
preheat
burn
ignition and boost
transition
Fig 5.
001aan302
Vlamp, fosc(int), VSW and VSW(ph) plotted against time
7.6 Ignition state
The ignition state is entered after the preheat state has finished. Current ISW charges the
capacitor on pin SW (CSW) up to 0.6  VH(RC) which corresponds to the frequency
fosc(nom).
During this frequency sweep (fSW), the resonance frequency is reached resulting in the
ignition of the lamp (see Figure 4). The lamp inductor (Llamp) and lamp capacitor (Clamp)
set the resonance frequency. The ignition state ends when the voltage on pin SW (VSW)
reaches 0.6  VH(RC).
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
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UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
7.7 Boost state and transition to steady state
The boost state is entered after ignition. The RMS current control circuit is reused in boost
stage. The output of RMS current control circuit together with input of VCO is switched to
capacitor CSW. At the same time, the input of RMS current control circuit is switched to pin
CSI from pin SESNE to sense lamp current. On pin CB, capacitor CCB is connected to the
boost timer input of to control the boost time. VSW goes up because the lamp remains off
causing the frequency to continue fall. When ignition frequency is reached, the lamp
ignites. VSW increases to a given voltage to set the lamp current to the level pre-defined
by the internal boost reference and resistor RCSI. The calculation is shown in Equation 6:
V ref  bst 
Boost I lamp = ------------------R CSI
(6)
When boost timer gives a signal to indicate that boost stage has ended, the transition from
boost to steady state starts to avoid flicker. At this stage, boost transition timer is active to
define the transition time, which is also realized with capacitor CCB on CB pin.
7.8 Steady state
When the RMS current control circuit leaves the system operating at the normal lamp
current, it enters the steady state. In this state, the voltage on pin CB is fixed and the
voltage on pin SW is controlled by a feedback loop. This feature enables the lamp current
to be independent of the mains or lamp voltage.
This results in constant IC thermal dissipation and temperature at the defined ambient
temperature. The same analysis as with the preheat stage can be used to express lamp
current (Equation 7):
V ref  burn 
Burn I lamp = ----------------------R CSI
(7)
Therefore, the boost-burn ratio can be found as shown in Equation 8:
V ref  bst 
Boost to burn ratio = ----------------------V ref  burn 
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
(8)
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UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
7.9 Non-overlap time
The non-overlap time is defined as the time when both MOSFETs are not conducting. The
non-overlap time is fixed internally and is fixed at the tno value (see Table 5).
7.10 OverTemperature Protection (OTP)
OTP is active in all states except boost. When the die temperature reaches the OTP
activation threshold (Tth(act)otp), the oscillator is stopped and the power switches
(LSPT/HSPT) are set to the start-up state. When the oscillator is stopped, the DVDT
supply no longer generates the supply current IDVDT. Voltage VDD gradually decreases
and the start-up state is entered as described in Section 7.2 on page 5. OTP is reset when
the temperature < Tth(rel)otp.
During boost state, the threshold of temperature is Tj(end)bst which is lower than Tth(otp).
When the die temperature has reached Tj(end)bst, the boost state ends, the IC enters
steady state and OTP is enabled.
7.11 Minimum glow time control
If the preheat time is set too short or omitted, the lamp electrodes do not have the correct
temperature in the ignition state. This results in instant light but also in a reduced
switching lifetime because when the electrode temperature is too low electrode sputtering
and damage occur. The minimum glow time control minimizes electrode damage by
ensuring maximum power use during the glow phase to heat the electrodes heat as
quickly as possible (see Figure 6).
Vlamp
fosc
... ...
VCB
VSW
VCO input
time (s)
preheat
ignition and boost
burn
transition
Fig 6.
001aan370
Vlamp, fosc(int), VSW and VSW(ph) plotted against time
Remark: . The glow time control is active as tph is too short to preheat the electrodes
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
9 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
7.12 Saturation Current Protection (SCP)
A critical parameter in the design of the lamp inductor is its saturation current. When the
momentary inductor exceeds its saturation current, the inductance drops significantly. The
inductor current and the current flowing through the LSPT and HSPT power switches
increases rapidly if this happens. The increase can cause the current to exceed the
half-bridge power transistors maximum ratings.
Saturation of the lamp inductor is likely to occur in cost-effective and miniaturized CFLs.
The UBA2212 family internally monitors the power transistor current. When this current
exceeds the momentary rating of the internal half-bridge power transistors, the conduction
time is reduced and the frequency is slowly increased (by discharging CSW). This function
causes the system to balance at the edge of the current rating of the power switches.
7.13 Capacitive Mode Protection (CMP)
In preheat stage, when CMP is detected, discharge of capacitor CCB occurs by a current
source which is a function of the hard switching level. Figure 7 shows the relationship
between the discharge current and hard switching level. The discharge current is
transferred to voltage and it uses a 100 nF capacitor in the example). This discharge
current is larger than the output current of RMS control circuit, so that CMP controls the
system operation. The frequency increases very slowly until hard switching is no longer
detected. Once CMP is no longer active, the system increases to the preheating
frequency determined by defined preheat current.
In boost and burn state, VSW determines the operating frequency. The RMS current
control circuit and CMP circuit control this frequency. When capacitive mode is detected,
capacitor CSW is mainly controlled by the CMP circuit. capacitor CSW is discharged by a
current source, which is also dependent on hard switching voltage level (as shown in
Figure 7). The operating frequency fosc, increase until CMP is no longer detected.
Remark: CMP always controls the operation. If the lamp or preheat current is smaller than
the defined value before CMP is detected, the system moves to the border of hard
switching ~25 V. The set value is not achievable. Change the LC tank to get a higher
resonant gain which enables the required lamp or preheat current to be obtained.
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
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UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
8. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
operating
-
202
V
mains transients during 0.5 s
-
250
V
VHV
VHV + 14
V
0
14
V
5
+5
V
VHV
voltage on pin HV
VFS
voltage on pin FS
VDD
supply voltage
VSENSE
voltage on pin SENSE
VRC
voltage on pin RC
IRC < 1 mA
0
VDD
V
VSW
voltage on pin SW
ISW < 1 mA
0
VDD
V
IOUT
current on pin OUT
Tj < 125 C
3.5
+3.5
A
IDVDT
current on pin DVDT
Tj < 125 C
2.5
+2.5
A
Vi(CSI)
input voltage on pin CSI Tj > 40 C
3.5
+3.5
V
SR
slew rate
4
+4
V/ns
Tj
junction temperature
40
+150
C
Tamb
ambient temperature
40
+150
C
Tstg
storage temperature
55
+150
C
VESD
electrostatic discharge
voltage
pins HV, FS, OUT
-
800
V
pins SW, RC, VDD, DVDT
-
2.5
kV
-
400
V
DC supply
repetitive output on pin OUT
Human Body Model (HBM):
[1]
Charged Device Model
(CDM):
pins SW, RC, VDD, DVDT,
CSI and CB
[1]
In accordance with the Human Body Model (HBM): equivalent to discharging a 100 pF capacitor through a
1.5 k series resistor.
9. Thermal characteristics
Table 4.
Symbol
Thermal characteristics
Parameter
Conditions
Typ
Unit
DIP14 package
Rth(j-a)
Rth(j-c)
thermal resistance from junction to ambient
thermal resistance from junction to case
in free air
[1]
70
K/W
in free air
[1]
16
K/W
SO14 package
Rth(j-a)
thermal resistance from junction to ambient
in free air
[1]
95
K/W
Rth(j-c)
thermal resistance from junction to case
in free air
[1]
16
K/W
[1]
UBA2212
Objective data sheet
In accordance with IEC 60747-1
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
11 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
10. Characteristics
Table 5.
Characteristics
Tj = 25 C; all voltages are measured with respect to SGND; positive currents flow into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Low-voltage supply
Start-up state
IHV
current on pin HV
VHV = 60 V
-
1.5
-
mA
VDD(start)
start supply voltage
oscillation start
11.5
12.5
13.5
V
VDD(stop)
stop supply voltage
oscillation stop
8.5
9
9.5
V
VDD(hys)
hysteresis of supply voltage
start  stop
VDD(reg)
regulation supply voltage
Isink
sink current
capability of VDD regulator
on-state resistance
HS; VHV = 170 V; ID = 200 mA
-
2
-

LS; VHV = 170 V; ID = 200 mA
-
2
-

-
1.4
-
HS; IF = 320 mA
-
1.1
-
V
LS; IF = 320 mA
-
1.2
-
V
bootstrap diode; IF = 1 mA
0.7
1
1.3
V
3
3.5
4
V
-
12.5
-
V
6
-
-
mA
Output stage
Ron
Ron(150)/
Ron(25)
on-state resistance ratio
(150 C to 25 C)
VFd
diode forward voltage
tno
non-overlap time
0.9
1.2
1.5
s
VFS
voltage on pin FS
UnderVoltage LockOut with respect to
pin OUT
3.9
4.5
5.1
V
IFS
current on pin FS
VHV = 170 V; VFS = 12 V
10
14
18
A
Isat
saturation current
HS; VDS = 14 V; Tj  125 C
3.5
-
-
A
LS; VDS = 14 V; Tj  125 C
3.5
-
-
A
Internal oscillator
fosc(min)
minimum oscillator frequency
Rosc = 100 k; Cosc = 220 pF;
VSW = VDD
-
36
-
kHz
fosc(max)
maximum oscillator frequency
Rosc = 100 k; Cosc = 220 pF; VSW = 0 V
-
104
-
kHz
Rosc = 100 k; Cosc = 220 pF;
T = 20 to +150 C
-
2
-
%
fosc(nom)/T nominal oscillator frequency
variation with temperature
kH
high-level trip point factor
0.382
0.395 0.408
kL
low-level trip point factor
0.030
0.033 0.036
VH(RC)
HIGH-level voltage on pin RC
trip point; VH(RC) = kH  VDD
4.58
4.94
VL(RC)
LOW-level voltage on pin RC
trip point; VL(RC) = kL  VDD
0.367
0.413 0.458 V
Kosc
oscillator constant
Rosc = 100 k; Cosc = 220 pF
1.065
1.1
1.135
-
620
-
mV
5.29
V
Preheat function
Vref(ph)
preheat reference voltage
tph
preheat time
CSW = 47 nF
-
0.55
-
s
fph
preheat frequency
Rosc = 100 k; Cosc = 220 pF
-
90
-
kHz
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
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12 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
Table 5.
Characteristics …continued
Tj = 25 C; all voltages are measured with respect to SGND; positive currents flow into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VRC
voltage on pin RC
trip point during preheat state
-
0.3
-
V
Boost function
VO(ref)bst
boost reference output voltage
Tj(end)bst
boost end junction temperature
tbst
boost time
tt(bst-burn)
VDD = 12 V; HV = 30 V; VSW = 3 V
-
450
-
mV
-
90
-
C
CSW = 220 nF
-
48
-
s
transition time from boost to burn CSW = 220 nF
-
2
-
s
mV
RMS current control function
VO(ref)RMS
RMS reference output voltage
VDD = 12 V; HV = 30 V; VSW = 3 V
-
300
-
NLCBR
lamp current boost ratio
boost and steady state
-
1.5
-
OTP function
Tth(act)otp
overtemperature protection
activation threshold temperature
-
170
-
C
Tth(rel)otp
overtemperature protection
release threshold temperature
-
100
-
C
UBA2212
Objective data sheet
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Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
13 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
11. Application information
LFILT
C6
CDVDT
D1
L2
D4
CFS
U1
OUT
SGND
L_N
CFL
HV
PGND
CBUF
AC input
DVDT
Rfuse
L_L
VDD
C7
C5
D2
Rosc
C8
CVDD
D3
RC
1
14
2
13
3
12
4
UBA2212 11
5
10
6
9
7
8
FS
SGND
SENSE
SGND
CSI
CB
SW
Cosc
CSW
CB
RCSI
001aan371
Fig 7.
Application diagram
Table 6.
Bill of materials
Number Reference
UBA2212
Objective data sheet
Typical value
Quantity
1
Rfuse
10 ; 1 W - no value for fuse resistor
1
2
D1, D2, D3, D4
diode, 1 A; 1000 V; 1N4007
4
3
CBUF
electrolytic capacitor; 33 F; 250 V; 105 C
1
4
LFILT
inductor; 3 mH; 0.5 A
1
5
CDVDT
ceramic capacitor; 330 pF; 500 V; 1206
1
6
CFS
ceramic capacitor; 22 nF; 50 V; 0805
1
7
CB
ceramic capacitor; 220 nF; 50 V; 0805
1
8
CSW
ceramic capacitor; 68 nF; 50 V; 0805
1
9
Cosc
ceramic capacitor; 220 pF; 50 V; 0805
1
10
CVDD
ceramic capacitor; 100 nF; 50 V; 0805
1
11
Rosc
chip resistor; 100 k; 5 %; 0805
1
12
C6; C7
film capacitor; 82 nF; 100 V
2
13
C5
film capacitor; 6.8 nF; 1 kV
1
14
C8
film capacitor; 8.2 nF; 400 V
1
15
RCSI
chip resistor; 1.8 ; 1 %; 0.25 W
1
16
L2
PC40-EE16; 1.5 mH; 1 A; N = 180 : 6 : 6;
diameter 0.23 mm
1
18
U1
UBA2213CT; SO14
1
19
Burner
burner; T3 Spiral 20 W
1
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
14 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
12. Package outline
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
w M
b1
(e 1)
b
MH
8
14
pin 1 index
E
1
7
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.2
inches
0.17
0.02
0.13
0.068
0.044
0.021
0.015
0.014
0.009
0.77
0.73
0.26
0.24
0.1
0.3
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
Fig 8.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT27-1
050G04
MO-001
SC-501-14
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
Package outline SOT27-1 (DIP14)
UBA2212
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
15 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.010 0.057
inches 0.069
0.004 0.049
0.05
0.244
0.039
0.041
0.228
0.016
0.028
0.024
0.01
0.01
0.028
0.004
0.012
θ
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
Fig 9.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Package outline SOT108-1 (SO14)
UBA2212
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
16 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
13. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
UBA2212 v.1
20111209
Objective data sheet
-
-
UBA2212
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
17 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
14.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
UBA2212
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
18 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
UBA2212
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 December 2011
© NXP B.V. 2011. All rights reserved.
19 of 20
UBA2212
NXP Semiconductors
Half-bridge power IC family for CFL lamps
16. Contents
1
2
2.1
2.2
2.3
2.4
2.5
2.6
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
8
9
10
11
12
13
14
14.1
14.2
14.3
14.4
15
16
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
System integration . . . . . . . . . . . . . . . . . . . . . . 1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Fast and smooth light out . . . . . . . . . . . . . . . . . 1
Burner lifetime . . . . . . . . . . . . . . . . . . . . . . . . . 1
Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ease of use. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5
Start-up state . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Oscillation control . . . . . . . . . . . . . . . . . . . . . . . 5
Preheat state . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ignition state . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Boost state and transition to steady state. . . . . 8
Steady state . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Non-overlap time . . . . . . . . . . . . . . . . . . . . . . . 9
OverTemperature Protection (OTP) . . . . . . . . . 9
Minimum glow time control . . . . . . . . . . . . . . . . 9
Saturation Current Protection (SCP) . . . . . . . 10
Capacitive Mode Protection (CMP) . . . . . . . . 10
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal characteristics . . . . . . . . . . . . . . . . . 11
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 12
Application information. . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Contact information. . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 9 December 2011
Document identifier: UBA2212