DDR-SDRAM Termination Regulator BD3530F ●Dimension (Unit : mm) ●Description BD3530F is a regulator developed as termination power supply of standard DDR-SDRAM that is used for PC. Industry's highest speed of transient response characteristic is realized. The built-in FET can sink and source load current of 3A(max.) Waveform quality when data is transferred at high speed can't be deteriorated. BD3530F meets the bus line standards SSTL-2 of DDR-SDRAM. High-reliability can be realized for any applications using DDR-SDRAM. 5.0±0.2 5 1 4 1.5±0.1 0.11 6.2±0.3 4.4±0.2 0.3Min. 8 1.27 0.4±0.1 SOP8 ●Features 1) 2) 3) 4) 5) 6) Built-in push-pull regulator for termination(VTT) Built-in reference voltage circuit(VREF) Built-in enable function Built-in under voltage lock out circuit Package SOP8 Built-in thermal shut down circuit ●Applications Note personal computer, Desktop personal computer ●Absolute Maximum Ratings（Ta=25˚C） Parameter Input voltage Termination input voltage Limits Symbol Unit VCC 7 ＊1 VTT_IN 7 ＊1 V V V VDDQ 7 ＊1 Power dissipation 1 Pd1 560 ＊2 mW Power dissipation 2 Pd 2 690 ＊3 mW Operating temperature range Topr Storage temperature range Tstg VDDQ reference voltage +100 -55 ∼ +150 -10 ∼ ˚C ˚C ＊1 Should not exceed Pd. ＊2 Reduced by 4.48mW for each increase in Ta of 1˚C over 25˚C(With no heat sink). ＊3 Reduced by 5.52mW for each increase in Ta of 1˚C over 25˚C(PCB(70mm×70mm×1.6mm)glass epoxy mounting.) 0.15±0.1 0.1 ●Recommended Operating Conditions（Ta=25˚C） Parameter Input voltage Termination input voltage Symbol Min. Typ. Max. Unit VCC 4.5 - 5.5 V VTT_IN 1.7 - 2.6 V *This product is designed for protection against radioactive rays. ●Electrical characteristics (Unless otherwise noted, Ta=25˚C, VCC=5V, VEN=3V, VDDQ=2.5V, VTT_IN=2.5V） Parameter Standby current Bias current Symbol IST Min. Typ. Max. Unit - - 10 µA ICC - 2 4 mA VTT VREF-30mV VREF VREF+30mV V Conditions VEN=0V <Termination> Termination voltage Source current ITT+ 3 - - Sink current ITT- - - -3 A A Upper side ON resistance HRON - 0.15 0.3 Ω Lower side ON resistance LRON - 0.15 0.3 Ω Output voltage Source current VREF IREF+ 1/2× VDDQ-50mV 1/2× VDDQ 1/2× VDDQ+50mV 10 20 - V mA Sink current IREF- - -20 -10 mA VUVLO ΔVUVLO 4.2 100 4.35 160 4.5 220 V Io=-3A to 3A, Ta=0℃ to 100℃ ＊ IREF=-10mA to 10mA Ta=0℃ to 100℃ ＊ <Reference voltage> <UVLO> UVLO OFF voltage Hysteresis voltage mV VCC : Sweep up VCC : Sweep down ＊Design Guarantee ●Application Circuit VDDQ VCC VDDQ VCC VCC Enable EN VTT_IN 25kΩ VCC VTT_IN VCC - Reference Block + UVLO 25kΩ TSD EN UVLO VTT Liner N-MOS Driver TSD EN UVLO Thermal Protection VTTS TSD VREF BD3530F GND VTT 1/2× VDDQ