IRL510S, SiHL510S Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) 100 RDS(on) () VGS = 5 V 0.54 Qg (Max.) (nC) 6.1 Qgs (nC) 2.6 Qgd (nC) 3.3 Configuration Single D DESCRIPTION D2PAK (TO-263) G G D S • Halogen-free According to IEC 61249-2-21 Definition • Surface Mount • Available in Tape and Reel • Dynamic dV/dt Rating • Repetitive Avalanche Rated • Logic-Level Gate Drive • RDS(on) Specified at VGS = 4 V and 5 V • 175 °C Operating Temperature • Compliant to RoHS Directive 2002/95/EC S N-Channel MOSFET Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D2PAK (TO-263) is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free D2PAK (TO-263) SiHL510S-GE3 IRL510SPbF SiHL510S-E3 D2PAK (TO-263) SiHL510STRL-GE3a IRL510STRLPbFa SiHL510STL-E3a Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current SYMBOL VDS VGS VGS at 5 V TC = 25 °C TC = 100 °C ID IDM Pulsed Drain Currenta Linear Derating Factor Linear Derating Factor (PCB Mount)e EAS Single Pulse Avalanche Energyb IAR Avalanche Currenta EAR Repetiitive Avalanche Energya Maximum Power Dissipation TC = 25 °C PD TA = 25 °C Maximum Power Dissipation (PCB Mount)e dV/dt Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range TJ, Tstg Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, starting TJ = 25 °C, L = 4.8 mH, Rg = 25 , IAS = 5.6 A (see fig. 12). c. ISD 5.6 A, dI/dt 75 A/μs, VDD VDS, TJ 175 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). LIMIT 100 ± 10 5.6 4.0 18 0.29 0.025 100 5.6 4.3 43 3.7 5.5 - 55 to + 175 300d UNIT V A W/°C mJ A mJ W V/ns °C * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 90380 S11-1045-Rev. C, 30-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL510S, SiHL510S Vishay Siliconix THERMAL RESISTANCE RATINGS SYMBOL TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - 62 Maximum Junction-to-Ambient (PCB Mount)a RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 3.5 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0, ID = 250 μA 100 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.12 - V/°C Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 1.0 - 2.0 V Gate-Source Leakage IGSS VGS = ± 10 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 100 V, VGS = 0 V - - 25 VDS = 80 V, VGS = 0 V, TJ = 150 °C - - 250 Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs VGS = 5 V ID = 3.4 Ab - - 0.54 VGS = 4 V ID = 2.8 Ab - - 0.76 1.9 - - - 250 - - 80 - - 15 - - - 6.1 - - 2.6 VDS = 50 V, ID = 3.4 Ab μA S Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 5 V ID = 5.6 A, VDS = 80 V, see fig. 6 and 13b Gate-Drain Charge Qgd - - 3.3 Turn-On Delay Time td(on) - 9.3 - - 47 - - 16 - - 18 - - 4.5 - - 7.5 - - - 5.6 - - 18 Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 50 V, ID = 5.6 A, Rg = 12 , RD = 8.4 , see fig. 10b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact pF nC ns D nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 5.6 A, VGS = 0 Vb TJ = 25 °C, IF = 5.6 A, dI/dt = 100 A/μsb - - 2.5 V - 110 130 ns - 0.50 0.65 μC Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. www.vishay.com 2 Document Number: 90380 S11-1045-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL510S, SiHL510S Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 175 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 90380 S11-1045-Rev. C, 30-May-11 www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL510S, SiHL510S Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 90380 S11-1045-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL510S, SiHL510S Vishay Siliconix RD VDS VGS D.U.T. Rg + - VDD 5V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature tr td(off) tf Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 90380 S11-1045-Rev. C, 30-May-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL510S, SiHL510S Vishay Siliconix L VDS VDS Vary tp to obtain required IAS tp VDD Rg D.U.T. + - I AS V DD VDS 5V 0.01 Ω tp Fig. 12a - Unclamped Inductive Test Circuit IAS Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 5V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 90380 S11-1045-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL510S, SiHL510S Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?90380. Document Number: 90380 S11-1045-Rev. C, 30-May-11 www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0° to 8° 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L4 Detail “A” Rotated 90° CW scale 8:1 L2 B A1 B A 2 x b2 c 2xb E 0.010 M A M B ± 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. MAX. View A - A INCHES MIN. 4 E1 Section B - B and C - C Scale: none MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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