FAIRCHILD FQB10N20C

TM
FQB10N20C/FQI10N20C
200V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supplies, DC-AC converters for
uninterrupted power supplies and motor controls.
•
•
•
•
•
•
9.5A, 200V, RDS(on) = 0.36Ω @VGS = 10 V
Low gate charge ( typical 20 nC)
Low Crss ( typical 40.5 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
D
"
G
S
FQB Series
Absolute Maximum Ratings
Symbol
VDSS
ID
G D S
!
FQI Series
S
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQB10N20C/FQI10N20C
200
Units
V
9.5
A
- Continuous (TC = 100°C)
IDM
Drain Current
"
"
G!
I2-PAK
D2-PAK
! "
- Pulsed
(Note 1)
6.0
A
38
A
VGSS
Gate-Source Voltage
± 30
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
210
mJ
IAR
Avalanche Current
(Note 1)
9.5
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
(Note 1)
7.2
5.5
72
0.57
-55 to +150
mJ
V/ns
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
--
40
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
62.5
°C/W
©2003 Fairchild Semiconductor Corporation
Typ
--
Max
1.74
Units
°C/W
Rev. A, August 2003
FQB10N20C/FQI10N20C
QFET
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
200
--
--
V
--
0.28
--
V/°C
VDS = 200 V, VGS = 0 V
--
--
10
µA
VDS = 160 V, TC = 125°C
--
--
100
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
2.0
--
4.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 4.75 A
--
0.29
0.36
Ω
gFS
Forward Transconductance
VDS = 40 V, ID = 4.75 A
--
5.5
--
S
--
395
510
pF
--
97
125
pF
--
40.5
53
pF
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 100 V, ID = 9.5 A,
RG = 25 Ω
(Note 4, 5)
VDS = 160 V, ID = 9.5 A,
VGS = 10 V
(Note 4, 5)
--
11
30
ns
--
92
190
ns
--
70
150
ns
--
72
160
ns
--
20
26
nC
--
3.1
--
nC
--
10.5
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
9.5
A
ISM
--
--
38
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 9.5 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 9.5 A,
dIF / dt = 100 A/µs
(Note 4)
--
158
--
ns
--
0.97
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 3.5mH, IAS = 9.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 9.5A, di/dt≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003
FQB10N20C/FQI10N20C
Electrical Characteristics
FQB10N20C/FQI10N20C
Typical Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Top :
ID, Drain Current [A]
1
10
o
150 C
ID, Drain Current [A]
1
10
0
10
o
25 C
o
-55 C
0
10
※ Notes :
1. 250μ s Pulse Test
2. TC = 25℃
※ Notes :
1. VDS = 40V
2. 250μ s Pulse Test
-1
-1
10
-1
0
10
10
1
10
2
10
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.5
IDR , Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
1
10
1.0
VGS = 10V
VGS = 20V
0.5
※ Note : TJ = 25℃
0
10
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
-1
0.0
0
5
10
15
20
25
30
10
0.2
0.4
ID, Drain Current [A]
0.8
1.0
1.2
1.4
1.6
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
1200
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1000
0.6
VDS = 40V
10
Capacitance [pF]
800
VGS , Gate-Source Voltage [V]
VDS = 100V
Ciss
Coss
600
Crss
400
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
200
VDS = 160V
8
6
4
2
※ Note : ID = 9.5A
0
-1
10
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2003 Fairchild Semiconductor Corporation
0
0
4
8
12
16
20
24
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, August 2003
FQB10N20C/FQI10N20C
Typical Characteristics
(Continued)
1.2
3.0
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μ A
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 4.75 A
0.5
0.0
-100
200
-50
0
50
100
150
200
o
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
10
Operation in This Area
is Limited by R DS(on)
2
10
8
100 µs
1
1 ms
ID, Drain Current [A]
ID, Drain Current [A]
10
10 ms
DC
0
10
※ Notes :
-1
10
o
6
4
2
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
0
25
-2
10
0
1
10
2
10
50
10
※ N o te s :
1 . Z θ J C( t ) = 1 . 7 4 ℃ / W M a x .
2 . D u ty F a c t o r , D = t 1 / t 2
3 . T J M - T C = P D M * Z θ J C( t )
0 .0 5
-1
PDM
0 .0 2
JC
(t), T h e rm a l R e s p o n s e
150
D = 0 .5
0 .1
0 .0 1
t1
Z
θ
s in g le p u ls e
10
125
0
0 .2
10
100
Figure 10. Maximum Drain Current
vs Case Temperature
Figure 9. Maximum Safe Operating Area
10
75
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003
FQB10N20C/FQI10N20C
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2003 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. A, August 2003
FQB10N20C/FQI10N20C
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003
FQB10N20C/FQI10N20C
Package Dimensions
4.50 ±0.20
9.90 ±0.20
+0.10
2.00 ±0.10
2.54 TYP
(0.75)
°
~3
0°
0.80 ±0.10
1.27 ±0.10
2.54 ±0.30
15.30 ±0.30
0.10 ±0.15
2.40 ±0.20
4.90 ±0.20
1.40 ±0.20
9.20 ±0.20
1.30 –0.05
1.20 ±0.20
(0.40)
D2PAK
+0.10
0.50 –0.05
2.54 TYP
9.20 ±0.20
(2XR0.45)
4.90 ±0.20
15.30 ±0.30
10.00 ±0.20
(7.20)
(1.75)
10.00 ±0.20
(8.00)
(4.40)
0.80 ±0.10
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003
(Continued)
I2PAK
4.50 ±0.20
(0.40)
9.90 ±0.20
+0.10
MAX13.40
9.20 ±0.20
(1.46)
1.20 ±0.20
1.30 –0.05
0.80 ±0.10
2.54 TYP
2.54 TYP
10.08 ±0.20
1.47 ±0.10
MAX 3.00
(0.94)
13.08 ±0.20
)
5°
(4
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
10.00 ±0.20
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003
FQB10N20C/FQI10N20C
Package Dimensions
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
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2. A critical component is any component of a life support
which, (a) are intended for surgical implant into the body,
device or system whose failure to perform can be
or (b) support or sustain life, or (c) whose failure to perform
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when properly used in accordance with instructions for use
device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2003 Fairchild Semiconductor Corporation
Rev. I5