® FQE10N20LC 200V Logic N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supplies, DC-AC converters for uninterrupted power supplies and motor controls. • • • • • • 4.0A, 200V, RDS(on) = 0.36Ω @VGS = 10 V Low gate charge ( typical 14.5 nC) Low Crss ( typical 44.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability D { ● ◀ G{ TO-126 GDS Symbol VDSS ID { FQE Series Absolute Maximum Ratings S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQE10N20LC 200 Units V 4 A - Continuous (TC = 100°C) IDM Drain Current ▲ ● ● - Pulsed (Note 1) 2.5 A 16 A ± 20 V 320 mJ VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) 4 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 1.28 5.5 12.8 0.10 -55 to +150 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case RθJA Thermal Resistance, Junction-to-Ambient ©2004 Fairchild Semiconductor Corporation Typ -- Max 9.8 Units °C/W -- 62.5 °C/W Rev. A, March 2004 FQE10N20LC QFET Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 200 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.28 VDS = 200 V, VGS = 0 V -- -- 10 µA VDS = 160 V, TC = 125°C -- -- 100 µA Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA Gate Threshold Voltage VDS = VGS, ID = 250 µA 1.0 -- 2.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 2.0 A VGS = 5 V, ID = 2.0 A -- 0.29 0.32 0.36 0.39 Ω gFS Forward Transconductance VDS = 30 V, ID = 2.0 A -- 5.2 -- S -- 375 490 pF IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 102 135 pF -- 45.5 60 pF -- 16.5 45 ns -- 220 450 ns -- 80 170 ns -- 110 230 ns Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 100 V, ID = 9.5 A, RG = 25 Ω (Note 4, 5) VDS = 160 V, ID = 9.5 A, VGS = 5 V (Note 4, 5) -- 14.5 19 nC -- 1.6 -- nC -- 9.5 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 4.0 A ISM -- -- 16 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 4.0 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time -- 163 -- ns Qrr Reverse Recovery Charge VGS = 0 V, IS = 9.5 A, dIF / dt = 100 A/µs -- 0.89 -- µC (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 30mH, IAS = 4.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 9.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2004 Fairchild Semiconductor Corporation Rev. A, March 2004 FQE10N20LC Electrical Characteristics FQE10N20LC Typical Characteristics VGS 10.0 V 8.0 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V Bottom : 2.5 V 10 ID, Drain Current [A] ID, Drain Current [A] 1 Top : 1 10 0 10 o 150 C o 0 25 C 10 o -55 C ※ Notes : 1. 250µ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 30V 2. 250µ s Pulse Test -1 -1 10 -1 0 10 10 1 10 0 10 2 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 1.0 1 IDR, Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 10 0.8 VGS = 5V 0.6 0.4 VGS = 10V 0.2 ※ Note : TJ = 25℃ 0.0 0 10 150℃ ※ Notes : 1. VGS = 0V 2. 250µ s Pulse Test -1 0 5 10 15 20 10 25 0.2 0.4 ID, Drain Current [A] 1400 Ciss Coss 600 Crss 400 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 200 1.0 1.2 1.4 12 VGS, Gate-Source Voltage [V] 1000 800 0.8 Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 1200 0.6 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Capacitance [pF] 25℃ VDS = 40V 10 VDS = 100V VDS = 160V 8 6 4 2 ※ Note : ID = 9.5A 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2004 Fairchild Semiconductor Corporation 0 0 4 8 12 16 20 24 28 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A, March 2004 FQE10N20LC Typical Characteristics (Continued) 2.5 RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 µA 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 0.5 0.0 -100 200 ※ Notes : 1. VGS = 10 V 2. ID = 2 A -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature 2 5 10 Operation in This Area is Limited by R DS(on) 4 100 µs ID, Drain Current [A] ID, Drain Current [A] 1 10 10 ms 1 ms 100 ms 0 10 DC ※ Notes : -1 10 o 1. TC = 25 C 3 2 1 o 2. TJ = 150 C 3. Single Pulse -2 10 0 1 10 0 25 2 10 10 50 Figure 9. Maximum Safe Operating Area 10 75 100 125 150 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] Figure 10. Maximum Drain Current vs Case Temperature 1 ZθJC(t), Thermal Response D = 0 .5 0 .2 10 ※ N o te s : 1 . Z θ J C ( t) = 9 .8 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .1 0 0 .0 5 0 .0 2 0 .0 1 10 PDM s in g le p u ls e -1 t1 10 t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 t 1 , S q u a r e W a v e P u ls e D u r a t io n [s e c ] Figure 11. Transient Thermal Response Curve ©2004 Fairchild Semiconductor Corporation Rev. A, March 2004 FQE10N20LC Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ 200nF 12V Qg 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RG RL VDS 90% VDD VGS VGS DUT 5V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2004 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A, March 2004 FQE10N20LC Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2004 Fairchild Semiconductor Corporation Rev. A, March 2004 FQE10N20LC Package Dimensions 8.00 ±0.30 ø3.20 ±0.10 11.00 ±0.20 3.25 ±0.20 14.20MAX 3.90 ±0.10 TO-126 (1.00) (0.50) 0.75 ±0.10 13.06 ±0.30 0.75 ±0.10 #1 2.28TYP [2.28±0.20] 2.28TYP [2.28±0.20] 16.10 ±0.20 1.75 ±0.20 1.60 ±0.10 +0.10 0.50 –0.05 Dimensions in Millimeters ©2004 Fairchild Semiconductor Corporation Rev. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2004 Fairchild Semiconductor Corporation Rev. I8