LD2982BXX18 Very low drop and low noise voltage regulator with inhibit function, low ESR capacitors compatible Features ■ Very low dropout voltage (120 mV at 50 mA and 7 mV at 1 mA load) ■ Very low quiescent current (375 mA typ. at 50 mA load and 75 mA at 1 mA) ■ Output current up to 50 mA ■ Logic controlled electronic shutdown ■ Output voltage of 1.8 V ■ Internal current and thermal limit ■ Available in ± 1 % tolerance (at 25 °C, A version) ■ Supply voltage rejection: 45 dB (typ) ■ Only 1 µF for stability ■ Low output noise voltage 30 µVrms ■ Smallest package SOT23-5L ■ Temperature range: -40 °C to 125 °C SOT23-5L ) s t( c u d o r Typical application are in cellular phone, palmtop/laptop computer, personal digital assistant (PDA), personal stereo, camcorder and camera. l o bs P e et O ) Description s ( t c u d The LD2982 is a 50 mA fixed output voltage regulator. The ultra low drop voltage and the low quiescent current make them particularly suitable for low noise, low power applications, and in battery powered systems. In sleep mode quiescent current is less than 1 µA when INHIBIT pin is pulled low. Shutdown logic control function is available on pin 3 (TTL compatible). This means that when the device is used as local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption. o r eP t e ol s b O An external capacitor CBYP = 10 nF connected between bypass pin and GND reduce the noise to 30 µVrms. Table 1. July 2009 Device summary Order code Output voltage LD2982BM18R 1.8 V Doc ID 8188 Rev 7 1/17 www.st.com 17 Contents LD2982BXX18 Contents 1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 ) s t( 6.1 External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.2 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.3 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.4 Important . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.5 Inhibit input operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 c u d o r P e et l o s Package mechanical data . . . . . . .b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 O Revision history . . . . . . ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 s t( c u d o r P e t e ol 6.6 7 8 Reverse current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 s b O 2/17 Doc ID 8188 Rev 7 LD2982BXX18 Diagram 1 Diagram Figure 1. Schematic diagram ) s t( c u d o r l o bs P e et O ) s ( t c u d o r eP t e ol s b O Doc ID 8188 Rev 7 3/17 Pin configuration LD2982BXX18 2 Pin configuration Figure 2. Pin connections (top view) Table 2. Pin description ) s t( Pin n° Symbol 1 IN 2 GND 3 INHIBIT Control switch ON/OFF. Inhibit is not internally pulled-up; it cannot be left floating. Disable the device when connected to GND or to a positive voltage less than 0.18V 4 Bypass Bypass Pin: Capacitor to be connected to GND in order to improve the thermal noise performances 5 OUT Table 3. Name and function c u d o r Input port Ground pin l o bs Output port Thermal data O ) s ( t c u d Symbol Parameter SOT23-5L Unit RthJC Thermal resistance junction-case 81 °C/W RthJA Thermal resistance junction-ambient 255 °C/W o r eP t e ol s b O 4/17 P e et Doc ID 8188 Rev 7 LD2982BXX18 Maximum ratings 3 Maximum ratings Table 4. Absolute maximum ratings Symbol VI Parameter VINH Note: Value Unit DC input voltage 16 V INHIBIT input voltage 16 V IO Output current Internally limited PD Power dissipation Internally limited TSTG Storage temperature range -65 to 150 °C TOP Operating junction temperature range -40 to 125 °C Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. ) s t( c u d o r l o bs P e et O ) s ( t c u d o r eP t e ol s b O Doc ID 8188 Rev 7 5/17 Electrical characteristics 4 LD2982BXX18 Electrical characteristics TJ = 25 °C, VI = VO + 1 V, IO = 1 mA, VSHDN = 2 V, CI = CO = 1 µF, unless otherwise specified. Table 5. Electrical characteristics for LD2982BXX18 Symbol VOP Parameter Test conditions Min. Operating input voltage 2.5 VI = 2.5V VO VO VO VO Output voltage Output voltage Output voltage Output voltage 1.477 1.530 VI = 2.8V 1.773 IO = 1 to 50mA 1.764 IO = 1 to 50mA, TJ= -40 to 125°C 1.737 VI = 3.5V 2.462 IO = 1 to 50mA 2.45 IO = 1 to 50mA, TJ= -40 to 125°C 2.412 VI = 3.8V 2.758 IO = 1 to 50mA 2.744 VO let t e l o s Ob VO VO VO 6/17 Output voltage Output voltage Output voltage 2.807 1.836 ) s t( 2.537 2.55 c u d o r 2.8 2.842 2.856 2.85 3.0 2.94 2.895 2.893 V 3.045 3.06 V 3.105 3.1 3.146 IO = 1 to 50mA 3.038 3.162 IO = 1 to 50mA, TJ= -40 to 125°C 2.991 3.208 VI = 4.2V 3.152 IO = 1 to 50mA 3.136 3.264 IO = 1 to 50mA, TJ= -40 to 125°C 3.088 3.312 VI = 4.3V 3.250 3.2 3.3 V 3.349 IO = 1 to 50mA 3.234 3.366 3.184 3.415 VI = 4.5V 3.447 IO = 1 to 50mA 3.430 3.5 V 3.248 IO = 1 to 50mA, TJ= -40 to 125°C V 3.552 3.370 IO = 1 to 50mA, TJ= -40 to 125°C 3.377 VI = 4.6V 3.546 IO = 1 to 50mA 3.528 3.672 IO = 1 to 50mA, TJ= -40 to 125°C 3.474 3.726 Doc ID 8188 Rev 7 V 2.898 2.907 3.053 V 2.587 2.950 IO = 1 to 50mA, TJ= -40 to 125°C V 1.863 2.5 2.793 2.955 V 1.827 2.750 VI = 4.1V c u d o r eP Output voltage t(s 1.8 eP 2.702 o s b O ) IO = 1 to 50mA Output voltage 1.523 1.553 VI = 4.0V VO V 1.470 IO = 1 to 50mA Output voltage 16 1.447 IO = 1 to 50mA, TJ= -40 to 125°C VO Unit IO = 1 to 50mA VI = 3.85V Output voltage 1.5 Max. IO = 1 to 50mA, TJ= -40 to 125°C IO = 1 to 50mA, TJ= -40 to 125°C VO Typ. V 3.662 3.6 3.654 V LD2982BXX18 Table 5. Electrical characteristics Electrical characteristics for LD2982BXX18 (continued) Symbol VO Parameter Test conditions Output voltage VO Output voltage VO Output voltage VO Output voltage Min. Typ. Max. VI = 4.8V 3.743 3.8 3.857 IO = 1 to 50mA 3.724 IO = 1 to 50mA, TJ= -40 to 125°C 3.667 VI = 5.0V 3.94 IO = 1 to 50mA 3.92 4.08 IO = 1 to 50mA, TJ= -40 to 125°C 3.86 4.14 VI = 5.7V 4.629 IO = 1 to 50mA 4.606 4.794 IO = 1 to 50mA, TJ= -40 to 125°C 4.535 4.864 VI = 6.0V 4.925 IO = 1 to 50mA IO = 1 to 100 mA, TJ= -40 to 125°C Short circuit current ISC 3.876 4.7 5 5.1 eP let IO = 1mA o s b IO = 10mA ) s t( 7 40 -O 120 t e ol s b O OFF MODE 80 IO = 1mA 100 200 IO = 10mA, TJ= -40 to 125°C 600 IO = 50mA, TJ= -40 to 125°C VIH Inhibit input logic high TJ= -40 to 125°C IINH Inhibit input current eN Output noise voltage 300 900 1 45 dB 0.15 2 V V VINH = 0V, TJ= -40 to 125°C 5 15 VINH = 5V, TJ= -40 to 125°C 0 -1 B = 300 Hz to 50 kHz, CBYP = 0.01µF, CO = 10µF 30 Doc ID 8188 Rev 7 µA 0 VINH<0.18V, TJ= -40 to 125°C TJ= -40 to 125°C 150 1200 VINH<0.18V CBYP = 0.01µF, CO = 10µF, f = 1kHz 100 400 IO = 50mA Supply voltage rejection 150 200 IO = 10mA Inhibit input logic low mV 150 IO = 1mA, TJ= -40 to 125°C VIL SVR 60 225 IO = 0, TJ= -40 to 125°C IQ 10 90 IO = 0 o r eP 3 15 IO = 50mA, TJ= -40 to 125°C Quiescent current ON MODE %/VI 5 IO = 10mA, TJ= -40 to 125°C IO = 50mA 0.014 c u d o r 1 IO = 1mA, TJ= -40 to 125°C c u d ) s t( mA 0.032 IO = 0, TJ= -40 to 125°C Dropout voltage V 400 VI = VO + 1V to 16V, IO = 1 mA, TJ= -40 to 125°C V 5.075 5.175 0.003 V 4.77 4.9 IO = 0 VDROP 4.06 4.825 RL = 0 Line regulation V 3.933 4 VI = VO + 1V to 16V, IO = 1 mA ΔVO/ΔVI Unit µA µV 7/17 Typical characteristics LD2982BXX18 5 Typical characteristics Figure 3. (TJ = 25 °C, VI = VO(NOM) +1 V, CI = 1 µF (X7R), CO = 2.2 µF (X7R), VINH = 2 V, unless otherwise specified). Output voltage vs. temperature Figure 4. Dropout voltage vs. temperature ) s t( Figure 5. Dropout voltage vs. output current Figure 6. c u d o r Quiescent current vs. load current l o bs P e et O ) s ( t c u d Figure 7. o r eP Quiescent current vs. temperature t e ol Figure 8. s b O 8/17 Doc ID 8188 Rev 7 Supply voltage rejection vs. temp. LD2982BXX18 Figure 9. Typical characteristics Supply voltage rejection vs. output Figure 10. Supply voltage rejection vs. output current current ) s t( Figure 11. Supply voltage rejection vs. frequency Figure 12. Supply voltage rejection vs. frequency c u d o r l o bs P e et O ) Figure 13. Line transient s ( t c u d o r eP Figure 14. Line transient t e ol s b O VO = 2.5V, IO = 50mA, no CI, CO = 4.7µF, tr=tf=2ns VO = 2.5V, IO = 50mA, no CI, CO = 4.7µF, tr=tf=1µs Doc ID 8188 Rev 7 9/17 Typical characteristics LD2982BXX18 Figure 15. Load transient Figure 16. Load transient VO = 2.5V, IO = 0 to 50mA, no CI, CO = 10µF, tr=tf=2ns VO = 2.5V, IO = 0 to 50mA, no CI, CO = 4.7µF, tr=tf=2ns ) s t( c u d o r l o bs O ) s ( t c u d o r eP t e ol s b O 10/17 Doc ID 8188 Rev 7 P e et LD2982BXX18 Application notes 6 Application notes 6.1 External capacitors Like any low-dropout regulator, the LD2982 requires external capacitors for regulator stability. This capacitor must be selected to meet the requirements of minimum capacitance and equivalent series resistance. We suggest to solder input and output capacitors as close as possible to the relative pins. 6.2 Input capacitor An input capacitor whose value is 1 µF is required with the LD2982 (amount of capacitance can be increased without limit). This capacitor must be located a distance of not more than 0.5" from the input pin of the device and returned to a clean analog ground. Any good quality ceramic, tantalum or film capacitors can be used for this capacitor. 6.3 ) s t( Output capacitor c u d o r The LD2982 is designed specifically to work with ceramic output capacitors. It may also be possible to use tantalum capacitors, but these are not as attractive for reasons of size and cost. By the way, the output capacitor must meet both the requirement for minimum amount of capacitance and ESR (equivalent series resistance) value. Due to the different loop gain, the stability improves for higher output versions and so the suggested minimum output capacitor value, if low ESR ceramic type is used, is 1 µF for output voltages equal or major than 3.8 V, 2.2 µF for VO going from 1.8 to 3.3 V, and 3.3 µF for the other versions. However, if an output capacitor lower than the suggested one is used, it's possible to make stable the regulator adding a resistor in series to the capacitor. l o bs 6.4 P e et O ) s ( t c u d Important The output capacitor must maintain its ESR in the stable region over the full operating temperature to assure stability. Also, capacitor tolerance and variation with temperature must be considered to assure the minimum amount of capacitance is provided at all times. This capacitor should be located not more than 0.5" from the output pin of the device and returned to a clean analog ground. o r eP s b O t e ol Inhibit input operation 6.5 The inhibit pin can be used to turn OFF the regulator when pulled low, so drastically reducing the current consumption down to less than 1 µA. When the inhibit feature is not used, this pin must be tied to VI to keep the regulator output ON at all times. To assure proper operation, the signal source used to drive the inhibit pin must be able to swing above and below the specified thresholds listed in the electrical characteristics section under VIH VIL. Any slew rate can be used to drive the inhibit. Doc ID 8188 Rev 7 11/17 Application notes 6.6 LD2982BXX18 Reverse current The power transistor used in the LD2982 has not an inherent diode connected between the regulator input and output. If the output is forced above the input, no current will flow from the output to the input across the series pass transistor. When a VREV voltage is applied on the output, the reverse current measured flows to the GND across the two feedback resistors. This current typical value is 160 µA. R1 and R2 resistors are implanted type; typical values are, respectively, 42.6 kΩ and 51.150 kΩ. Figure 17. Reverse current test circuit ) s t( c u d o r l o bs O ) s ( t c u d o r eP t e ol s b O 12/17 Doc ID 8188 Rev 7 P e et LD2982BXX18 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. ) s t( c u d o r l o bs P e et O ) s ( t c u d o r eP t e ol s b O Doc ID 8188 Rev 7 13/17 Package mechanical data LD2982BXX18 SOT23-5L mechanical data mm. mils. Dim. Min. Typ. Max. Min. Typ. Max. A 0.90 1.45 35.4 57.1 A1 0.00 0.10 0.0 3.9 A2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 1.50 1.75 59.0 e 0.95 ) s t( c u d o r 68.8 37.4 H 2.60 3.00 L 0.10 0.60 102.3 t e l o s b eP 3.9 118.1 23.6 O ) s ( t c u d o r eP t e ol s b O 7049676D 14/17 Doc ID 8188 Rev 7 LD2982BXX18 Package mechanical data Tape & reel SOT23-xL mechanical data mm. inch. Dim. Min. Typ. Max. A Min. Typ. 180 13.0 7.086 C 12.8 13.2 D 20.2 0.795 N 60 2.362 T Max. 0.504 0.512 14.4 0.519 0.567 Ao 3.13 3.23 3.33 0.123 0.127 0.131 Bo 3.07 3.17 3.27 0.120 0.124 0.128 Ko 1.27 1.37 1.47 0.050 0.054 0.0.58 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 3.9 4.0 4.1 0.153 0.157 0.161 l o bs ) s t( c u d o r P e et O ) s ( t c u d o r eP t e ol s b O Doc ID 8188 Rev 7 15/17 Revision history LD2982BXX18 8 Revision history Table 6. Document revision history Date Revision Changes 25-Jul-2006 4 Order codes updated. 14-Feb-2008 5 Added: Table 1 on page 1. 10-Jul-2008 6 Modified: Table 1 on page 1 and Table 5 on page 6. 29-Jul-2009 7 Modified: Table 1 on page 1. ) s t( c u d o r l o bs O ) s ( t c u d o r eP t e ol s b O 16/17 Doc ID 8188 Rev 7 P e et LD2982BXX18 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. ) s t( All ST products are sold pursuant to ST’s terms and conditions of sale. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 8188 Rev 7 17/17