RICHTEK RT8070

®
RT8070
4A, 2MHz, Synchronous Step-Down Converter
General Description
Features
The RT8070 is a high efficiency synchronous, step-down
DC/DC converter. Its input voltage range is from 2.7V to
5.5V and provides an adjustable regulated output voltage
from 0.8V to 5V while delivering up to 4A of output current.
z
High Efficiency : Up to 95%
z
Adjustable Frequency : 200kHz to 2MHz
No Schottky Diode Required
0.8V Reference Allows Low Output Voltage
Low Dropout Operation : 100% Duty Cycle
Enable Function
External Soft-Start
Power Good Function
RoHS Compliant and Halogen Free
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The internal synchronous low on-resistance power
switches increase efficiency and eliminate the need for
an external Schottky diode. The default switching
frequency is set at 2MHz, if the RT pin is left open. It can
also be varied from 200kHz to 2MHz by adding an external
resistor. Current mode operation with external
compensation allows the transient response to be
optimized over a wide range of loads and output capacitors.
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75
ments of IPC/JEDEC J-STD-020.
鼎
北
强
大
际
YMDNN : Date Code
国
RT8070ZQW
Suitable for use in SnPb or Pb-free soldering processes.
0
厦
RT8070ZSP : Product Number
RT8070
ZSPYMDNN
诚
RoHS compliant and compatible with the current require-
室
5
0
28
RT8070ZSP
38
2
5
Richtek products are :
3
8
/
Marking Information
5
1
Note :
0
5
4
4
1
2
LCD TV and Monitor
Notebook Computers
Distributed Power Systems
IP Phones
Digital Cameras
5
2
5
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
`
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Package Type
SP : SOP-8 (Exposed Pad-Option 2)
QW : WDFN-8L 3x3 (W-Type)
`
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富
RT8070
电
Applications
佳
Ordering Information
子
25 : Product Code
25 YM
DNN
YMDNN : Date Code
华
市
圳
深
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8070-07
November 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
RT8070
Pin Configurations
(TOP VIEW)
SS
2
EN
3
VIN
4
GND
8
PGOOD
7
FB
6
RT
5
LX
9
COMP
SS
EN
VIN
SOP-8 (Exposed Pad)
PGOOD
FB
RT
LX
8
1
3
GND
COMP
6
4
9
5
2
7
WDFN-8L 3x3
Typical Application Circuit
R3
100k
富
6 RT
圳
Chip Enable
深
3 EN
COMP
RCOMP
1
3
8
/
GND 9 (Exposed Pad)
SS 2
CSS
10nF
5
2
5
5
1
0
5
4
VOUT
R1
4
1
2
FB 7
佳
8 PGOOD
ROSC
L
维
CIN
10µF
PGOOD
子
电
RT8070
4 VIN
LX 5
VIN
2.7V to 5.5V
COUT
R2
室
5
0
CCOMP
28
厦
Table 1. Recommended Components Selection for fSW = 1MHz
VOUT (V)
R1 (kΩ)
3.3
75
8
3
2
5
5
2.5
51
1.8
30
07
1.5
1.2
1
R2 (kΩ)
RCOMP (kΩ)
24
33
大
C COMP (pF)
L (μH)
COUT (μF)
560
2
22
560
2
22
1.5
22
际
国
24
22
24
诚
560
13
560
1.5
22
11
560
1.5
22
8.2
560
1.5
22
21
24
12
24
6
24
15
鼎
北
强
华
市
圳
深
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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2
is a registered trademark of Richtek Technology Corporation.
DS8070-07
November 2012
RT8070
Functional Pin Description
Pin No.
SOP-8
WDFN-8L 3x3
(Exposed Pad)
Pin Name
Pin Function
1
1
COMP
Error Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. Connect external
compensation elements to this pin to stabilize the control loop.
2
2
SS
Soft-Start Control Input. Connect a capacitor from SS to GND to
set the soft-start period. A 10nF capacitor sets the soft-start
period to 800μs (typ.).
3
3
EN
Enable Control Input. Float or connect this pin to logic high for
enable. Connect to GND for disable.
4
4
VIN
5
5
LX
6
6
RT
7
7
FB
8
8
PGOOD
Power Good Indicator. This pin is an open drain logic output
that is pulled to ground when the output voltage is not within
±12.5% of regulation point.
9
(Exposed Pad)
9
(Exposed Pad)
GND
Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
Power Input Supply. Decouple this pin to GND with a capacitor.
Internal Power MOSFET Switches Output. Connect this pin to
the inductor.
Oscillator Resistor Input. Connect a resistor from this pin to
GND sets the switching frequency. If this pin is floating, the
frequency will be set at 2MHz internally.
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2
5
5
7
0
COMP
华
FB
北
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市
VIN
Slope
Com
OC
Limit
10µA
圳
大
ISEN
Output
Clamp
Driver
LX
Hiccup
SS
Control
Logic
深
0.7V
EN
厦
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国
SD
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0.8V
3
8
/
5
2
5
RT
OSC
4
1
2
Feedback. Receives the feedback voltage from a resistive
divider connected across the output.
5
1
Function Block Diagram
0
5
4
Enable
0.4V
P-G
NISEN
OTP
UV
GND
N-MOSFET ILIM
PGOOD
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8070-07
November 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3
RT8070
Absolute Maximum Ratings
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(Note 1)
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Recommended Operating Conditions
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−0.3V to 6V
−0.3V to (VIN + 0.3V)
−5V to 8.5V
−0.3V to (VIN + 0.3V)
5A
Supply Input Voltage, VIN ---------------------------------------------------------------------------------------LX Pin Switch Voltage --------------------------------------------------------------------------------------------<10ns ----------------------------------------------------------------------------------------------------------------Other I/O Pin Voltages -------------------------------------------------------------------------------------------LX Pin Switch Current --------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------WDFN-8L 3x3 ------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------WDFN-8L 3x3, θJA -------------------------------------------------------------------------------------------------WDFN-8L 3x3, θJC -------------------------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------
75°C/W
15°C/W
70°C/W
8.2°C/W
150°C
260°C
−65°C to 150°C
0
5
4
4
1
2
83
/
5
2
室
5
0
2kV
28
(Note 4)
5
5
1
1.333W
1.429W
厦
Supply Input Voltage, VIN ---------------------------------------------------------------------------------------- 2.7V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------- −40°C to 85°C
大
38
2
5
Electrical Characteristics
75
0
Feedback Reference
Voltage
Min
Typ
Max
Unit
0.784
0.8
0.816
V
Active, VFB = 0.78V, Not Switching
--
460
--
Shutdown
--
--
10
VIN = 2.7V to 5.5V
--
0.1
--
%/V
0A < ILOAD < 4A
--
0.25
--
%
gm
--
400
--
μA/V
RT
--
0.3
--
Ω
强
华
市
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Output Voltage Load
Regulation
深
Error Amplifier
Trans-conductance
Current Sense
Trans-resistance
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4
Test Conditions
北
VREF
DC Bias Current
Output Voltage Line
Regulation
鼎
Symbol
国
诚
(VIN = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
际
μA
is a registered trademark of Richtek Technology Corporation.
DS8070-07
November 2012
RT8070
Parameter
Symbol
Switching Frequency
Test Conditions
Min
Typ
Max
ROSC = 300k
0.8
1
1.2
Switching
0.2
--
2
Unit
MHz
Logic-High
VIH
1.6
--
--
Logic-Low
VIL
--
--
0.4
Switch On-Resistance, High RDS(ON)_P ILX = 0.5A
--
110
180
mΩ
Switch On-Resistance, Low
RDS(ON)_N ILX = 0.5A
--
70
120
mΩ
Peak Current Limit
ILIM
4.7
5.8
--
A
VIN Rising
--
2.4
--
VIN Falling
--
2.2
--
EN Input
Voltage
Under Voltage Lockout
Threshold
RT Shutdown Threshold
VRT
VRT Rising
Soft-Start Period
tSS
CSS = 10nF
子
--
电
PGOOD Trip Threshold
维
V
V
VIN − 0.7 VIN − 0.4
V
0
5
4
--
800
--
μs
--
87.5
--
%VOUT
4
1
2
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
佳
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
富
3
8
/
室
5
0
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
圳
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
深
5
2
5
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
5
1
厦
Note 4. The device is not guaranteed to function outside its operating conditions.
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2
5
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0
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鼎
北
强
华
市
圳
深
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8070-07
November 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
RT8070
Typical Operating Characteristics
Efficiency vs. Output Current
Output Voltage vs. Output Current
100
1.130
90
1.125
1.120
1.115
Output Voltage (V)
Efficiency (%)
80
70
60
50
40
30
1.110
1.105
1.100
1.095
1.090
1.085
20
1.080
10
电
0
1.070
0
0.5
1
1.5
2
2.5
3
3.5
4
0
维
Output Current (A)
佳
Switching Frequency vs. Temperature
富
1.03
圳
1.02
深
1.01
1.00
0.98
0.97
VIN = 5V, VOUT = 1.1V, IOUT = 0.6A,
RRT = 330kΩ
0.95
2
5
0.94
-50
-25
0
75
25
50
75
0
2.8
125
VIN = 5V, VOUT = 1.1V
0.76
-50
-25
0
25
50
75
100
125
Temperature (°C)
1.5
1.4
Falling
深
2.2
大
Enable Voltage vs. Temperature
Rising
圳
2.3
4
室
5
0
际
0.77
Enable Voltage (V)
市
3.5
1.6
华
2.4
0.78
鼎
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2.5
3
厦
0.79
北
2.6
2.5
28
0.80
VIN UVLO vs. Temperature
2.7
2
4
4
0.81
国
诚
100
Temperature (°C)
0.82
25
50
1.5
Output Current (A)
/8
38
0.96
1
1
2
3
0.83
5
5
1
0.99
0.5
VIN = 5V, VOUT = 1.1V, IOUT = 0A to 4A
Reference Voltage vs. Temperature
0.84
Reference Voltage (V)
Switching Frequency (MHz)1
1.04
VIN UVLO (V)
子
1.075
VIN = 5V, VOUT = 1.1V, IOUT = 0A to 4A
2.1
1.3
1.2
Rising
1.1
Falling
1.0
0.9
2.0
0.8
1.9
0.7
1.8
0.6
-50
-25
0
25
50
75
100
Temperature (°C)
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6
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
is a registered trademark of Richtek Technology Corporation.
DS8070-07
November 2012
RT8070
Switching
Load Transient Response
VOUT
(200mV/Div)
VLX
(5V/Div)
IOUT
(2A/Div)
VOUT
(10mV/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 1A to 4A,
RCOMP = 10kΩ, CCOMP = 560pF
子
电
Time (100μs/Div)
维
佳
Power On from VIN
富
圳
VIN
(5V/Div)
深
VOUT
(1V/Div)
-2
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07
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VIN = 5V, VOUT = 1.1V, IOUT = 4A
Time (500μs/Div)
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28
厦
VIN = 5V, VOUT = 1.1V, IOUT = 4A, EN = High
Time (5ms/Div)
Power Off from EN
VEN
(5V/Div)
VOUT
(1V/Div)
深
DS8070-07
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室
5
0
大
际
北
Power On from EN
VPGOOD
(5V/Div)
IOUT
(5A/Div)
VPGOOD
(5V/Div)
IOUT
(5A/Div)
诚
华
VEN
(5V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 4A, EN = High
Time (2.5ms/Div)
4
1
2
3
8
/
5
2
5
38
0
5
4
Time (500ns/Div)
Power Off from VIN
VIN
(5V/Div)
5
1
VPGOOD
(5V/Div)
IOUT
(5A/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 4A
VPGOOD
(5V/Div)
IOUT
(5A/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 4A
Time (250μs/Div)
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RT8070
Application Information
Soft-Start
The basic IC application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
Main Control Loop
The IC contains an external soft-start clamp that gradually
raises the output voltage. The soft-start timing is
programmed by the external capacitor between SS pin
and GND. The chip provides an internal 10μA charge current
for the external capacitor. If 10nF capacitor is used to set
the soft-start, the period will be 800μs (typ.).
During normal operation, the internal upper power switch
(P-MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak
inductor current reaches the value defined by the output
voltage (VCOMP) of the error amplifier. The error amplifier
adjusts its output voltage by comparing the feedback signal
from a resistive voltage-divider on the FB pin with an
internal 0.8V reference. When the load current increases,
it causes a reduction in the feedback voltage relative to
the reference. The error amplifier increases its output
voltage until the average inductor current matches the new
load current. When the upper power MOSFET shuts off,
the lower synchronous power switch (N-MOSFET) turns
on until the beginning of the next clock cycle.
Power Good Output
The power good output is an open-drain output and requires
a pull up resistor. When the output voltage is 12.5% above
or 12.5% below its set voltage, PGOOD will be pulled
low. It is held low until the output voltage returns to within
the allowed tolerances once more. During soft-start,
PGOOD is actively held low and is only allowed to transition
high when soft-start is over and the output voltage reaches
87.5% of its set voltage.
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2
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R1
)
R2
where VREF equals to 0.8V typical.
0
鼎
The resistive voltage-divider allows the FB pin to sense a
fraction of the output voltage as shown in Figure 1.
北
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VOUT
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R1
FB
圳
RT8070
深
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28
Selection of the operating frequency is a tradeoff between
efficiency and component size. Higher frequency operation
allows the use of smaller inductor and capacitor values.
Lower frequency operation improves efficiency by reducing
internal gate charge and switching losses but requires
larger inductance and/or capacitance to maintain low output
ripple voltage.
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5
The output voltage is set by an external resistive voltagedivider according to the following equation :
VOUT = VREF × (1+
4
1
2
Operating Frequency
5
1
Output Voltage Setting
0
5
4
R2
The operating frequency of the IC is determined by an
external resistor , ROSC, that is connected between the
RT pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing capacitor within the oscillator. The practical switching
frequency ranges from 200kHz to 2MHz. However, when
the RT pin is floating, the internal frequency is set at 2MHz.
Determine the RT resistor value by examining the curve
below. Please notice the minimum on time is about 90ns.
GND
Figure 1. Setting the Output Voltage
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is a registered trademark of Richtek Technology Corporation.
DS8070-07
November 2012
RT8070
Switching Frequency (MHz)1
2.4
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at VIN large enough to damage the part.
2.0
1.6
1.2
0.8
Slope Compensation and Peak Inductor Current
Slope compensation provides stability in constant
frequency architectures by preventing sub- harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the peak inductor
current is reduced when slope compensation is added.
For the IC, however, separated inductor current signal is
used to monitor over current condition, so the maximum
output current stays relatively constant regardless of the
duty cycle.
0.4
0.0
0
300
600
900
1200
1500
1800
2100
子
RRT (kΩ)
Figure 2. Switching Frequency vs. RRT Resistor
电
Inductor Selection
维
佳
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current, DIL, increases with higher VIN and decreases
with higher inductance
⎤
⎡V
⎤ ⎡ V
ΔIL = ⎢ OUT ⎥ ⎢1 − OUT ⎥
VIN ⎦
⎣ f ×L ⎦ ⎣
富
圳
深
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0
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北
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圳
Using Ceramic Input and Output Capacitors
深
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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November 2012
室
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A Hiccup Mode Under Voltage Protection (UVP) function
is provided for the IC. When the FB voltage drops below
half of the feedback reference voltage, VFB, the UVP
function is triggered to auto soft-start the power stage
until this event is cleared. The Hiccup Mode UVP reduces
the input current in short circuit conditions, but will not be
triggered during soft-start process.
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1
2
5
4
1
2
Hiccup Mode Under Voltage Protection
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. Highest efficiency operation is achieved by reducing
ripple current at low frequency, but attaining this goal
requires a large inductor.
For the ripple current selection, the value of ΔIL = 0.4(IMAX)
is a reasonable starting point. The largest ripple current
occurs at the highest VIN. To guarantee that the ripple
current stays below a specified maximum value, the
inductor value needs to be chosen according to the following
equation :
⎡ VOUT ⎤ ⎡
⎤
V
L= ⎢
⎥ ⎢1− OUT ⎥
⎣⎢ f × ΔIL(MAX) ⎦⎥ ⎣⎢ VIN(MAX) ⎦⎥
0
5
4
Under Voltage Lockout Threshold
The RT8070 includes an input under voltage lockout
protection (UVLO) function. If the input voltage exceeds
the UVLO rising threshold voltage, the converter will reset
and prepare the PWM for operation. However, if the input
voltage falls below the UVLO falling threshold voltage during
normal operation, the device will stop switching. The UVLO
rising and falling threshold voltage has a hysteresis to
prevent noise caused reset.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
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RT8070
Layout Considerations
maximum power dissipation can be calculated by the
following formula :
Follow the PCB layout guidelines for optimal performance
of the IC.
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
`
Connect the terminal of the input capacitor(s), CIN, as
close to the VIN pin as possible. This capacitor provides
the AC current into the internal power MOSFETs.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 (Exposed Pad) packages, the thermal resistance,
θJA, is 75°C/W on a standard JEDEC 51-7 four-layer
thermal test board. For WDFN-8L 3x3 packages, the
thermal resistance, θJA, is 70°C/W on a standard JEDEC
51-7 four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by the following
formulas :
`
LX node experiences high frequency voltage swings so
should be kept within a small area.
`
Keep all sensitive small signal nodes away from the LX
node to prevent stray capacitive noise pick up.
`
Connect the FB pin directly to the feedback resistors.
The resistive voltage divider must be connected between
VOUT and GND.
电
维
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for
SOP-8 (Exposed Pad) package
圳
深
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for
WDFN-8L 3x3 package
52
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WDFN-8L 3x3
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RCOMP
8
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5
0
EN
VIN
GND
VIN
PGOOD
7
GND
3
6
9
4
5
厦
CIN
FB
RT
L1
COUT
大
R1
LX
VOUT
际
国
R2
28
2
SS
CSS
诚
Four Layer PCB
COMP
Place the feedback
resistors as close to
the IC as possible
Place the compensation
components as close to
the IC as possible
GND
华
R2
CCOMP
市
RCOMP
圳
0
25
CSS
75
100
CIN
125
Ambient Temperature (°C)
Figure 3. Derating Curve of Maximum Power Dissipation
COMP
SS
EN
VIN
8
1
3
6
4
9
5
2
7
PGOOD
FB
RT
LX
R1
ROSC
VOUT
GND
L1
GND
50
GND
ROSC
LX should be connected
to inductor by wide and
short trace, and keep
sensitive components
away from this trace
(a) For SOP-8 (Exposed Pad) package
SOP-8 (Exposed Pad)
深
VOUT
Place the input and output capacitors
as close to the IC as possible
GND
Maximum Power Dissipation (W)1
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
8
3
2
4
1
2
83
5/
5
1
Place the feedback
resistors as close to
the IC as possible
GND
CCOMP
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curves in Figure 3 allow the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
0
5
4
Place the compensation
components as close to
the IC as possible
佳
富
子
VIN
COUT
VOUT
Place the input and output capacitors
as close to the IC as possible
LX should be connected
to inductor by wide and
short trace, and keep
sensitive components
away from this trace
(b) For WDFN-8L 3x3 package
Figure 4. PCB Layout Guide
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
www.richtek.com
10
is a registered trademark of Richtek Technology Corporation.
DS8070-07
November 2012
RT8070
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
B
X
F
子
电
0
5
4
C
I
维
佳
D
Dimensions In Millimeters
富
Symbol
Min
圳
A
深
B
C
4.000
Option 2
华
强
X
Y
0.157
28
1.346
0.047
0.170
0.254
0.007
0.010
0.000
0.152
0.000
0.006
5.791
6.200
0.228
0.244
1.270
0.016
0.050
0.069
2.300
0.079
0.091
2.000
2.300
0.079
0.091
2.100
2.500
0.083
0.098
3.000
3.500
0.118
0.138
厦
大
际
国
诚
鼎
2.000
北
Y
0.150
0.013
0.406
X
0.197
0.510
38
Option 1
0.189
0.053
5
1
M
5/
室
5
0
Max
1.753
1.194
2
5
Min
52
1.346
F
J
市
3.810
0.330
I
5
7
0
5.004
D
H
83
Max
4.801
4
1
2
Dimensions In Inches
0.020
0.053
8-Lead SOP (Exposed Pad) Plastic Package
圳
深
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8070-07
November 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
RT8070
D2
D
L
E
E2
SEE DETAIL A
1
e
b
2
1
2
1
A
A1
A3
子
电
维
佳
富
圳
深
A
Min
Max
0.700
0.800
A1
0.000
A3
0.175
b
0.200
D
5-
D2
5
7
0
3
8
/
1.350
北
e
强
L
0.300
0.008
0.012
0.116
0.120
0.083
0.093
3.050
0.116
0.120
1.600
0.053
0.063
0.425
华
大
际
国
诚
鼎
厦
0.007
2.350
E2
0.031
0.250
2.100
室
5
0
28
0.028
0.000
3.050
2.950
Max
0.050
2.950
E
Min
55
23
4
1
2
Dimensions In Inches
25
81
0
5
4
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Symbol
DETAIL A
Pin #1 ID and Tie Bar Mark Options
0.650
0.002
0.010
0.026
0.525
0.017
0.021
W-Type 8L DFN 3x3 Package
市
圳
深
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com
12
DS8070-07
November 2012