RT8082 - Richtek

®
RT8082
3A, 2MHz, Synchronous Step-Down Converter
General Description
Features
The RT8082 is a high efficiency synchronous, step-down
DC/DC converter. Its input voltage range is from 2.7V to
5.5V and provides an adjustable regulated output voltage
from 1V to 5V while delivering up to 3A of output current.

High Efficiency : Up to 95%

2MHz Fixed Frequency PWM Operation
No Schottky Diode Required
1V Reference Allows Low Output Voltage
Output Current up to 3A
Forced Continuous Mode Operation
Low Dropout Operation : 100% Duty Cycle
Enable Function
Power Good Function
Internal Soft-Start
RoHS Compliant and Halogen Free
The internal synchronous low on-resistance power
switches increase efficiency and eliminate the need for
an external Schottky diode. The switching ripple voltage
is easily smoothed-out by small package filtering elements
due to a fixed operating frequency of 2MHz. The 100%
duty cycle provides low dropout operation extending
battery input range in portable systems. Current mode
operation with internal compensation allows the transient
response to be optimized over a wide range of loads and
output capacitors.
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Applications


The RT8082 operates in forced continuous PWM Mode,
which minimizes ripple voltage and reduces the noise and
RF interference.
Ordering Information



Marking Information
RT8082
0E= : Product Code
Package Type
QW : WDFN-12EL 3x3 (W-Type)
Note :
LCD TV and Monitor
Notebook Computers
Distributed Power Systems
IP Phones
Digital Cameras
YMDNN : Date Code
0E=YM
DNN
Lead Plating System
G : Green (Halogen Free and Pb Free)
Richtek products are :

RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.

Suitable for use in SnPb or Pb-free soldering processes.
Simplified Application Circuit
RT8082
VIN
VIN
RBIAS
L
LX
VOUT
CIN
RPGOOD
R1
BIAS
FB
COUT
CBIAS
PGOOD
R2
PGOOD
PGND
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DS8082-02 January 2014
CFF
EN
Enable
AGND
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RT8082
Pin Configurations
LX
VIN
PGND
AGND
BIAS
FB
1
2
3
4
5
6
PGND
(TOP VIEW)
13
12
11
10
9
8
7
LX
VIN
PGND
PGOOD
EN
NC
WDFN-12EL 3x3
Functional Pin Description
Pin No.
Pin Name
Pin Function
1, 12
LX
Internal Power MOSFET Switches Output. Connect these pins to the inductor
together.
2, 11
VIN
Power Input. Decouple this pin to GND with two 10F capacitors.
3, 10,
PGND
13 (Exposed Pad)
Power Ground. The exposed pad must be soldered to a large PCB and connected
to ground for maximum power dissipation.
4
AGND
Analog Ground. Provides the return path for control circuit and internal reference.
5
BIAS
Analog Power Input. Decouple this pin to AGND with a minimum 0.1F ceramic
capacitor.
6
FB
Feedback Input. This pin is used to set the desired output voltage via an external
resistive divider. The feedback reference voltage is 1V typically.
7
NC
No Internal Connection.
8
EN
Enable Control Input. Floating this pin or connecting this pin to logic high will
enable the device and pulling this pin to logic low will disable the device.
9
PGOOD
Power Good Indicator. This pin is an open drain logic output that is pulled to
ground when the output voltage is within 7% of regulation point.
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RT8082
Function Block Diagram
BIAS
Oscillator
Slope
Compensation
PWM
Comparator
Soft-Start
AGND
Current Sense &
Over Current
Protection
Control
Logic
VIN
LX
Driver
PGND
Voltage
Reference
Error
Amplifier
PGOOD
Shutdown
Control
Under Voltage
Lock Out
FB
EN Threshold
Over
Temperature
Protection
EN
Operation
During normal operation, the internal high side power switch (P-MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak inductor current reaches the value defined by the output voltage
(VCOMP) of the error amplifier. The error amplifier adjusts its output voltage by comparing the feedback signal from a
resistive voltage divider on the FB pin with an internal 1V reference. When the load current increases, it causes a
reduction in the feedback voltage relative to the reference. The error amplifier increases its output voltage to allow the
average inductor current traces the new load current. When the high side power MOSFET turns off, the low side power
switch (N-MOSFET) turns on until the beginning of the next clock cycle.
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RT8082
Absolute Maximum Ratings

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(Note 1)
Supply Input Voltage, VIN, BIAS ------------------------------------------------------------------------------LX Pin Switch Voltage --------------------------------------------------------------------------------------------Other Pins -----------------------------------------------------------------------------------------------------------LX Pin Switch Current --------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
WDFN-12EL 3x3 ---------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
WDFN-12EL 3x3, θJA ---------------------------------------------------------------------------------------------WDFN-12EL 3x3, θJC ---------------------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------
Recommended Operating Conditions



−0.3V to 6V
−0.3V to (VIN + 0.3V)
−0.3V to (VIN + 0.3V)
5A
1.667W
60°C/W
7°C/W
150°C
260°C
−65°C to 150°C
2kV
(Note 4)
Supply Input Voltage ----------------------------------------------------------------------------------------------- 2.7V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = VEN = 3.6V, TA = −40°C to 85°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Quiescent Current
IQ
VFB = 0.9V, Not Switching
--
570
900
A
Shutdown Current
ISHDN
VEN = 0V
--
1
2
A
Feedback Voltage
VFB
ILOAD = 100mA
0.98
1
1.02
ILOAD = 100mA, TA = 25C
0.99
1
1.01
Feedback Leakage Current
IFB
--
1
--
nA
V
Line Regulation
ILOAD = 100mA
--
0.07
--
%/V
Load Regulation
20mA < ILOAD < 3A
--
0.2
0.5
%
1.7
2
2.3
MHz
--
75
150
--
55
80
3.5
5
--
A
2.35
2.45
2.6
V
--
0.2
--
V
--
93
90
--
107
110
Switching Frequency
fOSC
High Side Switch On-Resistance
RDS(ON)_P
Low Side Switch On-Resistance
RDS(ON)_N
Peak Current Limit
ILIM
Under Voltage Lockout Threshold
VUVLO
Under Voltage Lockout Hysteresis
VUVLO
Power Good Rising Threshold
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ILX = 0.5A
VIN Rising
VFB Rising (Good), TA = 25C
VFB Rising (Fault), T A = 25C
m
%
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RT8082
Parameter
Symbol
Test Conditions
Min
Typ
Max
VFB Falling (Fault), T A = 25C
--
93
90
VFB Falling (Good), T A = 25C
--
107
110
Power Good Resistance
IPGOOD = 500A
--
145
250

Enable Threshold Voltage
EN Rising
0.5
0.85
1.3
V
Enable Voltage Hysteresis
--
50
--
mV
Enable Input Current
--
0.1
2
A
Over Temperature Protection
--
160
--
°C
Over Temperature Protection Hysteresis
--
20
--
°C
Power Good Falling Threshold
Unit
%
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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RT8082
Typical Application Circuit
VIN
2.7V to 5.5V
2, 11
RBIAS
RPGOOD 10
10k
CBIAS
0.1µF
CIN
10µF x 2
PGOOD
RT8082
LX
VIN
1, 12
L
1µH
VOUT
R1
5 BIAS
FB
9 PGOOD
EN
AGND
4
CFF
6
8
COUT
10µF x 2
Enable
R2
PGND
3, 10,
13 (Exposed Pad)
Note : Using all Ceramic Capacitors
Table 1. Suggested Components Selection
VOUT (V)
R1 (k)
R2 (k)
CFF (pF)
L (H)
COUT (F)
3.3
27.6
12
82
2
10 x 2
2.5
18
12
330
1.5
10 x 2
1.8
9.6
12
150
1
10 x 2
1.5
6
12
Open
1
10 x 2
1.2
6
30
180
0.76
10 x 2
1.1
3
30
220
0.68
10 x 2
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RT8082
Typical Operating Characteristics
Efficiency vs. Output Current
Output Voltage vs. Output Current
100
1.87
90
1.86
Output Voltage (V)
Efficiency (%)
80
VOUT = 3.33V
VOUT = 1.83V
70
60
50
40
30
1.85
1.84
1.83
1.82
1.81
20
1.80
10
VIN = 5V, VOUT = 1.83V
VIN = 5V
1.79
0
0
0.5
1
1.5
2
2.5
0
3
0.5
Output Current (A)
1.5
2.5
3
Output Voltage vs. Input Voltage
1.87
3.36
1.86
3.35
1.85
Output Voltage (V)
3.37
3.34
3.33
3.32
3.31
3.30
1.84
1.83
1.82
1.81
1.80
VIN = 5V, VOUT = 3.33V
VOUT = 1.83V, IOUT = 0A
3.29
1.79
0
0.5
1
1.5
2
2.5
3
2.5
3
Output Current (A)
3.5
4
4.5
5
5.5
Input Voltage (V)
Quiescent Current vs. Input Voltage
Reference Voltage vs. Input Voltage
1.04
700
1.03
650
Quiescent Current (µA)
Reference Voltage (V)
2
Output Current (A)
Output Voltage vs. Output Current
Output Voltage (V)
1
1.02
1.01
1.00
0.99
0.98
600
550
500
450
400
0.97
350
0.96
300
VFB = 0.9V
2.5
3
3.5
4
4.5
5
Input Voltage (V)
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5.5
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
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RT8082
Reference Voltage vs. Temperature
Switching Frequency vs. Temperature
1.04
Switching Frequency (MHz)1
3.00
Reference Voltage (V)
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
9
8
8
7
7
Current Limit (A)
9
6
5
4
75
100
125
6
5
4
3
3
2
2
VOUT = 1.83V
VIN = 5V, VOUT = 1.83V
1
1
2.5
3
3.5
4
4.5
5
-50
5.5
-25
0
25
50
75
100
125
Temperature (°C)
Input Voltage (V)
UVLO Threshold vs. Temperature
Enable Threshold vs. Temperature
1.05
Enable Threshold (V) 1
2.8
2.6
Input Voltage (V)
50
Current Limit vs. Temperature
Current Limit vs. Input Voltage
Current Limit (A)
25
Temperature (°C)
Rising
2.4
Falling
2.2
2.0
1.00
Rising
0.95
Falling
0.90
0.85
0.80
VEN = 3.3V
1.8
VIN = 3.3V
0.75
-50
-25
0
25
50
75
100
Temperature (°C)
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125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8082
Load Transient Response
Load Transient Response
VOUT
(200mV/Div)
VOUT
(100mV/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
VIN = 3.3V, VOUT = 1.83V, IOUT = 1A to 3A
VIN = 3.3V, VOUT = 1.83V, IOUT = 0 to 3A
Time (100μs/Div)
Time (100μs/Div)
Output Voltage Ripple
Output Voltage Ripple
VOUT
(50mV/Div)
VOUT
(50mV/Div)
VLX
(2V/Div)
VLX
(2V/Div)
IL
(500mA/Div)
IL
(2A/Div)
VIN = 3.3V, VOUT = 1.83V, IOUT = 0A
VIN = 3.3V, VOUT = 1.83V, IOUT = 3A
Time (250ns/Div)
Time (250ns/Div)
Power On from VIN
Power Off from VIN
VIN
(2V/Div)
VIN
(2V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
IOUT
(2A/Div)
IOUT
(2A/Div)
VIN = 3.3V, VOUT = 1.83V, IOUT = 3A
Time (5ms/Div)
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VIN = 3.3V, VOUT = 1.83V, IOUT = 3A
Time (10ms/Div)
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RT8082
Power On from EN
Power Off from EN
VEN
(5V/Div)
VEN
(5V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
VPGOOD
(5V/Div)
VPGOOD
(5V/Div)
IOUT
(5A/Div)
IOUT
(5A/Div)
VIN = 3.3V, VOUT = 1.83V, IOUT = 3A
VIN = 3.3V, VOUT = 1.83V, IOUT = 3A
Time (500μs/Div)
Time (25μs/Div)
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RT8082
Application Information
This IC is a single phase Buck PWM converter. It provides
single feedback loop, current mode control with fast
transient response. An internal 1V reference allows the
output voltage to be precisely regulated for low output
voltage applications. A fixed switching frequency (2MHz)
oscillator and internal compensation are integrated to
minimize external component count.
Output Voltage Setting
The resistive voltage divider allows the FB pin to sense
the output voltage as shown in Figure 1.
VOUT
R1
FB
RT8082
R2
AGND
Figure 1. Setting the Output Voltage
The output voltage is set by an external resistive voltage
divider according to the following equation :
VOUT = VREF   1 + R1 
R2 

where VREF is the feedback reference voltage (1V typ.).
Soft-Start
The IC contains an internal soft-start function to prevent
large inrush current and output voltage overshoot when
the converter is turned on. Soft-start automatically begins
once the chip's enable control is pulled to high. During
soft-start, the internal soft-start capacitor is charged and
generates a linear ramping-up voltage across the capacitor.
The VFB voltage tracks the internal ramping-up voltage
which will induce the duty pulse width to increase slowly
and in turn reduce the output surge current. Finally, the
internal 1V reference takes over the loop control once the
internal ramping-up voltage becomes higher than 1V. The
typical soft-start time is set at 1ms.
Power Good Output
The power good output is an open-drain output and requires
a pull up resistor. When the output voltage is 7% above or
7% below its set voltage, PGOOD will be pulled high. It is
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DS8082-02 January 2014
held high until the output voltage returns within the allowed
tolerances once more. During soft-start, PGOOD is actively
held high and is only allowed to be low when soft-start
period is over and the output voltage reaches 93% of its
set voltage.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current, ΔIL, increases with higher VIN and decreases
with higher inductance :
V
V
IL =  OUT    1 OUT 
VIN 
 f L  
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High efficiency operation is achieved by reducing
ripple current at low frequency, but it requires a large
inductor to attain this goal.
For the ripple current selection, the value of ΔIL = 0.4(IMAX)
will be a reasonable starting point. The largest ripple current
occurs at the highest VIN. To guarantee that the ripple
current stays below a specified maximum, the inductor
value should be chosen according to the following
equation :
 VOUT  
VOUT 
L= 
  1


 f  IL(MAX)   VIN(MAX) 
In this IC, 1μH is recommended for initial design. The
inductor's current rating (cause a 40°C temperature rising
from 25°C ambient) must be greater than the maximum
load current and ensure that the peak current will not
saturate the inductor during short circuit condition.
Input and Output Capacitors Selection
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step change at the output can induce ringing
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RT8082
at the input, VIN. This ringing can couple to the output
and be mistaken. A sudden inrush of current through the
long wires can potentially cause a voltage spike at VIN
large enough to damage the part.
Two 10μF low ESR ceramic capacitors are recommended
for bypassing input and an additional 0.1μF is
recommended close to the IC input side for high frequency
filtering. The selection of COUT is determined by the
required ESR to minimize voltage ripple. Moreover, the
amount of bulk capacitance is also a key for COUT selection
to ensure that the control loop is stable. Loop stability
can be checked by viewing the load transient response.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant
frequency architectures by preventing sub harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the maximum
inductor peak current is reduced when slope compensation
is added. For the RT8082, a separate inductor current
signal is used to monitor over current condition, so this
keeps the maximum output current relatively constant
regardless of duty cycle.
Under Output Voltage Protection (Hiccup Mode)
A Hiccup Mode of Under Voltage Protection (UVP) function
is provided for the IC. When the FB voltage drops below
half of the feedback reference voltage, VREF, and the peak
inductor current reaches the OCP threshold. The UVP
function will be triggered to auto soft-start the power stage
continuously until this event is cleared. The Hiccup Mode
UVP reduces input current in short-circuit conditions and
it will not be triggered during soft-start process.
Under Voltage Lockout Threshold
Thermal Shutdown
The device implements an internal thermal shutdown
function when the junction temperature exceeds 160°C.
The thermal shutdown disables the device until the junction
temperature drops below the hysteresis (20°C typ.). Then,
the device is re-enabled and automatically reinstates the
power up sequence.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WDFN-12EL 3x3, the thermal resistance, θJA, is 60°C/W
on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for
WDFN-12EL 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 2 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
The IC features input Under Voltage Lockout protection
(UVLO). If the input voltage exceeds the UVLO rising
threshold voltage (2.45V typ.), the converter will reset and
prepare the PWM for operation. If the input voltage falls
below the UVLO falling threshold voltage (2.25V typ.)
during normal operation, the device will stop switching.
The UVLO rising and falling threshold voltage has a
hysteresis (0.2V typ.) to prevent noise from causing reset.
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RT8082
Maximum Power Dissipation (W)1
1.8
Layout Considerations
Four-Layer PCB
1.6
Follow the PCB layout guidelines for optimal performance
of the IC.
1.4
1.2

Keep the traces of the main current paths as short and
wide as possible.

Put the input capacitor as close as possible to VIN pin.

LX node is with high frequency voltage swing and should
be kept at small area. Keep analog components away
from the LX node to prevent stray capacitive noise pickup.

Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the IC.

Connect all analog grounds to a common node and then
connect the common node to the power ground behind
the output capacitors.
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum Power Dissipation
COUT
LX should be connected to inductor by
wide and short trace, and keep sensitive
components away from this trace
VOUT R2 R1
1
2
3
4
5
6
PGND
CIN
Place the feedback
resistors as close to
the IC as possible
LX
VIN
PGND
AGND
BIAS
FB
Place the input and output
capacitors as close to the
IC as possible
VOUT
L
13
12
11
10
9
8
7
CIN
LX
VIN
PGND
PGOOD
EN
NC
PGND
Figure 3. PCB Layout Guide
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RT8082
Outline Dimension
2
1
2
1
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min.
Max.
Min.
Max.
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.280
0.007
0.011
D
2.900
3.100
0.114
0.122
D2
2.350
2.450
0.093
0.096
E
2.900
3.100
0.114
0.122
E2
1.650
1.750
0.065
0.069
e
L
0.500
0.400
0.020
0.500
0.016
0.020
W-Type 12EL DFN 3x3 Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com
14
DS8082-02 January 2014