RT8079 - Richtek

®
RT8079
2.95V to 6V Input, 3A Output, 2MHz, Synchronous
Step-Down Converter
General Description
Features
The RT8079 is a high efficiency step-down converter and
capable of delivering 3A output current over a wide input
voltage range from 2.95V to 6V.

The RT8079 provides accurate regulation for a variety of
loads with ±3% accuracy. For reducing inductor size, it
provides up to 2MHz switching frequency. The efficiency
is maximized through the integrated 45mΩ MOSFETs
and 550μA typical supply current.








Under voltage lockout voltage of the RT8079 is 2.7V, and
it also provides external setting by a resistor network on
the enable pin.



The RT8079 provides protections such as inductor current
limit under voltage lockout and thermal shutdown. The
over temperature threshold is 145°C.

The RT8079 is available in WQFN-16L 3x3 package.

Applications

Ordering Information
Ω MOSFETs
Integrated 45mΩ
Input Range : 2.95V to 6V
Adjustable PWM Frequency : 300kHz to 2MHz
Output Current : 3A
95% Efficiency
Adjustable Soft-Start
Power Good Indicator
Enable Control
Under Voltage Lockout
Current Limit
Thermal Shutdown
16-Lead WQFN Package
RoHS Compliant and Halogen Free

Low-Voltage, High-Density Power Systems
Distributed Power Systems
Point-of-Load Conversions
RT8079
Package Type
QW : WQFN-16L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Marking Information
62= : Product Code
62=YM
DNN
Note :
YMDNN : Date Code
Richtek products are :

RoHS compliant and compatible with the current require-

Suitable for use in SnPb or Pb-free soldering processes.
ments of IPC/JEDEC J-STD-020.
Simplified Application Circuit
VIN
VIN
RT8079
EN
BOOT
PGOOD
FB
COMP
GND
AGND
SS/TR
RT/SYNC
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8079-02 May 2014
SW
VOUT
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1
RT8079
Pin Configurations
VIN
EN
PGOOD
BOOT
(TOP VIEW)
16 15 14 13
VIN
VIN
GND
GND
1
12
2
11
GND
3
10
17
4
9
6
7
8
AGND
FB
COMP
RT/SYNC
5
SW
SW
SW
SS/TR
WQFN-16L 3x3
Functional Pin Description
Pin No.
1, 2, 16
3, 4,
17 (Exposed Pad)
5
6
7
8
9
10 to 12
Pin Name
VIN
GND
AGND
FB
COMP
RT/SYNC
SS/TR
SW
13
BOOT
14
PGOOD
15
EN
Pin Function
Power Input.
Power Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
Analog Ground.
Feedback Input.
Compensation Node for Converter Stability.
Frequency Setting and External Synchronous. Clock input.
Soft-Start and Tracking.
Switch Node. Connect this pin to external L-C filter.
Bootstrap Supply for High Side Gate Driver. Connect a capacitor between the
BOOT and SW pin.
Output of Power Good Indicator.
Chip Enable. Externally pulled high to enable and pulled low to disable this
chip. It is internally pulled up to high when the pin is floating.
Function Block Diagram
VIN
Internal pull up
current
Over Temperature
Protection
UVLO
Enable Comparator
EN
EN Threshold
Shutdown
Control
Current
Sense
BOOT
RT/SYNC
Oscillator
Control
Logic
Slope
Compensation
Driver
SW
PWM
Comparator
SS/TR
Soft-Start
GND
VREF
Error
Amplifier
FB
PGOOD Threshold
PGOOD Comparator
PGOOD
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COMP AGND
GND
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DS8079-02 May 2014
RT8079
Operation
The RT8079 is a synchronous step-down DC/DC converter
with two integrated power MOSFETs. It can deliver up to
3A output current from a 2.95V to 6V input supply. The
RT8079's current mode architecture allows the transient
response to be optimized over a wider input voltage and
load range. Cycle-by-cycle current limit provides protection
against shorted outputs and soft-start eliminates input
current surge during start-up. The RT8079 is
synchronizable to an external clock with frequency ranging
from 300kHz to 2MHz. The RT8079 is available in
WQFN-16L 3x3 package.
High side MOSFET peak current is measured by internal
sensing resistor. The Current Signal is where Slope
Compensator works together with sensing voltage sensing
resistor. The error amplifier adjusts COMP voltage by
comparing the feedback signal (VFB) from the output
voltage with the internal 0.827V reference. When the load
current increases, it causes a drop in the feedback voltage
relative to the reference, the COMP voltage then rises to
allow higher inductor current to match the load current.
EN Comparator
The RT8079 is enable when EN pin is higher than 1.25V.
It is disable when EN pin lower than 1.18V. There is an
internal pull-high current source to charge the EN pin to
high when the EN pin is floating.
PGOOD Comparator
When the feedback voltage (VFB) rises above 93% or falls
below 107% of reference voltage the PGOOD open drain
output will be high impedance. The PGOOD open drain
output will be internally pulled low when the feedback
voltage (VFB) falls below 88% or rises above 113% of
reference voltage.
Soft-Start (SS)
An internal current source (2.2μA) charges an external
capacitor to build the soft-start ramp voltage (VSS). The
VFB voltage will track the VSS during soft-start interval.
The Soft-Start setting capacitor (CSS) for the Soft-Start
time (TSS) can be easily calculated by the following
equation :
CSS (nF) =
TSS (ms)  2.2 (A)
0.827 (V)
Over Temperature Protection (OTP)
The RT8079 implement an internal over temperature
protection. When junction temperature is higher than
145°C, it will stop switching. Until the junction temperature
decreases below 125°C, the RT8079 will re-soft-start from
initial condition.
Oscillator (OSC)
The internal oscillator that provides switching frequency
from 300kHz to 2MHz. It is adjusted using an external
timing resistor. It also can be synchronized by an external
clock in the range between 300kHz and 2MHz from RT/
SYNC pin.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8079-02 May 2014
is a registered trademark of Richtek Technology Corporation.
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3
RT8079
Absolute Maximum Ratings










(Note 1)
Supply Input Voltage, VIN ----------------------------------------------------------------------------------------Switch Node Voltage, SW ----------------------------------------------------------------------------------------BOOT to SW --------------------------------------------------------------------------------------------------------Other Pins ------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
WQFN-16L 3x3 -----------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
WQFN-16L 3x3, θJA ------------------------------------------------------------------------------------------------WQFN-16L 3x3, θJC -----------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ----------------------------------------------------------------------------------------
Recommended Operating Conditions



−0.3V to 7V
−0.3V to (VIN + 0.3V)
−0.3V to 7V
−0.3V to (VIN + 0.3V)
2.128W
47°C/W
7.5°C/W
150°C
260°C
−65°C to 150°C
2kV
(Note 4)
Supply Input Voltage ------------------------------------------------------------------------------------------------ 2.95V to 6V
Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C t o 85°C
Electrical Characteristics
(VIN = 5V, CIN = 10μF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
2.7
2.8
V
--
200
--
mV
--
550
800
A
--
2
5
A
0.802
0.827
0.852
V
Input Power Supply
Under Voltage Lockout
Threshold
VUVLO
Under Voltage Lockout
Hysteresis
VUVLO
Quiescent Current
IQ
Shutdown Current
ISHDN
VIN Rising
Active, VFB = 1V, Not Switching
Feedback Voltage
Feedback Voltage
VFB
Enable
EN Input Voltage
Threshold
Logic-High
VIH
Rising
--
1.25
--
Logic-Low
VIL
Falling
--
1.18
--
VEN = VIH + 50mV
--
4.6
--
VEN = VIL  50mV
--
1.2
--
PGOOD Falling (Fault)
--
88
--
PGOOD Rising (Good)
--
93
--
PGOOD Rising (Fault)
--
113
--
PGOOD Falling (Good)
--
107
--
Input Current
Power Good Threshold Voltage
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V
A
%VREF
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DS8079-02 May 2014
RT8079
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
300
--
2000
kHz
--
1000
--
kHz
300
--
2000
kHz
--
45
--
m
--
42
--
m
ILIM
4.2
6.6
--
A
Thermal Shutdown
Temperature
TSD
--
145
--
°C
Thermal Shutdown Hysteresis
T SD
--
20
--
°C
Switching Frequency Setting and External Synchronization (RT/SYNC pin)
Switching Frequency Range in
RT Mode
fOSC
Oscillator Frequency
Switching Frequency Range in
ExtSYNC Mode
RRT = 180k
fSYNC
MOSFET
VBOOT  VSW = 5V
High Side MOSFET Resistance
Low Side MOSFET Resistance
Current Limit
Current Limit Threshold
Over Temperature Protection
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8079-02 May 2014
is a registered trademark of Richtek Technology Corporation.
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RT8079
Typical Application Circuit
RT8079
1, 2, 16
VIN
C1
10µF
R3
100k
VIN
15 EN
14
9
C4
10nF
PGOOD
SS/TR
8 RT/SYNC
RRT
180k
L
1.5µH
10, 11, 12
SW
CBOOT
C2
C3
0.1µF
22µF
22µF
13
BOOT
6
FB
7
COMP
RC
3, 4, 17(Exposed Pad)
GND
7.68k
5
AGND
CC
3.3nF
VOUT
1.8V
R1
11.8k
R2
10k
Table 1. Recommended Component Selection
VOUT (V)
R1 (k)
R2 (k)
RC (k)
CC (nF)
L (H)
1.2
4.3
10
11.8
1
1 to 1.5
1.8
11.8
10
7.68
3.3
1 to 1.5
2.5
20.4
10
10.7
2.2
1 to 2.2
3.3
30
10
14
1.8
1 to 2.2
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is a registered trademark of Richtek Technology Corporation.
DS8079-02 May 2014
RT8079
Typical Operating Characteristics
Efficiency vs. Output Current
100
90
90
80
80
70
VIN = 3.3V
VIN = 5V
60
Efficiency (%)
Efficiency (%)
Efficiency vs. Output Current
100
50
40
30
70
60
50
40
30
20
20
10
10
VOUT = 1.8V
0
0.001
0.01
0.1
1
VIN = 5V, VOUT = 3.3V
0
0.001
10
0.01
Output Current (A)
1
10
Output Current (A)
Output Voltage vs. Output Current
Reference Voltage vs. Temperature
0.85
1.85
0.84
1.84
Output Voltage (V)
Reference Voltage (V)
0.1
0.83
0.82
1.83
VIN = 5V
VIN = 3.3V
1.82
0.81
1.81
0.80
1.80
VOUT = 1.8V
-50
-25
0
25
50
75
100
125
0
0.5
Temperature (°C)
1
1.5
2
2.5
3
Output Current (A)
Frequency vs. Input Voltage
Frequency vs. Temperature
1000
1.02
1.01
1.00
Frequency (MHz)1
Frequency (kHz)1
980
960
940
920
0.99
0.98
0.97
0.96
0.95
0.94
VIN = 3.3V, VOUT = 1.8V, IOUT = 1A
900
0.93
VOUT = 1.8V, IOUT = 1A
0.92
-50
-25
0
25
50
75
100
Temperature (°C)
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8079-02 May 2014
125
3
3.5
4
4.5
5
5.5
6
Input Voltage (V)
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RT8079
Current Limit vs. Input Voltage
Current Limit vs. Temperature
9.0
9.0
8.4
Current Limit (A)
Current Limit (A)
8.5
8.0
7.5
7.0
VIN = 5V
VIN = 3.3V
7.8
7.2
6.6
6.5
VOUT = 1.8V
VOUT = 1.8V
6.0
6.0
3
3.5
4
4.5
5
5.5
-50
6
-25
0
Input Voltage (V)
50
75
100
125
Temperature (°C)
UVLO vs. Temperature
Enable Threshold Voltage vs. Temperature
1.40
Enable Threshold Voltage (V)1
2.9
2.8
UVLO (V)
25
2.7
Rising
2.6
2.5
Falling
2.4
2.3
1.32
Rising
1.24
1.16
Falling
1.08
1.00
-50
-25
0
25
50
75
100
125
-50
0
25
50
75
Temperature (°C)
Output Ripple
Output Ripple
VSW
(5V/Div)
VOUT
(10mV/Div)
VSW
(5V/Div)
VOUT
(10mV/Div)
IL
(1A/Div)
IL
(2A/Div)
VIN = 3.3V, VOUT = 1.8V, IOUT = 1A
Time (500ns/Div)
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-25
Temperature (°C)
100
125
VIN = 3.3V, VOUT = 1.8V, IOUT = 3A
Time (500ns/Div)
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RT8079
Load Transient Response
Load Transient Response
VOUT
(100mV/Div)
VOUT
(100mV/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
VIN = 5V, VOUT = 1.8V, IOUT = 1A to 3A
VIN = 5V, VOUT = 3.3V, IOUT = 1A to 3A
Time (100μs/Div)
Time (100μs/Div)
Switching Frequency vs. RRT
Switching Frequency vs. RRT
2000
Low Frequency
Switching Frequency (kHz)1
Switching Frequency (kHz)1
1000
840
680
520
360
200
High Frequency
1760
1520
1280
1040
800
300
400
500
600
700
800
900
RRT (k Ω)
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DS8079-02 May 2014
1000
60
80
100
120
140
160
180
200
RRT (k Ω)
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RT8079
Application Information
The basic RT8079 application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT. The switching frequency range
from 300kHz to 2MHz. It is adjusted by using a resistor
to ground on the RT/SYNC pin.
Output Voltage Setting
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 1.
VOUT
R1
FB
RT8079
R2
GND
Figure 1. Setting the Output Voltage
The output voltage setting range is 0.827V to 3.6V and
the set by an external resistive divider is according to the
following equation :
VOUT = VFB  1 R1 
 R2 
where VFB is the feedback reference voltage 0.827V (typ.).
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance :
V
V
IL =  OUT   1 OUT 
VIN 
 fOSC  L  
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor. A
reasonable starting point for selecting the ripple current
is ΔIL = 0.4 (IMAX). The largest ripple current occurs at
the highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :

 
VOUT
VOUT 
L =
 1 


f
I
V


L(MAX)  
IN(MAX) 
 OSC
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CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
V
VIN
IRMS = IOUT(MAX) OUT
1
VIN
VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS =
IOUT/2. This simple worst case condition is commonly used
for design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based on only 2000 hours of life,
which makes it advisable to either further derate the
capacitor or choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be placed in parallel to meet size or height requirements
in the design. The selection of COUT is determined by the
effective series resistance (ESR) that is required to
minimize voltage ripple, load step transients, and the
amount of bulk capacitance that is necessary to ensure
that the control loop is stable. Loop stability can be
examined by viewing the load transient response as
described in a later section. The output ripple, ΔVOUT, is
determined by :
1

VOUT  IL ESR 
8fOSCCOUT 

Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple with the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
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RT8079
Thermal Considerations
Maximum Power Dissipation (W)1
2.4
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WQFN-16L 3x3 package, the thermal resistance, θJA, is
47°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (47°C/W) = 2.128W for
WQFN-16L 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 2 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
DS8079-02 May 2014
Four-Layer PCB
2.0
1.6
1.2
0.8
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum Power Dissipation
Layout Considerations
For the best performance of the RT8079, the following
guidelines must be strictly followed.

The input capacitor should be placed as close as possible
to the device pins (VIN and GND).

The RT/SYNC pin is sensitive. The RT resistor should
be located as close as possible to the IC and minimal
lengths of trace.

The SW node is with high frequency voltage swing. It
should be kept at a small area.

Place the feedback components as close as possible
to the IC and keep away from the noisy devices.

The GND and AGND should be connected to a strong
ground plane for heat sinking and noise protection.
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RT8079
Option
R7
R3
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
VIN
EN
PGOOD
BOOT
VIN
Input capacitor must be placed
as close to the IC as possible.
16 15 14 13
C1
VIN
VIN
GND
GND
CBOOT
1
12
2
11
GND
3
10
17
4
9
6
7
8
RRT
L
VOUT
C2
C3
CSS
AGND
FB
COMP
RT/SYNC
5
SW
SW
SW
SS/TR
The feedback components
must be connected as close
to the device as possible.
RC
R1
R2
CP
CC
GND
Figure 3. PCB Layout Guide
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DS8079-02 May 2014
RT8079
Outline Dimension
D
SEE DETAIL A
D2
L
1
E
E2
e
b
A
A1
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A3
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
1.300
1.750
0.051
0.069
E
2.950
3.050
0.116
0.120
E2
1.300
1.750
0.051
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 16L QFN 3x3 Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8079-02 May 2014
www.richtek.com
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