FAIRCHILD NC7NZ34L8X

Revised April 2003
NC7NZ34
TinyLogic UHS Triple Buffer
General Description
Features
The NC7NZ34 is a triple buffer from Fairchild’s Ultra High
Speed Series of TinyLogic in the space saving US8 package. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive
while maintaining low static power dissipation over a very
broad VCC operating range. The device is specified to
operate over the 1.65V to 5.5V VCC range. The inputs and
outputs are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage.
■ Space saving US8 surface mount package
■ MicroPak leadless package
■ Ultra High Speed: tPD 2.4 ns Typ into 50 pF at 5V VCC
■ High Output Drive: ±24 mA at 3V VCC
■ Broad VCC Operating Range: 1.65V to 5.5V
■ Power down high impedance inputs/outputs
■ Overvoltage tolerant inputs facilitate 5V to 3V translation
■ Patented noise/EMI reduction circuitry implemented
Ordering Code:
Product
Order
Package
Code
Number
Number
Top Mark
NC7NZ34K8X
MAB08A
7NZ34
NC7NZ34L8X
(Preliminary)
MAC08A
P9
Package Description
Supplied As
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2003 Fairchild Semiconductor Corporation
DS500494
www.fairchildsemi.com
NC7NZ34 TinyLogic UHS Triple Buffer
July 2001
NC7NZ34
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Descriptions
(Top View)
Pin Names
Description
A1, A2, A3
Data Inputs
Y1, Y2, Y3
Output
Pin One Orientation Diagram
Function Table
Y=A
Input
Output
A
Y
L
L
AAA represents Product Code Top Mark - see ordering code
H
H
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
H = HIGH Logic Level
L = LOW Logic Level
Pad Assignments for MicroPak
(Top Thru View)
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2
Supply Voltage (VCC)
−0.5V to +7.0V
DC Input Voltage (VIN)
−0.5V to +7.0V
DC Output Voltage (VOUT)
−0.5V to +7.0V
Recommended Operating
Conditions (Note 2)
Supply Voltage
DC Input Diode Current (IIK)
VIN < 0V
−50 mA
DC Output Diode Current (IOK)
VOUT < 0V
−50 mA
1.65V to 5.5V
Data Retention
1.5V to 5.5V
Input Voltage (VIN)
0V to 5.5V
Output Voltage (VOUT)
0V to VCC
Input Rise and Fall Time (tr, tf)
±50 mA
VCC = 1.8V, 2.5V ± 0.2V
0 to 20 ns/V
±100 mA
VCC = 3.3V ± 0.3V
0 to 10 ns/V
−65°C to +150°C
VCC = 5.5V ± 0.5V
DC Output Source/Sink Current (IOUT)
DC VCC/GND Current (ICC/IGND)
Storage Temperature (TSTG)
Operating (VCC )
150°C
Junction Temperature under Bias (TJ)
0 to 5 ns/V
−40°C to +85°C
Operating Temperature (TA)
Thermal Resistance (θJA)
Junction Lead Temperature (TL)
260°C
(Soldering, 10 seconds)
Power Dissipation (PD) @ +85°C
250°C/W
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifications should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside datasheet specifications.
250 mW
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
Parameter
TA = +25°C
VCC
(V)
Min
Typ
TA = −40°C to +85°C
Max
Min
Units
Conditions
Max
HIGH Level Control
1.8 ± 0.15
0.75 VCC
0.75 VCC
Input Voltage
2.3 to 5.5
0.7 VCC
0.7 VCC
LOW Level Control
1.8 ± 0.15
0.25 VCC
0.25 VCC
Input Voltage
2.3 to 5.5
0.3 VCC
0.3 VCC
V
V
HIGH Level Control
1.65
1.55
1.65
Output Voltage
2.3
2.2
2.3
1.55
2.2
3.0
2.9
3.0
2.9
4.5
4.4
4.5
4.4
1.65
1.29
1.52
1.29
2.3
1.9
2.14
1.9
IOH = −8 mA
3.0
2.4
2.75
2.4
IOH = −16 mA
3.0
2.3
2.62
2.3
IOH = −24 mA
4.5
3.8
4.13
3.8
IOH = −100 µA
V
1.65
0.0
0.1
Output Voltage
2.3
0.0
0.1
0.1
3.0
0.0
0.1
0.1
Input Leakage Current
IOFF
Power Off Leakage Current
ICC
Quiescent Supply Current
IOH = −4 mA
IOH = −32 mA
LOW Level Control
IIN
VIN = VIH
0.1
IOL = 100 µA
4.5
0.0
0.1
0.1
1.65
0.08
0.24
0.24
2.3
0.10
0.3
0.3
IOL = 8 mA
3.0
0.16
0.4
0.4
IOL = 16 mA
3.0
0.24
0.55
0.55
IOL = 24 mA
4.5
0.25
0.55
0.55
0 to 5.5
±0.1
±1.0
µA
0 ≤ VIN ≤ 5.5V
0.0
1.0
10
µA
VIN or VOUT = 5.5V
1.65 to 5.5
1.0
10
µA
VIN = 5.5V, GND
3
V
VIN = VIL
IOL = 4 mA
IOL = 32 mA
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NC7NZ34
Absolute Maximum Ratings(Note 1)
NC7NZ34
AC Electrical Characteristics
Symbol
tPLH
(V)
Propagation Delay
tPHL
tPLH
TA = +25°C
VCC
Parameter
Propagation Delay
tPHL
Min
Typ
TA = −40°C to +85°C
Max
Min
Max
1.8 ± 0.15
1.8
4.6
8.0
1.8
8.8
2.5 ± 0.2
1.0
3.0
5.2
1.0
5.8
3.3 ± 0.3
0.8
2.3
3.6
0.8
4.0
5.0 ± 0.5
0.5
1.8
2.9
0.5
3.2
3.3 ± 0.3
1.2
3.0
4.6
1.2
5.1
5.0 ± 0.5
0.8
2.4
3.8
0.8
4.2
CIN
Input Capacitance
0
2.5
CPD
Power Dissipation
3.3
9
Capacitance
5.0
11
Units
ns
ns
Conditions
CL = 15 pF,
RL = 1 MΩ
CL = 50 pF,
Figure
Number
Figures
1, 3
RL = 500Ω
Figures
1, 3
(Note 3)
Figure 2
pF
pF
Note 3: C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD ) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
Dynamic Switching Characteristics
Symbol
Parameter
Conditions
VCC
TA = 25°C
(V)
Typical
Unit
VOLP
Quiet Output Dynamic Peak VOL
CL = 50pF, VIH = 5.0V, VIL = 0V
5.0
0.8
V
VOLV
Quiet Output Dynamic Valley VOL
CL = 50pF, VIH = 5.0V, VIL = 0V
5.0
−0.8
V
AC Loading and Waveforms
CL includes load and stray capacitance
Input PRR = 1.0 MHz; tW = 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveform; tr = tf = 1.8 ns;
PRR = 10 MHz; Duty Cycle = 50%
FIGURE 3. AC Waveforms
FIGURE 2. ICCD Test Circuit
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4
TAPE FORMAT for US8
Package
Tape
Number
Cavity
Section
Cavities
Status
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Designator
K8X
Cover Tape
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
Cover Tape
TAPE DIMENSIONS inches (millimeters)
TAPE FORMAT for MicroPak
Package
Designator
K8X
Tape
Number
Cavity
Section
Cavities
Status
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
5
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NC7NZ34
Tape and Reel Specification
NC7NZ34
Tape and Reel Specification
(Continued)
REEL DIMENSIONS inches (millimeters)
Tape
Size
8 mm
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165
0.331 + 0.059/−0.000
0.567
W1 + 0.078/−0.039
(177.8)
(1.50)
(13.00)
(20.20)
(55.00)
(8.40 + 1.50/−0.00)
(14.40)
(W1 + 2.00/−1.00)
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6
NC7NZ34
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
7
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NC7NZ34 TinyLogic UHS Triple Buffer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
(Preliminary)
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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8