TC74VHC373F/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC373F,TC74VHC373FT,TC74VHC373FK Octal D-Type Latch with 3-State Output The TC74VHC373 is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. TC74VHC373F TC74VHC373FT Features • High speed: tpd = 5.0 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Power down protection is provided on all inputs. Balanced propagation delays: tpLH ∼ − tpHL • • Wide operating voltage range: VCC (opr) = 2 to 5.5 V • Low noise: VOLP = 0.9 V (max) • Pin and function compatible with 74ALS373 TC74VHC373FK Weight SOP20-P-300-1.27A TSSOP20-P-0044-0.65A VSSOP20-P-0030-0.50 1 : 0.22 g (typ.) : 0.08 g (typ.) : 0.03 g (typ.) 2010-08-18 TC74VHC373F/FT/FK Pin Assignment IEC Logic Symbol OE 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 LE OE LE D0 D1 D2 D3 D4 D5 D6 D7 (1) (11) EN C1 (3) (4) (7) (8) (13) (14) (17) (18) 1D (2) (5) (6) (9) (12) (15) (16) (19) Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 (top view) Truth Table Inputs Output OE LE D H X X Z L L X Qn L H L L L H H H X: Don’t care Z: High impedance Qn: Q outputs are latched at the time when the LE input is taken to a low logic level. System Diagram D0 D1 3 LE OE 11 D2 4 D3 7 D4 8 D5 13 D6 14 D7 17 18 D D D D D D D D L Q L Q L Q L Q L Q L Q L Q L Q 2 5 6 9 1 Q0 Q1 Q2 Q3 2 12 Q4 15 Q5 16 Q6 19 Q7 2010-08-18 TC74VHC373F/FT/FK Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit Supply voltage range VCC −0.5 to 7.0 V DC input voltage VIN −0.5 to 7.0 V VOUT −0.5 to VCC + 0.5 V Input diode current IIK −20 mA Output diode current IOK ±20 mA DC output current IOUT ±25 mA DC VCC/ground current ICC ±75 mA Power dissipation PD 180 mW Storage temperature Tstg −65 to 150 °C DC output voltage Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Operating Ranges (Note) Characteristics Symbol Rating Unit Supply voltage VCC 2.0 to 5.5 V Input voltage VIN 0 to 5.5 V VOUT 0 to VCC V Operating temperature Topr −40 to 85 °C Input rise and fall time dt/dv Output voltage Note: 0 to 100 (VCC = 3.3 ± 0.3 V) 0 to 20 (VCC = 5 ± 0.5 V) ns/V The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 3 2010-08-18 TC74VHC373F/FT/FK Electrical Characteristics DC Characteristics Characteristics Test Condition Symbol Max ― ― VCC × 0.7 ― ― ― ― 3.0 to 5.5 ― ― VCC × 0.3 ― VCC × 0.3 2.0 1.9 2.0 ― 1.9 ― 3.0 2.9 3.0 ― 2.9 ― 4.5 4.4 4.5 ― 4.4 ― IOH = −4 mA 3.0 2.58 ― ― 2.48 ― IOH = −8 mA 4.5 3.94 ― ― 3.80 ― 2.0 ― 0.0 0.1 ― 0.1 3.0 ― 0.0 0.1 ― 0.1 4.5 ― 0.0 0.1 ― 0.1 IOL = 4 mA 3.0 ― ― 0.36 ― IOL = 8 mA 4.5 ― ― 0.36 ― 0.44 0.44 5.5 ― ― ±0.25 ― ±2.50 μA VIH ― Low-level input voltage VIL ― Min 2.0 1.50 3.0 to 5.5 2.0 IOH = −50 μA VOH VIN = VIH or VIL IOL = 50 μA Low-level output voltage VCC (V) VOL VIN = VIH or VIL VIN = VIH or VIL 0.50 Min Unit Typ. High-level input voltage High-level output voltage Ta = −40 to 85°C Ta = 25°C 1.50 VCC × 0.7 ― Max ― ― V 0.50 V V V 3-state output off-state current IOZ Input leakage current IIN VIN = 5.5 V or GND 0 to 5.5 ― ― ±0.1 ― ±1.0 μA Quiescent supply current ICC VIN = VCC or GND 5.5 ― ― 4.0 ― 40.0 μA Ta = −40 to 85°C Unit VOUT = VCC or GND Timing Requirements (input: tr = tf = 3 ns) Characteristics Minimum pulse width Test Condition Symbol tw (H) ― Minimum set-up time ts ― Minimum hold time th ― (LE) 4 Ta = 25°C VCC (V) Typ. Limit Limit 3.3 ± 0.3 ― 5.0 5.0 5.0 ± 0.5 ― 5.0 5.0 3.3 ± 0.3 ― 4.0 4.0 5.0 ± 0.5 ― 4.0 4.0 3.3 ± 0.3 ― 1.0 1.0 5.0 ± 0.5 ― 1.0 1.0 ns ns ns 2010-08-18 TC74VHC373F/FT/FK AC Electrical Characteristics (input: tr = tf = 3 ns) Characteristics Test Condition Symbol VCC (V) Propagation delay time tpLH (LE-Q) tpHL Propagation delay time tpLH (D-Q) tpHL 3-state output enable time 3-state output disable time Output to output skew Input capacitance Output capacitance Power dissipation capacitance tpZL tpZH tpLZ tpHZ CL (pF) Min Typ. Max Min Max 15 ― 7.0 11.0 1.0 13.0 50 ― 9.5 14.5 1.0 16.5 15 ― 4.9 7.2 1.0 8.5 50 ― 6.4 9.2 1.0 10.5 15 ― 7.3 11.4 1.0 13.5 50 ― 9.8 14.9 1.0 17.0 15 ― 5.0 7.2 1.0 8.5 50 ― 6.5 9.2 1.0 10.5 15 ― 7.3 11.4 1.0 13.5 50 ― 9.8 14.9 1.0 17.0 15 ― 5.5 8.1 1.0 9.5 50 ― 7.0 10.1 1.0 11.5 3.3 ± 0.3 50 ― 9.5 13.2 1.0 15.0 5.0 ± 0.5 50 ― 6.5 9.2 1.0 10.5 3.3 ± 0.3 ― 5.0 ± 0.5 3.3 ± 0.3 ― 5.0 ± 0.5 3.3 ± 0.3 RL = 1 kΩ 5.0 ± 0.5 RL = 1 kΩ tosLH tosHL (Note 1) Ta = −40 to 85°C Ta = 25°C 3.3 ± 0.3 50 ― ― 1.5 ― 1.5 5.0 ± 0.5 50 ― ― 1.0 ― 1.0 Unit ns ns ns ns ns CIN ― ― 4 10 ― 10 pF COUT ― ― 6 ― ― ― pF ― 27 ― ― ― pF CPD (Note 2) Note 1: Parameter guaranteed by design. tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn| Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC/8 (per latch) And the total CPD when n pcs. of Latch operate can be gained by the following equation: CPD (total) = 14 + 13·n 5 2010-08-18 TC74VHC373F/FT/FK Noise Characteristics (input: tr = tf = 3 ns) Characteristics Test Condition Symbol Ta = 25°C VCC (V) Typ. Max Unit Quiet output maximum dynamic VOL VOLP CL = 50 pF 5.0 0.5 0.8 V Quiet output minimum dynamic VOL VOLV CL = 50 pF 5.0 −0.5 −0.8 V Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 3.5 V Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 1.5 V Input Equivalent Circuit INPUT 6 2010-08-18 TC74VHC373F/FT/FK Package Dimensions Weight: 0.22 g (typ.) 7 2010-08-18 TC74VHC373F/FT/FK Package Dimensions Weight: 0.08 g (typ.) 8 2010-08-18 TC74VHC373F/FT/FK Package Dimensions Weight: 0.03 g (typ.) 9 2010-08-18 TC74VHC373F/FT/FK RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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