TOSHIBA 74VHC540FT

74VHC540FT,74VHC541FT
CMOS Digital Integrated Circuits
Silicon Monolithic
74VHC540FT,74VHC541FT
1. Functional Description
• Octal Bus Buffer
74VHC540FT: INVERTED, 3-STATE OUTPUTS
74VHC541FT: NON-INVERTED, 3-STATE OUTPUTS
2. General
The 74VHC540FT/74VHC541FT are advanced high speed CMOS OCTAL BUS BUFFERs fabricated with silicon
gate C2MOS technology.
They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
The 74VHC540FT is an inverting type, and the 74VHC541FT is a non-inverting type.
When either G1 or G2 are high, the terminal outputs are in the high-impedance state.
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
This circuit prevents device destruction due to mismatched supply and input voltages
3. Features
(1)
High speed: Propagation delay time = 3.7 ns (typ.) at VCC = 5 V
(2)
Low power dissipation: ICC = 4 µA (max) at Ta = 25 
(3)
High noise immunity: VNIH = VNIL = 28% VCC (min)
(4)
Power down protection is provided on all inputs.
(5)
Balanced propagation delays: tPLH ≈ tPHL
(6)
Wide operating voltage range: VCC(opr) = 2 V to 5.5 V
(7)
Low noise: VOLP = 1.0 V (max)
(8)
Pin and function compatible with 74 series (74AC/HC/AHC/LV etc.) 540 or 541 type.
4. Packaging
TSSOP20B
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74VHC540FT,74VHC541FT
5. Pin Assignment
74VHC540FT
74VHC541FT
6. Marking
74VHC540FT
74VHC541FT
7. IEC Logic Symbol
74VHC540FT
74VHC541FT
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8. Truth Table
Input G1
X:
Z:
Yn:
Yn:
Input G2
Input An
Output Yn
Output Yn
H
X
X
Z
Z
X
H
X
Z
Z
L
L
H
H
L
L
L
L
L
H
Don't care
High impedance
74VHC541FT
74VHC540FT
9. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Rating
Unit
Supply voltage
VCC
-0.5 to 7.0
V
Input voltage
VIN
-0.5 to 7.0
VOUT
-0.5 to VCC + 0.5
IIK
-20
Output diode current
IOK
±20
Output current
IOUT
±25
VCC/ground current
ICC
±75
Power dissipation
PD
180
mW
Storage temperature
Tstg
-65 to 150

Output voltage
Input diode current
Note:
mA
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
10. Operating Ranges (Note)
Characteristics
Symbol
Test Condition
Rating
Unit
V
Supply voltage
VCC
2.0 to 5.5
Input voltage
VIN
0 to 5.5
Output voltage
VOUT
0 to VCC
Operating temperature
Topr
-40 to 85

Input rise and fall times
dt/dv
VCC = 3.3 ± 0.3 V
0 to 100
ns/V
VCC = 5 ± 0.5 V
0 to 20
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs and bus inputs must be tied to either VCC or GND.
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11. Electrical Characteristics
11.1. DC Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Test Condition
VCC (V)
Min
Typ.
Max
Unit
High-level input voltage
VIH

2.0
1.50


V
3.0 to 5.5
VCC × 0.7


Low-level input voltage
VIL

2.0


0.50
High-level output voltage
VOH
Low-level output voltage
VOL
VIN = VIH or VIL
VIN = VIH or VIL
3.0 to 5.5


VCC × 0.3
2.0
1.9
2.0

3.0
2.9
3.0

4.5
4.4
4.5

IOH = -4 mA
3.0
2.58


IOH = -8 mA
4.5
3.94


IOL = 50 µA
2.0

0.0
0.1
3.0

0.0
0.1
IOH = -50 µA
4.5

0.0
0.1
IOL = 4 mA
3.0


0.36
IOL = 8 mA
4.5


0.36
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
5.5


±0.25
Input leakage current
IIN
VIN = 5.5 V or GND
0 to 5.5


±0.1
Quiescent supply current
ICC
VIN = VCC or GND
5.5


4.0
3-state output OFF-state
leakage current
µA
11.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
3-state output OFF-state
leakage current
Symbol
Test Condition
VIH

VIL
VOH
VOL
VCC (V)

VIN = VIH or VIL
VIN = VIH or VIL
IOH = -50 µA
Min
Max
Unit
V
2.0
1.50

3.0 to 5.5
VCC × 0.7

2.0

0.50
3.0 to 5.5

VCC × 0.3
2.0
1.9

3.0
2.9

4.5
4.4

IOH = -4 mA
3.0
2.48

IOH = -8 mA
4.5
3.80

IOL = 50 µA
2.0

0.1
3.0

0.1
4.5

0.1
IOL = 4 mA
3.0

0.44
IOL = 8 mA
4.5

0.44
±2.50
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
5.5

Input leakage current
IIN
VIN = 5.5 V or GND
0 to 5.5

±1.0
Quiescent supply current
ICC
VIN = VCC or GND
5.5

40.0
4
µA
2013-02-28
Rev.2.0
74VHC540FT,74VHC541FT
11.3. AC Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns)
Characteristics
Propagation delay time
Part Number
Symbol
74VHC540FT
tPLH,tPHL
Note
Test
Condition
VCC (V)
CL (pF)
Min
Typ.

3.3 ± 0.3
15

50

15
50
Max
Unit
4.8
7.0
ns
7.3
10.5

3.7
5.0

5.2
7.0
15

5.0
7.0
50

7.5
10.5
15

3.5
5.0
50

5.0
7.0
15

6.8
10.5
50

9.3
14.0
15

4.7
7.0
50

6.2
9.2
3.3 ± 0.3
50

11.2
15.4
5.0 ± 0.5
50

6.0
8.8
3.3 ± 0.3
50


1.5
5.0 ± 0.5
50


1.0
5.0 ± 0.5
74VHC541FT
tPLH,tPHL

3.3 ± 0.3
5.0 ± 0.5
3-state output enable time
tPZL,tPZH
RL = 1 kΩ 3.3 ± 0.3
5.0 ± 0.5
3-state output disable time
tPLZ,tPHZ
Output skew
tosLH,tosHL (Note 1)
Input capacitance
Output capacitance
Power dissipation
capacitance
RL = 1 kΩ
74VHC540FT

CIN


4
10
COUT


6



17


18

CPD
(Note 2)
74VHC541FT
pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm - tPLHn|, tosHL = |tPHLm - tPHLn|)
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC/8 (per bit)
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11.4. AC Characteristics
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 3 ns)
Characteristics
Part Number
Symbol
Note
Propagation delay time
74VHC540FT
tPLH,tPHL
Test
Condition
VCC (V)
CL (pF)
Min

3.3 ± 0.3
15
50
Max
Unit
1.0
8.5
ns
1.0
12.0
15
1.0
6.0
50
1.0
8.0
15
1.0
8.5
50
1.0
12.0
15
1.0
6.0
50
1.0
8.0
15
1.0
12.5
50
1.0
16.0
15
1.0
8.5
50
1.0
10.5
3.3 ± 0.3
50
1.0
17.5
5.0 ± 0.5
50
1.0
10.0
3.3 ± 0.3
50

1.5
5.0 ± 0.5
50

1.0

10
5.0 ± 0.5
74VHC541FT
tPLH,tPHL

3.3 ± 0.3
5.0 ± 0.5
3-state output enable time
tPZL,tPZH
RL = 1 kΩ
3.3 ± 0.3
5.0 ± 0.5
3-state output disable time
Output skew
tPLZ,tPHZ
RL = 1 kΩ
tosLH,tosHL (Note 1)
Input capacitance
CIN


pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm - tPLHn|, tosHL = |tPHLm - tPHLn|)
11.5. Noise Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Typ.
Limit
Unit
V
Quiet output maximum dynamic VOL
VOLP
CL = 50 pF
5.0
0.7
1.0
Quiet output minimum dynamic VOL
VOLV
CL = 50 pF
5.0
-0.7
-1.0
Minimum high-level dynamic input voltage
VIHD
CL = 50 pF
5.0

3.5
Maximum low-level dynamic input voltage
VILD
CL = 50 pF
5.0

1.5
11.6. Internal Equivalent Circuit
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Package Dimensions
Unit: mm
Weight: 0.071 g (typ.)
Package Name(s)
Nickname: TSSOP20B
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
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precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
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