HFBR-5208M and HFCT-5208M
1 x 9 Fiber Optic Transceivers for 622 Mb/s
ATM/SONET/SDH Applications
Data Sheet
Description
Features
General
• Performance
HFBR-5208M:
Links of 500 m with 62.5/125 µm multimode fiber
(MMF) from 155-622 Mb/s
HFCT-5208M:
Links of 15 km with 9/125 µm single-mode fiber
(SMF)
• Compliant with ATM forum
622.08 Mb/s physical layer specification (AF-PHY0046.000)
• Compliant with ANSI broadband ISDN - physical
layer specification T1.646-1995 and T1.646a-1997
• HFBR-5208M is compliant with ANSI network to
customer installation interfaces - synchronous
optical NETwork (SONET) physical media
dependent specification: multimode fiber
T1.416.01-1998
• HFCT-5208M is compliant to the intermediate
SONET OC12/SDH STM(S4.1) specifications
• Industry-standard multi-sourced 1 x 9 mezzanine
package style
• Single +5 V power supply operation and PECL logic
interfaces
• Wave solder and aqueous wash process compatible
• Unconditionally eye safe laser IEC 825/CDRH Class 1
compliant
The HFBR-5208M (multimode transceiver) and HFCT5208M (single-mode transceiver) from Avago
Technolgies allow the system designer to implement a
range of solutions for ATM/SONET STS-12/SDH STM-4
applications.
The overall Avago Technolgies transceiver consists of
three sections: the transmitter and receiver optical
subassemblies, an electrical subassembly and the
mezzanine package housing which incorporates a
duplex SC connector receptacle.
Applications
HFBR-5208M:
• General purpose low-cost MMF links at 155 to 650
Mb/s
• ATM 622 Mb/s MMF links from switch-to-switch or
switch-to-server in the end-user premise
• Private MMF interconnections at 622 Mb/s SONET
STS-12/SDH STM-4 rate
HFCT-5208M:
• ATM 622 Mb/s SMF links from switch-to-switch or
switch-to-server in the end-user premise
• Private SMF interconnections at 622 Mb/s SONET
STS-12/SDH STM-4 rate
622 Mb/s Product Family
HFCT-5218M:
• 1300 nm laser-based transceiver in 1 x 9 package
for links of 40 km with single-mode fiber cables
Transmitter Section
The transmitter section of the HFBR-5208M consists of
a 1300 nm LED in an optical subassembly (OSA) which
mates to the multimode fiber cable. The HFCT-5208M
incorporates a 1300 nm Fabry Perot (FP) laser in the
optical subassembly. In addition, this package has been
designed to be compliant with IEC 825 eye-safety
requirements under any single fault condition. The
OSA’s are driven by a custom, silicon bipolar IC which
converts differential PECL logic signals (ECL referenced
to a +5 V supply) into an analog LED/laser drive current.
Receiver Section
The receiver contains an InGaAs PIN photodiode mounted
together with a custom, silicon bipolar transimpedance
preamplifier IC in an OSA. This OSA is mated to a custom,
silicon bipolar circuit providing post amplification and
quantization and optical signal detection.
The custom, silicon bipolar circuit includes a Signal Detect
circuit which provides a PECL logic high state output upon
detection of a usable input optical signal level. This singleended PECL output is designed to drive a standard PECL
input through normal 50 Ω PECL load.
Applications Information
Typical BER Performance of HFBR-5208M Receiver versus
Input Optical Power Level
The HFBR/HFCT-5208M transceiver can be operated at
Bit-Error-Ratio conditions other than the required BER = 1
x 10-10 of the 622 MBd ATM Forum 622.08 Mb/s Physical
Layer Standard and the ANSI T1.646a. The typical trade-off
of BER versus Relative Input Optical Power is shown in
Figure 1. The Relative Input Optical Power in dB is
referenced to the Input Optical Power parameter value in
the Receiver Optical Characteristics table. For better BER
condition than 1 x 10-10, more input signal is needed (+dB).
10-2
BIT ERROR RATIO
10-3
10-4
10-5
10-6
10-7
10-8
10-9
10-10
10-11
10-12
10-13
10-14
10-15
LINEAR EXTRAPOLATION OF
10-4 THROUGH 10 -7 DATA
ACTUAL DATA
-5 -4 -3 -2 -1
0
1
2
3
Figure 1. Relative Input Optical Power -dBm Average.
2
For example, to operate the HFBR-5208M at a BER of 1 x
10-12, the receiver will require an input signal approximately
0.6 dB higher than the -26 dBm level required for 1 x 10-10
operation, i.e. -25.4 dBm.
An informative graph of a typical, short fiber transceiver
link per-formance can be seen in Figure 2. This figure is
useful for designing short reach links with time-based jitter
requirements. This figure indicates Relative Input Optical
Power versus Sampling Time Position within the receiver
output data eye-opening. The given curves are at a constant
bit-error-ratio (BER) of 10-10 for four different signaling rates,
155 MBd, 311 MBd, 622 MBd and 650 MBd. These curves,
called “tub” diagrams for their shape, show
the amount of data eye-opening time-width for various
receiver input optical power levels. A wider data eyeopening provides more time for the clock recovery circuit
to operate within without creating errors. The deeper the
tub is indicates less input optical power is needed to
operate the receiver at the same BER condition. Generally,
the wider and deeper the tub is the better. The Relative
Input Optical Power amount (dB) is referenced to the
absolute level (dBm avg.) given in the Receiver Optical
Characteristics table. The 0 ns sampling time position for
this Figure 2 refers to the center of the Baud interval for the
particular signaling rate. The Baud interval is the reciprocal
of the signaling rate in MBd. For example, at 622 MBd the
Baud interval is 1.61 ns, at 155 MBd the Baud interval is
6.45 ns. Test conditions for this tub diagram are listed in
Figure 2.
The HFBR/HFCT-5208M receiver input optical power
requirements vary slightly over the signaling rate range of
20 MBd to 700 MBd for a constant bit-error-ratio (BER) of
10-10 condition. Figure 3 illustrates the typical receiver
relative input optical power varies by <0.7 dB over this full
range. This small sensitivity variation allows the optical
budget to remain nearly constant for designs that make
use of the broad signaling rate range of the
HFBR/HFCT-5208M. The curve has been normalized to the
input optical power level (dBm avg.) of the receiver for 622
MBd at center of the Baud interval with a BER of 10-10. The
data patterns that can be used at these signaling rates
should be, on average, balanced duty factor of 50%.
Momentary excursions of less or more data duty factor
than 50% can occur, but the overall data pattern must
remain balanced. Unbalanced data duty factor will cause
excessive pulse-width distortion, or worse, bit errors. The
test conditions are listed in Figure 3.
Equivalent Average Optical Input Power in dBm for extrapolated BER =le -10
2.5
155.52 MBd
311.04 MBd
622.08 MBd
650.00 MBd
2
1.5
1
0.5
0
-0.5
-1
-3.5
-2.5
-1.5
-0.5
0.5
1.5
2.5
Clock to Data Offset Delay in nsec (0 = Data Eye Center)
Figure 2. HFBR-5208M Relative Input Optical Power as a function of sampling time position. Normalized to center of Baud interval at
τ r /ττ f = 0.9 ns with 3 m of 62.5 µm MMF.
622 MBd. Test Conditions +25°C, 5.25 V, PRBS 2 23 -1, optical
Relative Sensitivity in dB for extrapolated BER = le -10
2.5
2
HFBR-5208M
HFCT-5208M
1.5
1
0.5
0
-0.5
-1
-1.5
Figure 3. Relative Input Optical Power as a function of data rate normalized to center of Baud interval at 622 MBd.
τr/ττf=0.9nswith3mofMMForSMF.
TestConditions+25°C,5.25V,PRBS223-1,optical
3
3.5
Recommended Circuit Schematic
When designing the HFBR/HFCT-5208M circuit interface,
there are a few fundamental guidelines to follow. For
example, in the Recommended Circuit Schematic, Figure
4, the differential data lines should be treated as 50 ohm
Microstrip or stripline transmission lines. This will help to
minimize the parasitic inductance and capacitance effects.
Proper termination of the differential data signal will prevent
reflections and ringing which would compromise the signal
fidelity and generate unwanted electrical noise. Locate
termination at the received signal end of the transmission
line. The length of these lines should be kept short and of
equal length to prevent pulse-width distortion from
occurring. For the high-speed signal lines, differential signals
should be used, not single-ended signals. These differential
signals need to be loaded symmetrically to prevent
unbalanced currents from flowing which will cause
distortion in the signal.
In addition to these recommenda-tions, Avago
Technolgies’ Application Engineering staff is available for
consulting on best layout practices with various vendors’
serializer/deserializer, clock recovery/generation integrated
circuits.
Reference Design
Avago Technolgies has developed a reference design for
multimode and single-mode OC-12 ATM-SONET/SDH
applications shown in Figure 6. This reference design uses
a Vitesse Semiconductor Inc.’s VSC8117 clock recovery/
clock generation/serializer/deserializer integrated circuit and
a PMC-Sierra Inc. PM5355 framer IC. Application Note 1178
documents the design, layout, testing and performance of
this reference design. Gerber files, schematic and
application note are available from the Avago Technolgies
web site at the URL of http://www.avagotech.com
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR PECL
SIGNALS NEED TO BE LOCATED AT THE INPUT
OF DEVICES RECEIVING THOSE PECL SIGNALS.
RECOMMEND MULTI-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP OR
STRIPLINE SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 OHMS.
R2 = R3 = R5 = R7 = R9 = 82 OHMS.
C1 = C2 = C3 = C5 = C6 = 0.1 F.
C4 = C7 = 10 F.
L1 = L2 = 1 H COIL OR FERRITE
INDUCTOR (see text comments).
MOUNTING POST
MOUNTING POST
NO INTERNAL CONNECTION
NO INTERNAL CONNECTION
HFBR/HFCT-5208M
TOP VIEW
Rx
VEER
1
RD
2
RD
3
Rx
VCCR
5
SD
4
Tx
VCCT
6
C1
C7
TERMINATION
AT PHY
DEVICE
INPUTS
VCC
R5
R8
C2
L1
R2
L2
R1
RD
SD
VCC
VCC
R3
C5
R4
TERMINATION
AT TRANSCEIVER
INPUTS
R10
RD
Tx
VEET
9
TD
8
C3
C4
VCC FILTER
AT V CC PINS
TRANSCEIVER
R9
R7
C6
R6
TD
7
TD
TD
Figure 4. Recommended Circuit Schematic for dc Coupling (at +5 V) between Optical Transceiver and Physical Layer IC
4
Operation in -5.2 V Designs
Electromagnetic Interference (EMI)
For applications that require -5.2 V dc power supply level
for true ECL logic circuits, the HFBR/HFCT-5208M transceiver
can be operated with a VCC = 0 V dc and a VEE = -5.2 V dc.
This transceiver is not specified with an operating, negative
power supply voltage. The potential compromises that can
occur with use of -5.2 V dc power are that the absolute
voltage states for VOH and VOL will be changed slightly due
to the 0.2 V difference in supply levels. Also, noise immunity
may be compromised for the HFBR/HFCT-5208M transceiver because the ground plane is now the VCC supply
point. The suggested power supply filter circuit shown in
the Recommended Circuit Schematic figure should be
located in the VEE paths at the transceiver supply pins. Direct
coupling of the differential data signal can be done between
the HFBR-5208M transceiver and the standard ECL circuits.
For guaranteed -5.2 V dc operation, contact your local
Avago Technolgies Component Field Sales Engineer for
assistance.
One of a circuit board designer’s foremost concerns is the
control of electromagnetic emissions from electronic
equipment. Success in controlling generated
Electromagnetic Interference (EMI) enables the designer to
pass a governmental agency’s EMI regulatory standard; and
more importantly, it reduces the possibility of interference
to neighboring equipment. There are three options
available for the HFBR/HFCT-5208M with regard to EMI
shielding for providing the designer with a means to
achieve good EMI performance. The EMI performance of
an enclosure using these transceivers is dependent on the
chassis design. Avago Technolgies encourages using
standard RF suppression practices and avoiding poorly EMIsealed enclosures. In addition, Avago Technolgies advises
that for the best EMI performance, the metalized case must
be connected to chassis ground using one of the shield
options.
20.32
(0.800)
2 x 1.9 – 0.1
(0.075 – 0.004)
9 x 0.8 – 0.1
(0.032 – 0.004)
20.32
(0.800)
2.54
(0.100)
TOP VIEW
DIM EN SION S ARE IN M ILLIM ETERS (IN CHES)
Figure 5. Recommended Board Layout Pattern
HFBR/HFCT-5208EM transceiver beyond the front surface
of the panel or enclosure is 6.35 mm (0.25 in) . With this
option, there is flexibility of positioning the module to fit
the specific need of the enclosure design. (See Figure 8 for
the mechanical drawing dimensions of this shield.)
The second shielded option, option FM, is for applications
that are designed to have a flush mounting of the module
with respect to the front of the panel or enclosure. The
flush-mount design accommodates a large variety of panel
thickness, i.e. 1.02 mm (.04 in) min to 2.54 mm (0.1 in)
max. Note the reference plane for the flush-mount design
is the interior side of the panel or enclosure. The
recommended distance from the centerline of the
transceiver front solder posts to the inside wall of the panel
is 13.82 mm (0.544 in) . This option contacts the inside
panel or enclosure wall on all four sides of this metal shield.
(See Figure 10 for the mechanical drawing dimensions of
this shield.)
Figure 6. 622.08 Mb/s OC-12 ATM-SONET/SDH Reference Design Board
5
Both shielded design options connect only to the
equipment chassis and not to the signal or logic ground of
the circuit board within the equipment closure. The front
panel aperture dimensions are recommended in Figures 9
and 11. When layout of the printed circuit board is done to
incorporate these metal-shielded transceivers, keep the area
on the printed circuit board directly under the external
metal shield free of any components and circuit board
traces. For additional EMI performance advantage, use
duplex SC fiber-optic connectors that have low metal
content inside the connector. This lowers the ability of the
metal fiber-optic connectors to couple EMI out through
the aperture of the panel or enclosure.
N.B. For shielded
module the label
is mounted on
the end as
shown.
Recommended Solder and Wash Process
The HFBR/HFCT-5208M is compatible with industrystandard wave or hand solder processes.
HFBR-5000 Process Plug
The HFBR/HFCT-5208M transceiver is supplied with a
process plug, the HFBR-5000, for protection of the optical
ports with the Duplex SC connector receptacle. This process
plug prevents contamination during wave solder and
aqueous rinse as well as during handling, shipping or
storage. It is made of high-temperature, molded, sealing
material that will withstand +85°C and a rinse pressure of
110 lb/in2.
TX
39.6
MAX.
(1.56)
12.7
(0.50)
(
KEY:
YYWW = DATE CODE
XXXX-XXXX = HFBR-5208M or HFCT-5208M
ZZZZ = 1300 nm
4.7
(0.185)
AREA
RESERVED
FOR
PROCESS
PLUG
25.4 MAX.
(1.00)
+0.1
0.25 -0.05
+0.004
0.010 -0.002
XXXX-XXXX
ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
RX
SLOT DEPTH
12.7
(0.50)
SLOT WIDTH
2.5
(0.10)
2.0 ± 0.1
(0.079 ± 0.004)
)
9.8
MAX.
(0.386)
0.51
(0.020)
3.3 ± 0.38
(0.130 ± 0.015)
+0.25
0.46 -0.05
9X Ø
+0.010
0.018 -0.002
(
23.8
(0.937)
20.32
(0.800)
2X Ø
20.32
(0.800)
)
)
20.32
(0.800)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: X.XX ±0.025 mm
X.X ±0.05 mm
14.5
(0.57)
Masked insulator material
(no metalization)
Figure 7. Package Outline Drawing for HFBR/HFCT-5208M
6
+0.25
1.27 -0.05
2X Ø
+0.010
0.050 -0.002
(
8X 2.54
(0.100)
1.3
(0.051)
15.8 ± 0.15
(0.622 ± 0.006)
UNLESS OTHERWISE SPECIFIED.
Recommended Solder Fluxes and Cleaning/Degreasing
Chemicals
Recommended cleaning and degreasing chemicals for the
HFBR/HFCT-5208M are alcohols (methyl, isopropyl,
isobutyl), aliphatics (hexane, heptane) and other chemicals,
such as soap solution or naphtha. Do not use partially
halogenated hydrocarbons for cleaning/degreasing.
Examples of chemicals to avoid are 1,1.1 trichloroethane,
ketones (such as MEK), acetone, chloroform, ethyl acetate,
methylene dichloride, phenol, methylene chloride or
N methylpyrolldone.
Regulatory Compliance
These transceiver products are intended to enable
commercial system designers to develop equipment that
complies with the various regulations governing
certification of Information Technology Equipment. See the
Regulatory Compliance Table for details. Additional
information is available from your Avago Technolgies sales
representative.
Electrostatic Discharge (ESD)
There are two design cases in which immunity to ESD
damage is important.
The first case is during handling of the transceiver prior to
mounting it on the circuit board. It is important to use
normal ESD handling precautions for ESD sensitive devices.
These precautions include using grounded wrist straps,
work benches, and floor mats in ESD controlled areas, etc.
The second case to consider is static discharges to the
exterior of the equipment chassis containing the transceiver
parts. To the extent that the duplex SC connector receptacle
is exposed to the outside of the equipment chassis, it may
be subject to whatever ESD system level test criteria that
the equipment is intended to meet.
7
Electromagnetic Interference (EMI)
Most equipment designs utilizing these high-speed
transceivers from Avago Technolgies will be required to
meet the requirements of FCC in the United States, CENELEC
EN55022 (CISPR 22) in Europe and VCCI in Japan.
The HFBR/HFCT-5208M EMI has been characterized with a
chassis enclosure to demonstrate the robustness of the
parts. Performance of a system containing these
transceivers will vary depending on the individual chassis
design.
Immunity
Equipment utilizing these HFBR/HFCT-5208M transceivers
will be subject to radio-frequency electromagnetic fields in
some environments. These transceivers, with their integral
shields, have been characterized without the benefit of a
normal equipment chassis enclosure and the results are
reported below. Performance of a system containing these
transceivers within a well- designed chassis is expected to
be better than the results of these tests without a chassis
enclosure.
Eye Safety
The HFCT-5208M transceiver is classified as AEL Class I (U.S.
21 CFR(J) and AEL Class 1 per EN 60825-1 (+A11). It is eye
safe when used within the data sheet limits per CDRH. It is
also eye safe under normal operating conditions and under
all reasonably foreseeable single fault conditions per
EN60825-1. Avago Technolgies has tested the transceiver
design for compliance with the requirements listed below
under normal operating conditions and under single fault
conditions where applicable. TUV Rheinland has granted
certification to this transceiver for laser eye safety and use
in EN 60950 and EN 60825-2 applications.
Regulatory Compliance - Targeted Specifications
Feature
Test Method
Electrostatic Discharge (ESD) MIL-STD-883C
Method 3015.4
Machine Model
JEDEC
JESD22-A115-A
RAD
IEC-61000-4-2
Electromagnetic Interference FCC Class B
(EMI)
CENELEC EN55022
Class B (CISPR 22B)
VCCI Class 2
Immunity
Variation of IEC 801-3
QFBR-5322
Performance
Min 2000 V
Min 100 V
Products of this design typically withstand 25 kV without damage.
Margins are dependant on customer board and chassis design.
Typically show no measurable effect from a 10 V/m field swept from 26
to 1000 MHz applied to the transceiver when mounted to a circuit card
without a chassis enclosure.
Transmitter is
Device is
The HFBR-5208M LED and the HFCT-5208M Laser transmitters are classified as IEC 825-1 Accessible Emission
Limit (AEL) Class 1. AEL Class 1 LED/Laser devices are considered eye safe.
8
1 = VEER
2 = RD
N/C
3 = RD
4 = SD
5 = VCCR
TOP VIEW
6 = VCCT
N/C = NO INTERNAL CONNECTION
(MOUNTING POSTS) - CONNECT
TO CHASSIS GROUND OR LEAVE
FLOATING, DO NOT CONNECT TO
SIGNAL GROUND.
7 = TD
8 = TD
N/C
9 = VEET
Table 1. Pinout Table
Pin
Symbol
Functional Description
Mounting Studs
The mounting studs are provided for transceiver mechanical attachment to the circuit boards, they are
embedded in the metalized plastic housing and are not connected to the transceiver internal circuit. They
should be soldered into plated-through holes on the printed circuit board and not connected to signal
ground.
1
VEER
Receiver Signal Ground
Directly connect this pin to receiver signal ground plane. Receiver VEER and transmitter VEET can connect to a
common circuit board ground plane.
2
RD+
Receiver Data Out
Terminate this high-speed, differential, PECL output with standard PECL techniques at the follow-on device
input pin.
3
RD-
Receiver Data Out Bar
Terminate this high-speed, differential, PECL output with standard PECL techniques at the follow-on device
input pin.
4
SD
Signal Detect
Normal input optical signal levels to the receiver result in a logic "1" output (VOH).
Low input optical signal levels to the receiver result in a fault condition indication shown by a logic "0"
output (VOL).
If Signal Detect output is not used, leave it open-circuited.
This Signal Detect output can be used to drive a PECL input on an upstream circuit, such as, Signal Detect
input or Loss of Signal-bar.
5
VCCR
Receiver Power Supply
Provide +5 V dc via the recommended receiver VCCR power supply filter circuit.
Locate the power supply filter circuit as close as possible to the VCCR pin.
6
VCCT
Transmitter Power Supply
Provide +5 V dc via the recommended transmitter VCCT power supply filter circuit.
Locate the power supply filter circuit as close as possible to the VCCT pin.
7
TD-
Transmitter Data In Bar
Terminate this high-speed, differential, Transmitter Data input with standard PECL techniques at the
transmitter input pin.
8
TD+
Transmitter Data In
Terminate this high-speed, differential, Transmitter Data input with standard PECL techniques at the
transmitter input pin.
9
VEET
Transmitter Signal Ground
Directly connect this pin to the transmitter signal ground plane. Transmitter VEET and receiver VEER can
connect to a common circuit board ground plane.
9
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each
parameter in isolation, all other parameters having values within the recommended operating conditions. It should not be
assumed that limiting values of more than one parameter can be applied to the product at the same time. Exposure to the
absolute maximum ratings for extended periods can adversely affect device reliability.
Parameter
Storage Temperature
Lead Soldering Temperature - HFBR-5208M
Lead Soldering Time
Supply Voltage
Data Input Voltage
Transmitter Differential Input Voltage
Symbol
TS
TSOLD
tSOLD
VCC
VI
VD
Minimum
-40
Output Current
Relative Humidity
ID
RH
0
Symbol
TA
Minimum
0
Typical
-0.5
-0.5
Maximum
+85
+260
10
6.0
VCC
1.6
Unit
°C
°C
sec.
V
V
V
Notes
50
95
mA
%
Maximum
+70
Unit
°C
Notes
2
1
Recommended Operating Conditions
Parameter
Ambient Operating Temperature
QFBR-5322
Ambient Operating Temperature
QFBR-5322
Supply Voltage
Power Supply Rejection
Transmitter Data Input Voltage - Low
Transmitter Data Input Voltage - High
Transmitter Differential Input Voltage
Typical
TA
-40
+85
°C
2
VCC
PSR
VIL-VCC
VIH-VCC
VD
4.75
5.25
V
mV p-p
V
V
V
3
4
4
Data Output Load
Signal Detect Output Load
RDL
RSDL
W
W
5
5
100
-1.810
-1.165
0.3
-1.475
-0.880
1.6
50
50
Notes:
1. This is the maximum voltage that can be applied across the Differential Transmitter Data Inputs without damaging the ESD protection
circuit.
2. 2 ms-1 air flow required (for HFCT-5208xxM only).
3. Tested with a 100 mV p-p sinusoidal signal in the frequency range from 500 Hz to 1 MHz imposed on the VCC supply with the
recommended power supply filter in place, see Figure 4. Typically less than a 0.5 dB change in sensitivity is experienced.
4. Compatible with 10K, 10KH and 100K ECL and PECL output signals.
5. The outputs are terminated to VCC - 2 V.
10
HFBR-5208M Family, 1300 nm LED
Transmitter Electrical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Supply Current
Power Dissipation
Data Input Current - Low
Data Input Current -High
Symbol
I CCT
PDIST
I IL
I IH
Minimum
Typical
155
0.75
Maximum
200
1.05
-350
350
Unit
mA
W
µA
µA
Notes
1
Receiver Electrical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Supply Current
Power Dissipation
Data Output Voltage - Low
Data Output Voltage - High
Data Output Rise Time
Data Output Fall Time
Signal Detect Output Voltage - Low
Signal Detect Output Voltage - High
Signal Detect Assert Reaction Time
(Off to On)
Signal Detect Deassert Reaction Time
(On to Off)
Symbol
ICCR
PDISR
VOL - VCC
VOH - VCC
tR
tF
VOL - VCC
VOH - VCC
tSDA
tSDD
Minimum
-1.950
-1.045
0.2
0.2
-1.950
-1.045
Typical
112
0.37
-1.82
-0.94
0.3
0.3
-1.82
-0.94
35
Maximum
177
0.77
-1.620
-0.740
0.51
0.51
-1.620
-0.740
100
Unit
mA
W
V
V
ns
ns
V
V
µs
Notes
2
3
3
4
4
3
3
5
60
350
µs
6
Notes:
1. The ICC value is held nearly constant to minimize unwanted electrical noise from being generated and conducted or emitted to
neighboring circuitry.
2. Power dissipation value is the power dissipated in the receiver itself. It is calculated as the sum of the products of VCC and ICC minus the
sum of the products of the output voltages and load currents.
3. These outputs are compatible with 10K, 10KH and 100K ECL and PECL inputs.
4. These are 20% - 80% values.
5. The Signal Detect output will change from logic “VOL” to “VOH” within 100 µs of a step transition in input optical power from no light to -26
dBm.
6. The Signal Detect output will change from logic “VOH” to “VOL” within 350 µs of a step transition in input optical power from -26 dBm to no
light.
11
HFBR-5208M Family, 1300 nm LED
Transmitter Optical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Output Optical Power
62.5/125 µm. NA = 0.275 fiber
Output Optical Power
50/125 µm. NA = 0.20 fiber
Output Optical Power at Logic "0" State
Optical Extinction Ratio
Center Wavelength
Spectral Width - FWHM
Optical Rise Time
Optical Fall Time
Overshoot
Systematic Jitter Contributed by the Transmitter
Random Jitter Contributed by the Transmitter
Symbol
PO (BOL)
PO (EOL)
PO (BOL)
PO (EOL)
PO ("0")
ER
lc
s
tR
tF
SJ
RJ
Minimum
-19.5
-20
10
1270
Typical
-17
-21.5
-22
-60
46
1330
136
0.7
0.9
0
0.04
0.0
Maximum
-14
-14
-14
-14
1380
200
1.25
1.25
25
0.23
0.10
Unit
dBm avg.
Notes
dBm avg.
7
dBm avg.
dB
nm
nm
ns
ns
%
ns p-p
ns p-p
8
9
9
Notes:
7. The Output Optical Power is measured with the following conditions:
• 1 meter of fiber with cladding modes removed.
• The input electrical signal is a 12.5 MHz square wave.
• The Beginning of Life (BOL) to End of Life (EOL) degradation is less than 0.5 dB.
8. The relationship between FWHM and RMS values for spectral width can be derived from the assumption of a Gaussian-shaped spectrum
which results in RMS = FWHM/2.35.
9. These are 10-90% values.
12
HFBR-5208M Family, 1300 nm LED
Receiver Optical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Minimum Input Optical Power at window edge
Symbol
Minimum
PIN MIN (W)
Typical
-29.0
Minimum Input Optical Power at eye center
PIN MIN (C)
-30.5
Input Optical Power Maximum
Input Operating Wavelength
Systematic Jitter Contributed by the Receiver
Random Jitter Contributed by the Receiver
Signal Detect - Asserted
Signal Detect - Deasserted
Signal Detect - Hysteresis
PIN MAX
l
SJ
RJ
PA
PD
PA - PD
-14
1270
PD +1.0 dB
-45
1.0
Maximum
-26
dBm avg.
-11
0.1
0.25
-30.5
-33.7
3.2
Unit
dBm avg.
1380
0.30
0.48
-28
5
dBm avg.
nm
ns p-p
ns p-p
dBm avg.
dBm avg.
dB
Notes
10
Fig 2
10
Fig 2,3
10
Notes:
10. This specification is intended to indicate the performance of the receiver section of the transceiver when the input power ranges from
the minimum level (with a window time-width) to the maximum level. Over this range the receiver is guaranteed to provide output data
with aBit Error Ratio (BER) better than or equal to 1 x 10-10
• At the Beginning of Life (BOL)
• Over the specified operating temperature and voltage ranges
• Input is at 622.08 Mbd, 223-1 PRBS data pattern with 72 “1”s and 72 “0”s inserted per the CCITT (now ITU-T) recommendation G.958
Appendix 1.
• Receiver worst-case output data eye-opening (window time-width) is measured by applying worst-case input systematic (SJ) and
randomjitter (RJ). The worst-case maximum input SJ = 0.5 ns peak-to-peak and the RJ = 0.15 ns peak-to-peak per ANSI T1.646a standard.
Since the input (transmitter) random jitter contribution is very small and difficult to produce exactly, only the maximum systematic jitter
is produced and used for testing the receiver. The corresponding receiver test window time-width must meet the requirement of 0.31 ns
or larger. This worst-case test window time-width results from the following jitter equation:
Minimum Test Window Time-Width = Baud Interval - Tx SJ max. - Rx SJ max. - Rx RJ max.
Respectively, Minimum Test Window Time-Width = 1.608 ns - 0.50 ns - 0.30 ns - 0.48 ns = 0.328 ns.
This is a test method that is within practical test error of the worst-case 0.31 ns limit.
• Input optical rise and fall times (10% - 90%) are 0.7 ns and 0.9 ns respectively.
• Transmitter operating with a 622.08 MBd, 311.04 MHz square wave input signal to simulate any cross talk present between the
transmitter and receiver sections of the transceiver.
13
HFCT-5208M Family, 1300 nm FP Laser
Transmitter Electrical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Supply Current
Power Dissipation
Data Input Current - Low
Data Input Current -High
Symbol
I CCT
PDIST
I IL
I IH
Minimum
Typical
47
0.235
Maximum
140
0.75
-350
350
Unit
mA
W
µA
µA
Notes
1
Receiver Electrical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Supply Current
Power Dissipation
Data Output Voltage - Low
Data Output Voltage - High
Data Output Rise Time
Data Output Fall Time
Signal Detect Output Voltage - Low
Signal Detect Output Voltage - High
Signal Detect Assert Reaction Time
(Off to On)
Signal Detect Deassert Reaction Time
(On to Off)
Symbol
I CCR
PDISR
VOL - VCC
VOH - VCC
tR
tF
VOL - VCC
VOH - VCC
tSDA
tSDD
Minimum
Typical
130
0.65
Notes
1, 2
25
-1.620
-0.740
100
Unit
mA
W
V
V
ns
ns
V
V
µs
80
100
µs
6
-1.950
-1.045
Maximum
150
0.787
-1.620
-0.740
0.5
0.5
-1.950
-1.045
3
3
4
4
3
3
5
Notes:
1. The power supply current varies with temperature. Maximum current is specified at VCC = Maximum @ maximum temperature
(not including termination currents) and end of life.
2. The current excludes the output load current.
3. These outputs are compatible with 10K, 10KH and 100K ECL and PECL inputs.
4. These are 20% - 80% values.
5. The Signal Detect output will change from logic “VOL” to “VOH” within 100 µs of a step transition in input optical power from no light to -28
dBm.
6. The Signal Detect output will change from logic “VOH” to “VOL” within 100 µs of a step transition in input optical power from -28 dBM to no
light.
14
HFCT-5208M Family, 1300 nm FP Laser
Transmitter Optical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Output Optical Power
Optical Extinction Ratio
Center Wavelength
Spectral Width - (RMS)
Output Optical Eye Opening
Symbol
Minimum
Typical Maximum
-15
-11
-8
PO
ER
8.2
13.8
lc
1274
1313
1356
s
1.1
2.5
Compliant with Bellcore TR-NWT-000253 and ITU-T
G.957.
Unit
Notes
dBm avg. 7
dB
nm
nm
recommendation
Receiver Optical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V)
(TA = -40°C to +85°C, VCC = 4.75 to 5.25 V. Typical @+25°C, 5 V for A specification part)
Parameter
Minimum Input Optical Power
Maximum Input Optical Power
Signal Detect - Asserted
Signal Detect - Hysteresis
Symbol
PIN MIN
PIN MAX
PA
PA - PD
Minimum
-7
-42
0.5
Typical
-32
Maximum
-28
-39
1.2
-31
4.0
Unit
dBm
dBm
dBm
dB
Notes
8
8
9,10
Notes:
7. The output power is coupled into a 1 m single-mode fiber. Minimum output optical level is at end of life.
8. Minimum sensitivity and saturation levels for 223-1 PRBS with 72 ones and 72 zeros inserted. (ITU-T recommendation G.958).
Sensitivity is measured for a BER of 10-10 at center of Baud interval with the transmitter powered up to test for crosstalk between the
transmitter and receiver sections of the transceiver.
9. The Bit Error Rate (BER) measurements are not performed but a high to low transition in SD typically occurs at a receiver BER of 10-6 or
worse.
10. For HFCT-5208Axx (extended temperature) Signal Detect - Hysteresis: 0.3 dB minimum.
15
TX
KEY:
YYWW = DATE CODE
FOR MULTIMODE MODULES:
XXXX-XXXX = HFBR-5208EM
ZZZZ = 1300 nm
FOR SINGLEMODE MODULES:
XXXX-XXXX = HFCT-5208EM
ZZZZ = 1300 nm
XXXX-XXXX
ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
RX
29.6
(1.16) UNCOMPRESSED
39.6
MAX.
(1.56)
12.7
(0.50)
AREA
RESERVED
FOR
PROCESS
PLUG
25.4 MAX.
(1.00)
18.1
(0.711)
20.5
(0.805)
(
+0.1
0.25 -0.05
+0.004
0.010 -0.002
4.7
(0.185)
2.0 ± 0.1
SLOT WIDTH (0.079 ± 0.004)
3.3
(0.13)
10.2
MAX.
(0.40)
)
12.7
(0.50)
2.09 UNCOMPRESSED
(0.08)
9.8 MAX.
(0.386)
3.3 ± 0.38
(0.130 ± 0.015)
+0.25
0.46 -0.05
9X Ø
+0.010
0.018 -0.002
(
23.8
(0.937)
20.32
(0.800)
2X Ø
20.32
(0.800)
15.8 ± 0.15
(0.622 ± 0.006)
+0.25
1.27 -0.05
2X Ø
+0.010
0.050 -0.002
)
(
8X 2.54
(0.100)
1.3
(0.051)
20.32
(0.800)
14.5
(0.57)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: X.XX ±0.025 mm
UNLESS OTHERWISE SPECIFIED.
X.X
±0.05 mm
Figure 8. Package Outline for HFBR/HFCT-5208EM
16
1.3
(0.05)
5.9
(0.23)
13.6
(0.54)
Masked insulator material (no metalization)
)
0.8
2X (0.032)
0.8
2X (0.032)
+0.5
-0.25
+0.02
0.43
-0.01
10.9
)
9.4
(0.37)
PCB BOTTOM VIEW
6.35
(0.25)
MODULE
PROTRUSION
27.4 ± 0.50
(1.08 ± 0.02)
3.5
(0.14)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: X.XX ±0.025 mm
UNLESS OTHERWISE SPECIFIED.
X.X ±0.05 mm
Figure 9. Suggested Module Positioning and Panel Cut-out for HFBR/HFCT-5208EM
17
)
TX
XXXX-XXXX
ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
RX
KEY:
YYWW = DATE CODE
FOR MULTIMODE MODULES:
XXXX-XXXX = HFBR-5208FM
ZZZZ = 1300 nm
FOR SINGLEMODE MODULES:
XXXX-XXXX = HFCT-5208FM
ZZZZ = 1300 nm
39.6
MAX.
(1.56)
1.01
(0.04)
(
4.7
(0.185)
AREA
RESERVED
FOR
PROCESS
PLUG
25.4 MAX.
(1.00)
+0.1
0.25 -0.05
+0.004
0.010 -0.002
12.7
(0.50)
25.8
MAX.
(1.02)
)
SLOT DEPTH
10.2
MAX.
(0.40)
3.3 ± 0.38
(0.130 ± 0.015)
22.0
(0.87)
+0.25
0.46 -0.05
9X Ø
+0.010
0.018 -0.002
23.8
(0.937)
20.32
(0.800)
2X Ø
20.32
(0.800)
15.8 ± 0.15
(0.622 ± 0.006)
+0.25
1.27 -0.05
2X Ø
+0.010
0.050 -0.002
)
(
AREA
RESERVED
FOR
PROCESS
PLUG
8X 2.54
(0.100)
1.3
(0.051)
20.32
(0.800)
14.5
(0.57)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: X.XX ±0.025 mm
UNLESS OTHERWISE SPECIFIED.
X.X ±0.05 mm
Figure 10. Package Outline for HFBR/HFCT-5208FM
18
2.2
(0.09)
SLOT WIDTH 2.0 ± 0.1
(0.079 ± 0.004)
14.4
(0.57)
9.8 MAX.
(0.386)
(
12.7
(0.50)
29.7
(1.17)
Masked insulator material (no metalization)
)
1.98
(0.078)
DIMENSION SHOWN FOR MOUNTING MODULE
FLUSH TO PANEL. THICKER PANEL WILL
RECESS MODULE. THINNER PANEL WILL
PROTRUDE MODULE.
1.27 SEPTUM
(0.05)
30.2
(1.19)
0.36
(0.014)
10.82
(0.426)
13.82
(0.544)
BOTTOM SIDE OF PCB
1.82
(0.072)
12.0
(0.47)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: X.XX ±0.025 mm
UNLESS OTHERWISE SPECIFIED.
X.X
±0.05 mm
Figure 11. Suggested Module Positioning and Panel Cut-out for HFBR/HFCT-5208FM
19
KEEP OUT ZONE
26.4
(1.04)
14.73
(0.58)
Ordering Information
1300 nm LED (temperature range 0°C to +70°C)
HFBR-5208M
HFBR-5208EM
HFBR-5208FM
No shield, metallized housing.
Extended/protruding shield, metallized housing.
Flush shield, metallized housing.
1300 nm LED (temperature range -40°C to +85°C)
HFBR-5208AM
HFBR-5208AEM
HFBR-5208AFM
No shield, metallized housing.
Extended/protruding shield, metallized housing.
Flush shield, metallized housing.
1300 nm FP Laser (temperature range 0°C to +70°C)
HFCT-5208M
HFCT-5208EM
HFCT-5208FM
No shield, metallized housing.
Extended/protruding shield, metallized housing.
Flush shield, metallized housing.
1300 nm FP Laser (temperature range -40°C to +85°C)
HFCT-5208AM
HFCT-5208AEM
HFCT-5208AFM
No shield, metallized housing.
Extended/protruding shield, metallized housing.
Flush shield, metallized housing.
Supporting Documentation
HFBR-5208M/HFCT-5208M
HFBR-5208xx/HFCT-5208xx (0°C to +70°C)
HFBR-5208Axx (-40°C to +85°C)
HFCT-5208Axx (-40°C to +85°C)
HFCT-5208M/HFCT-5218M
HFBR-5208M
HFBR-5208M/HFCT-5208M/HFCT-5218M
Application Note
Characterization Report
Characterization Report
Characterization Report
Qualification Report
Qualification Report
Reference Design Application Note 1178
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes 5988-2479EN
5988-2916EN - December 5, 2006