NCP374
Overvoltage Up to +30 V
and Down to -30 V with
Load Switch Function
NCP374 is an over−voltage and over−current protection device.
From IN to VBUS , the part acts as a load switch protection, with
programmable current regulation. The current protection is externally
adjustable.
Additional voltage protection is available, from VBUS to IN. Due to
built−IN low RDS(on) NMOS fet, the host system is protected against
positive and negative voltage up to +28 V and down to −28 V.
The both embedded over−current and over−voltage protection
allows sustaining extreme conditions from short circuit on USB
connector, or defective WA or USB port.
Due to the NCP374 using internal NMOS, the system cost and the
PCB area of the application board are minimized.
NCP374 provides a negative going flag (FLAG) output, which
alerts the system that a fault has occurred.
Features
•
•
•
•
•
•
•
•
•
•
•
Adjustable Over−Current
Over−voltage Protection Up to 28 V and Down to −28 V
Logic Pins EN and DIR
Thermal Shutdown
On−Chip Low RDS(on) NMOS Transistors
Over−Voltage Lockout (OVLO)
Soft Start.
Real Shutdown Mode
Alert FLAG Output.
12 Leads LLGA 4 x 4 mm Package
This is a Pb−Free Device
May, 2012 − Rev. 0
XXXXXX
XXXXXX
ALYWG
G
1
TLLGA12
CASE 513AP
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
VBUS
1
12
NC
VBUS
2
11
IN
GND
3
10
FLAG
RES1
4
RES2
RES3
NCP374
9
DIR
5
8
EN
6
7
Ilim
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 10 of this data sheet.
USB Ports
Tablets
Set Top Box
Cell Phones
© Semiconductor Components Industries, LLC, 2012
MARKING
DIAGRAM
(Top View)
Typical Applications
•
•
•
•
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1
Publication Order Number:
NCP374/D
NCP374
POWER SUPPLY
IN
NCP374
4.7 mF
1 mF
VBUS
VBUS
GND
RES
RES
RES
IN
FLAG
DIR
EN
Ilim
1 mF
LDO 3.3 V
1
IN
OUT
3
2
STATUS
EN
VCC
GND
USB HOST CONTROLLER
SYS
SYSTEM
12
11
5
CRTL[x:0] VBUS(sense) 2
DATA[x:0]
D+ 3
D− 4
GND
VBUS
D+
D−
GND
USB PORT
10
10
USB PORT
CRTL_OUT[x:0]
DATA_OUT[x:0]
VCC
CRTL_IN[x:0]
DATA_IN[x:0]
GND
12
VBUS(sense) CRTL[x:0]
D+
DATA[x:0] 11
D−
GND
GND
5
2
3
4
GND
VBUS
D+
D−
GND
USB TRANSCEIVER
USB TRANSCEIVER
VCC
1
120 mF
Downstream USB Port
Upstream USB Port
Figure 1. Typical Host Application Circuit
D+
D−
D+
PHY (Transceiver)
Ctr
D−
LDO
Vbus
VBUS
D+
D−
GND
NCP374
Wall Adapter
USB PORT
VBUS
D+
D−
GND
1 mF1
VBUS
IN
VBUS
GND FLAG
RES DIR
RES
EN
RES
Ilim
10k
CCCV CHARGER
/FLAG
/DIR
/EN
Wall Adapter
LI+BATTERY
/FLAG
4.7 mF1
Rlimit1
/DIR
/REV
Ctr
GND
Figure 2. Typical Portable Application Circuit
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2
SYSTEM
NCP374
FUNCTIONAL BLOCK DIAGRAM
Exposed pad − Pad 1
IN − Pin 11
VBUS − Pin 1 and 2
Gate 2 Driver: Negative
voltage and reverse
current protection
Gate 1 Driver: Positive
voltage
OCP block
ILIM − Pin 7
UVLO
OVLO
Core
negative
voltage
protection
LDO
VREF
Charge
Pump
RES1 − Pin 4
5.5 V
Control
logic and
Timer
EN block
Trim
RES2 − Pin 5
RES3 − Pin 6
Thermal
Shutdown
/EN − Pin 8
/DIR − Pin 9
Not Connected − Pin 10
GND − Pin 3
FLAG − Pin 10
Figure 3. Functional Block Diagram
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3
NCP374
PIN FUNCTION DESCRIPTION
Pin
Pin
Name
Type
1, 2
VBUS
POWER
VBUS voltage pins: must be hardwired together on the PCB.
These pins are connected to the VBUS connector, and are protected against positive and negative
overvoltage events.
A 1 mF low ESR ceramic capacitor, or larger, must be connected between these pins and GND.
3
GND
POWER
Ground
4
RES1
INPUT
Reserved pin. Must be connected to GND potential and used for IC test.
5
RES2
INPUT
Reserved pin. Must be connected to GND potential and used for IC test.
6
RES3
INPUT
Reserved pin. Must be connected to GND potential and used for IC test.
7
Ilim
OUTPUT
Current Limit Pin. This pin provides the reference, based on the internal band−gap voltage reference,
to limit the over current, across internal NMosFet. A 0.1% tolerance resistor shall be used to get the
highest accuracy of the Over Current Limit.
8
EN
INPUT
Enable Pin. In combination with DIR, the internal NMOSes are turned on if Battery is applied on the
IN pins. (See logic table)
In enable mode, the internal Over−Current protection is activated from IN to VBUS. When enable
mode is disabled, the NCP374 current consumption, into IN pin, is drastically decreased to limit current leakage of the self powered devices.
9
DIR
INPUT
Direct Mode pin. This pin can be used, in combination with Enable pin, for the front end protection
applications like wireless devices. In this case, the part can be used as +/− OVP only. See logic
table.
10
FLAG
OUTPUT
Fault indication pin.
This pin allows an external system to detect fault condition.
The FLAG pin goes low when input voltage exceeds OVLO threshold or drops below UVLO
threshold (charging mode), charge current from IN to VBus exceeds current limit or internal temperature exceeds thermal shutdown limit.
Since the FLAG pin is open drain functionality, an external pull up resistor to VBat must be added
(10 kW minimum value).
11
IN
POWER
IN pin. In Front end application this pin is connected to charger device input or PMIC input.
In host application, this pin is connected to upstream DCDC. This pin is used as power supply of the
core and current from IN to VBUS is then limited to the external
12
NC
NA
13
PAD1
POWER
Description
Not internally connected. Can be connected to any potential.
Drain connection of the back to back MOSFET’s. This exposed pad mustn’t be connected to any
other potential and must be used for thermal dissipation of the internal MOSFETs.
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4
NCP374
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VminVBUS
−30
V
Vmin
−0.3
V
VmaxVBUS
30
V
VmaxIN
10
V
Vmax
7
V
2
900
A
mA
RqJA
80
°C/W
Operating Ambient Temperature Range
TA
−40 to +85
°C
Storage Temperature Range
Tstg
−65 to +150
°C
TJ
150
°C
MSL
Level 1
Minimum Voltage (VBus to GND)
Minimum Voltage (All others to GND)
Maximum Voltage (Vbus to GND)
Maximum Voltage (IN to GND)
Maximum Voltage (All others to GND)
Maximum DC current
NCP374MU075TXG
Charge Mode
Vbus Mode
I in
Thermal Resistance, Junction to Air, (Note 1)
Junction Operating temperature
Moisture Sensitivity
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The RqJA is highly dependent on the PCB heat sink area (connected to PAD1). See PCB recommendation paragraph.
ELECTRICAL CHARACTERISTICS Min / Max limits values (−40°C < TA < +85°C) and IN = +5 V (Unless otherwise noted). Typical
values are TA = +25°C
Characteristics
Symbols
Input Voltage Range
Vin
Vbus Voltage Range
Vvbus
Conditions
Min
Typ
2.5
All modes
Max
Unit
5.5
V
28
V
−28
V
All modes
IN = 5 V
−23
V
Under Voltage Lockout Threshold
UVLO
Vbus falls down UVLO threshold
Disable, Charge mode and Enhance
Modes
2.6
2.7
2.8
V
Under Voltage Lockout Hysteresis
UVLOhyst
Vbus rises up UVLO threshold +
UVLOhyst
45
60
75
mV
OVLO
Vbus rises up OVLO threshold
5.6
5.77
5.9
V
45
65
90
mV
Over voltage Lockout threshold
Over Voltage Lockout Hysteresis
OVLOhyst
Vbus falls down to OVLO −
OVLOhyst
Vbus versus IN Resistance
IN versus Vbus Resistance
RDson
Vbus = 5 V, or IN = 5 V
NCP374MU075TXG
25°C
85°C
Quiescent Current
IddIN
Standby Current
Current limit
NOTE:
mW
90
140
155
No load. Vbus mode, Vin = 5 V
200
315
mA
IddSTD
No load, IN = 5 V. Standby mode,
No Vbus
0.02
1
mA
IOCP
IN = 5 V, Load on Vbus,
Vbus mode
RILIM = 0 W
NCP374MU075TXG
Electrical parameters are guaranteed by correlation across the full range of temperature.
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5
mA
600
750
900
NCP374
ELECTRICAL CHARACTERISTICS Min / Max limits values (−40°C < TA < +85°C) and IN = +5 V (Unless otherwise noted). Typical
values are TA = +25°C
Characteristics
FLAG Output Low Voltage
FLAG Leakage Current
Symbols
Conditions
Volflag
Fault mode
Sink 1 mA on FLAG pin
FLAGleak
FLAG level = 5.5 V
DIR Voltage High
Vih
DIR Voltage Low
Vol
DIR Leakage Current
Vih
EN Voltage Low
Vol
EN Leakage Current
Thermal Shutdown temperature
Thermal Shutdown Hysteresis
Typ
Max
Unit
400
mV
1
nA
1.2
V
0.4
DIRleak
EN Voltage High
Min
DIR = 5.5 V
300
nA
1.2
V
0.4
ENleak
EN = 5.5 V
V
V
300
nA
TSD
150
°C
TSDHYST
30
°C
TIMINGS
Vbus Mode
TonVbus
IN >= 2.5 V, from EN = 1.2 to 0.4 to
Vbus >= 0.3 V
Vbus Mode
0.6
1.2
1.8
ms
Tstartvbus
From IN >= 0.3 V FLAG = 1.2 V,
Vbus Mode
0.6
1.2
1.8
ms
Rearming Delay
tRRD
IN > .2.5 V, Rin = 1 W Vbus Mode,
after fault
15
30
45
ms
Over Current Regulation Time
treg
IN > 2.6, Vbus > 0.3 V Vbus Mode
0.5
1.2
1.8
ms
OCP delay time
tOCP
From I Vbus > Ilim, 1 A/1 ms
5
ms
TVbusDIS
From EN = 0.4 V to 1.2 V, to Vbus <
0.3 V. IN = 5 V
165
ms
toff
From IN > OVLO toVbus ≤ 0.3 V
Vin increasing from 5V to 8V at
3 V/ms
1.5
5
ms
ton
From Vbus>UVLO to IN=0.3V ,
charging mode
15
30
45
ms
tstart
From IN > 0.3 V to FLAG = 1.2 V
15
30
45
ms
toff
From Vbus > OVLO to IN ≤ 0.3 V
Vin increasing from 5 V to 8 V at
3 V/ms
1.5
5
ms
tstop
From Vbus > OVLO to FLAG ≤ 0.4 V
See Figures 3 and 9
Vin increasing from 5 V to 8 V at
3 V/ms
1.5
ms
tdis
EN = 1.2 V, From DIR = 0.4 to 1.2 V
to IN ≤ 0.3 V
2.5
ms
Start Up Delay
FLAG going up Delay
Vbus Disable time
Turn off delay
Charging Mode
Start Up Delay
FLAG going up Delay
Turn off delay
Alert delay
Disable time
NOTE:
Electrical parameters are guaranteed by correlation across the full range of temperature.
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6
NCP374
TYPICAL OPERATING CHARACTERISTICS
Operation
Over−Current Protection (OCP)
The NCP374 acts as an over−voltage in charge mode,
when wall adapter or Vbus cable is connected to Vbus pin
of the device. The downstream system (transceiver, CCCV
charger..) are protected up to +30 V if charging voltage
exceeds OVLO threshold (5.77 V). Due to a back to back
architecture, the Vbus pin is also protected against reverse
polarity connection, coming from wrong USB cables. This
negative protection acts down to −30 V.
In disable mode (EN = 1, DIR = 1), there is no current
consumption on IN pin and MSOFETs are turned off (Vbus
cable disconnected)
The NCP374 provides over−current from IN to Vbus by
selecting Vbus mode.
To active Vbus mode (USB port on), the EN pin must be
tied low. In this case, MOSFET are turned on and current is
measure in the branch. If the sinking current on the Vbus pin
is above the programmed current on Ilim pin (can be
programmed up to TBD), the Vbus current is regulated
around Iocp during treg time. If the overload is present at the
end of this timer, the Mosfet are turned off and automatic
rearming cycle is activated. With Treg/Trrd cycle until
overload is present.
This device integrates over current protection function,
from IN to Vbus port.
That means the current across the internal NMOS is
regulated when the value, set by external Rlim resistor,
exceeds Ilimit during an internal timer.
An internal resistor is placed in series with the pin
allowing to have a maximum OCP value when I lim pin is
directly connected to GND.
By adding external resistors in series with I lim and GND,
the OCP value is decreased. The Rlim tolerance is important
to keep a good accuracy. So a value between 0.1% and 1%
won’t have an impact on the OCP accuracy. Nevertheless,
the higher Rlim value, the lower Over current protection
accuracy.
Indeed, the current is measured by a voltage comparator
on a serial resistance. If this voltage drop comes very small,
the offset of the internal comparator will have an impact on
the accuracy. So a division by more than three times with
Rlim will degrade drastically the overcurrent accuracy.
The current limit calculation formula for the
NCP374MU075TXG is:
Over−voltage Lockout (OVLO)
During over current event, NMOSes are opened and
FLAG output is tied to low, allowing the mController to take
into account the fault event and then disable reverse charge
path.
Rlim(W) + 22150ńIocp * 29035
To protect the connected system on IN pins, from external
over−voltage coming from USB connector or Wall Adapter,
through Vbus pin , the device has a built−in over−voltage
lock out (OVLO) circuit. During over−voltage condition,
the output remains disabled until the input voltage exceeds
OVLO (Vbus pin).
The OVLO comparator is available in all modes.
Additional OVLO thresholds ranging from OVLO can be
manufactured. Please contact your ON Semiconductor
representative for further information.
FLAG output is tied to low until Vin is higher than OVLO.
This circuit has a built−in hysteresis to provide noise
immunity to transient conditions.
VBus Mode
To access to the Vbus mode, DIR pin must be tied to high
(>1.2) and EN must be tied from high to low (< 0.4 V).
In that case, the core of the NCP374 will be supplied by
the IN, with a 2.5 V minimum voltage and 5.5V maximum
voltage.
In this state, OCP, OVLO and thermal modes are
available.
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7
NCP374
IN
Vbus
ton
tstart
/FLAG
t REG
IREV
Ilim
{}
{}
/EN
t RRD
ID
Over Current in Vbu s
Transciever
/DIR
Figure 4. Over Current Protection sequence
In Vbus Mode, FLAG pin remains available, allowing the
mcontroller to have a status regarding over−voltage
condition, over−current condition or thermal shutdown
condition.
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8
NCP374
Vbus
tON
IN
Battery output
/FLAG
/DIR
/EN
Transciever
Transciever
Downstream Vbu s connection
Figure 5. FLAG Status in Vbus Mode
Logic Inputs
DIR pin disconnects IN pin from Vbus pin. DIR does not
overdrive an OVLO or UVLO fault (FLAG status is still
available).
To enable Charge operation (Charge Mode), the DIR pin
shall be forced to low and EN to high. A high level on the
Table 1. TABLE SELECTION OF CHARGE MODES
Protection
DIR
EN
MODE
OVP @ VBUS (+28 V,
−28 V, OVLO 5.77 V)
OCP (IN to VBUS)
OCP (VBUS to IN)
0
0
NA
NA
NA
NA
0
1
Charge
Yes
NA
NA
1
0
VBUS
Yes
Yes
NA
1
1
Disable
Yes (out off)
NA
NA
Negative Voltage and Reverse Current
The thermal threshold has been set at 150°C. FLAG is then
tied to low to inform the MCU.
As the thermal hysteresis is 30°C, the MOSFET will be
closed as soon the device temperature falls down to 120°C.
If the fault event is still present, the temperature increase
one more time and engages the thermal shutdown one more
time until fault event disappeared.
The device protects the system connected on IN pin from
negative voltage occurring on Vbus pin, down to −28 V.
When a negative voltage occurs, the IN pins are
disconnected from Vbus pins . This negative protection is
available in all modes
Thermal Shutdown Protection
In case of internal overheating, the integrated thermal
shutdown protection allows to open the internal MOSFET
in order to instantaneously decrease the device temperature.
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9
NCP374
PCB Recommendations
In any case, the PAD1 shall be not connected to any other
potential or GND than the isolated extra copper surface.
The under PAD1 of the NCP374 package shall be
connected to an isolated PCB area to increase the heat
transfer if necessary for an application standpoint.
ORDERING INFORMATION
Device
NCP374MU075TXG
Marking
NCP
374
Order
Current Limit
750 mA
Package
Shipping†
LLGA12 4x4 mm
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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NCP374
PACKAGE DIMENSIONS
TLLGA12 4x4, 0.5P
CASE 513AP
ISSUE O
A B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25 MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
E
PIN ONE
REFERENCE
0.10 C
2X
2X
ÇÇ
ÇÇ
0.10 C
DIM
A
A1
b
b1
D
D2
E
E2
e
L
TOP VIEW
0.10 C
RECOMMENDED
SOLDERING FOOTPRINT*
A
0.08 C
NOTE 4
C
A1
SIDE VIEW
MILLIMETERS
MIN
MAX
0.50
0.60
0.00
0.05
0.20
0.30
0.35 REF
4.00 BSC
3.65
3.75
4.00 BSC
2.95
3.05
0.50 BSC
0.25
0.35
SEATING
PLANE
3.80
PACKAGE
OUTLINE
12X
0.49
D2
b1
1
6
3.06
4.30
1
E2
0.40
11X
0.30
0.50
PITCH
DIMENSIONS: MILLIMETERS
12X
L
12
7
12X
e
e/2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
b
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP374/D