NCP362 USB Positive Overvoltage and Overcurrent Protection with TVS for VBUS and Low Capacitance ESD Diodes for Data The NCP362 disconnects systems at its output when wrong VBUS operating conditions are detected at its input. The system is positive overvoltage protected up to +20 V, overcurrent protected up to 750 mA, and receives protection from ESD diodes for the high speed USB data and VBUS lines. Thanks to an integrated PMOS FET, no external device is necessary, reducing the system cost and the PCB area of the application board. The NCP362 is able to instantaneously disconnect the output from the input if the input voltage exceeds the overvoltage threshold OVLO. Thanks to an overcurrent protection, the integrated PMOS turns off when the charge current exceeds the current limit (see options in ordering information). The NCP362 provides a negative going flag (FLAG) output, which alerts the system that voltage, current or overtemperature faults have occurred. In addition, the device integrates ESD diodes for VBUS and data lines which are IEC61000−4−2, level 4 compliant. The ESD diodes for D+ and D− are compatible with high speed USB thanks to an ultra low capacitance of 0.5 pF. Features • • • • • • • • • • • Overvoltage Protection up to 20 V Undervoltage and Overvoltage Lockout (UVLO/OVLO) Overcurrent Protection Transient Voltage Suppressor for VBUS Pin Ultra Low Capacitance ESD for Data Lines Alert FLAG Output and EN Enable Pin Thermal Shutdown Compliance to IEC61000−4−2 (Level 4) Compliance Machine Model and Human Body Model 10 Lead UDFN 2x2.5 mm Package This is a Pb−Free Device MARKING DIAGRAMS XXXM G UDFN10 CASE 517AV XXX M G = Specific Device Code = Date Code = Pb−Free Package PIN CONNECTIONS EN 1 GND 2 IN 3 VBUS TVS 4 GND 5 10 FLAG PAD1 GND PAD2 GND 9 OUT 8 GND 7 NC 6 NC NCP362A Version (VBUS TVS + OVP/OCP) EN 1 GND 2 IN 3 NC 4 GND 5 10 FLAG PAD1 GND PAD2 GND 9 OUT 8 GND 7 D+ 6 D− NCP362B Version (D+/− ESD low cap + OVP/OCP) EN 1 GND 2 Applications • • • • • • http://onsemi.com USB Devices Mobile Phones Peripheral Personal Digital Assistant MP3/MP4 Players TV and Set Top Boxes IN 3 VBUS TVS 4 GND 5 10 FLAG PAD1 GND PAD2 GND 9 OUT 8 GND 7 D+ 6 D− NCP362C Version (VBUS TVS + D+/− ESD low cap + OVP/OCP) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet. Q © Semiconductor Components Industries, LLC, 2010 June, 2010 − Rev. 1 1 Publication Order Number: NCP362/D NCP362 USB Connector Bottom Connector Pin 1 VBUS Pin 2 D+ Pin 3 D− Pin 4 ID Pin 5 GND VIN/VBUS Battery Charger OUT LDO I limit >550 mA VREF System Soft start Driver OVLO Logic UVLO Thermal shutdown FLAG VBUS TVS EN pin GND NCP362A D+ USB Transceiver D− Figure 1. Typical Application Circuit with Wall Adapter / VBUS TVS Protection (NCP362A) USB Connector Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 VBUS D+ D− ID GND VIN/VBUS Battery Charger OUT LDO I limit >550 mA VREF Soft start Driver OVLO Logic UVLO Thermal shutdown FLAG VBUS TVS D+ D− GND EN pin NCP362C D+ D− USB Transceiver Figure 2. Typical Application Circuit with Full Integrated ESD for USB (NCP362C) http://onsemi.com 2 System NCP362 PIN FUNCTION DESCRIPTION Pin No. Name Type Description 1 EN INPUT Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND or to a I/O pin. This pin does not have an impact on the fault detection. 2 GND POWER Ground 3 IN POWER Input Voltage Pin. This pin is connected to the VBUS. A 1 mF low ESR ceramic capacitor, or larger, must be connected between this pin and GND. 4 VBUS TVS INPUT Cathode of the VBUS transient voltage suppressor diode. (NCP362A & NCP362C) This pin is not connected in the NCP362B 5 GND POWER 6 D− INPUT Cathode of the D− ESD diode. (NCP362B & NCP362C) This pin is not connected in the NCP362A 7 D+ INPUT Cathode of the D+ ESD diode. (NCP362B & NCP362C) This pin is not connected in the NCP362A 8 GND POWER Ground 9 OUT OUTPUT Output Voltage Pin. The output is disconnected from the VBUS power supply when the input voltage is above OVLO threshold or below UVLO threshold. A 1 mF capacitor must be connected to this pin. The two OUT pins must be hardwired to common supply. 10 FLAG OUTPUT Fault Indication Pin. This pin allows an external system to detect a fault on VBUS pin. The FLAG pin goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functionality, an external pull up resistor to VCC must be added. PAD1 GND POWER Ground. Must be used for power dissipation. See PCB recommendations. PAD2 GND POWER Anode of the TVS and/or ESD diodes. Must be connected to GND. Ground http://onsemi.com 3 NCP362 MAXIMUM RATINGS Rating Symbol Value Unit Vmin −0.3 V Vmaxin 21 V Maximum Voltage to GND (Pins EN, OUT, FLAG) Vmax 7.0 V Maximum DC Current from Vin to Vout (PMOS) (Note 1) Imax 600 mA Thermal Resistance, Junction−to−Air RqJA 280 °C/W Minimum Voltage to GND (Pins IN, EN, OUT, FLAG) Maximum Voltage to GND (Pin IN) Operating Ambient Temperature Range TA −40 to +85 °C Storage Temperature Range Tstg −65 to +150 °C Junction Operating Temperature TJ 150 °C Human Body Model (HBM) (Note 2) Pins EN, IN, OUT, GND VBUS TVS V 2000 16000 Machine Model (MM) (Note 3) Pins EN, IN, OUT, GND VBUS TVS V 200 400 IEC 61000−4−2 Pin VBUS TVS Contact Air Pins D+ & D− Contact Air Vesd Forward Voltage @ 10 mA Pin VBUS TVS Pins D+ & D− 30 30 kV kV 10 15 kV kV V 1.1 1.0 Moisture Sensitivity MSL Level 1 − Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. With minimum PCB area. By decreasing RqJA, the current capability increases. See PCB recommendation page 9. 2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114. 3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115. http://onsemi.com 4 NCP362 ELECTRICAL CHARACTERISTICS (Min/Max limits values (−40°C < TA < +85°C) and Vin = +5.0 V. Typical values are TA = +25°C, unless otherwise noted.) Characteristic Input Voltage Range Symbol Vin Undervoltage Lockout Threshold UVLO Uvervoltage Lockout Hysteresis UVLOhyst Overvoltage Lockout Threshold OVLO Overvoltage Lockout Hysteresis OVLOhyst Vin versus Vout Dopout Conditions Min Typ 1.2 Vin falls below UVLO threshold Vin rises above OVLO threshold Max Unit 20 V 2.85 3.0 3.15 V 50 70 90 mV 5.43 5.675 5.9 V 50 100 125 mV 150 200 mV 750 950 mA Vdrop Vin = 5 V, I charge = 500 mA Overcurrent Limit Ilim Vin = 5 V Supply Quiescent Current Idd No Load, Vin = 5.25 V 20 35 mA Standby Current Istd Vin = 5 V, EN = 1.2 V 26 37 mA IDSS VDS = 20 V, VGS = 0 V 0.08 Volflag Vin > OVLO Sink 1 mA on FLAG pin Zero Gate Voltage Drain Current FLAG Output Low Voltage FLAG Leakage Current 550 mA 400 5.0 mV FLAGleak FLAG level = 5 V EN Voltage High Vih Vin from 3.3 V to 5.5 V nA EN Voltage Low Vil Vin from 3.3 V to 5.5 V EN Leakage Current ENleak EN = 5.5 V or GND 170 ton From Vin > UVLO to Vout = 0.8xVin, See Fig 3 & 9 4.0 tstart From Vin > UVLO to FLAG = 1.2 V, See Fig 3 & 10 3.0 toff From Vin > OVLO to Vout ≤ 0.3 V, See Fig 4 & 11 Vin increasing from 5 V to 8 V at 3 V/ms. 0.7 Alert Delay tstop From Vin > OVLO to FLAG ≤ 0.4 V, See Fig 4 & 12 Vin increasing from 5 V to 8 V at 3 V/ms 1.0 ms Disable Time tdis From EN 0.4 to 1.2V to Vout ≤ 0.3 V, See Fig 5 & 13 Vin = 4.75 V. 3.0 ms Tsd 150 °C Tsdhyst 30 °C 1.2 V 0.55 V nA TIMINGS Start Up Delay FLAG going up Delay Output Turn Off Time Thermal Shutdown Temperature Thermal Shutdown Hysteresis 15 ms ms 1.5 ms ESD DIODES (TA = 25°C, unless otherwise noted) 4. 5. 6. 7. Capacitance (Note 7) Pin VBUS TVS Pins D+ & D− C Clamping Voltage (Notes 5, 6, 7) Pin VBUS TVS Pins D+ & D− VC Working Peak Reverse Voltage (Note 7) Pin VBUS TVS Pins D+ & D− VRWM pF 30 0.5 0.9 V @ IPP = 5.9 A @ IPP = 1.0 A 23.7 9.8 V 12 5.0 Maximum Reverse Leakage Current IR @ VRWM Breakdown Voltage (Note 4) Pin VBUS TVS Pins D+ & D− VBR @ IT = 1.0 mA 1.0 V 13.5 5.4 VBR is measured with a pulse test current IT at an ambient temperature of 25°C. Surge current waveform per Figure 28 in ESD paragraph. For test procedures see Figures 26 and 27: IEC61000−4−2 spec, diagram of ESD test setup and Application Note AND8307/D. ESD diode parameters are guaranteed by design. http://onsemi.com 5 mA NCP362 ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IF Parameter Symbol Working Peak Reverse Voltage IR VC VBR VRWM Maximum Reverse Leakage Current @ VRWM VBR IT Test Current IF Forward Current VF Forward Voltage @ IF Ppk Peak Power Dissipation C IPP Max. Capacitance @VR = 0 and f = 1 MHz *Additional VC, VRWM and VBR voltage can be available. Please contact your ON Semiconductor representative for availability. Vin ton 0.8 Vin Vout Uni−Directional TVS <OVLO UVLO Vin Vin − RDSon x I Vin − RDS(on) x I OVLO toff Vout 0.3 V tstop tstart FLAG FLAG 1.2 V Figure 3. Start Up Sequence EN tdis Vout Vin − RDS(on) x I 0.4 V Figure 4. Shutdown on Over Voltage Detection 1.2 V EN V IR VF IT Breakdown Voltage @ IT 1.2 V OVLO Vout 0.3 V UVLO tstart FLAG FLAG Figure 5. Disable on EN = 1 Figure 6. FLAG Response with EN = 1 http://onsemi.com 6 NCP362 CONDITIONS IN OUT VIN > OVLO or VIN < UVLO Voltage, Current and Thermal Detection Figure 7. CONDITIONS IN OUT Voltage, Current and Thermal Detection Figure 8. http://onsemi.com 7 UVLO < VIN < OVLO NCP362 TYPICAL OPERATING CHARACTERISTICS Figure 9. Start Up. Vin=Ch1, Vout=Ch2 Figure 10. FLAG Going Up Delay. Vin=Ch1, FL:AG=Ch3 Figure 12. Alert Delay. Vout=Ch1, FLAG=Ch3 Figure 11. Output Turn Off time. Vin=Ch1, Vout=Ch2 Figure 13. Disable Time. EN=Ch4, Vin=Ch1, Vout=Ch2 Figure 14. Thermal Shutdown. Vin=Ch1, Vout=Ch2, FLAG=Ch3 http://onsemi.com 8 NCP362 TYPICAL OPERATING CHARACTERISTICS 450 400 RDS(on) (mW) 350 300 Vin = 3.6 V 250 200 150 Vin = 5 V 100 50 0 −50 0 50 100 150 TEMPERATURE (°C) Figure 16. Output Short Circuit 900 OVERCURRENT THRESHOLD (mA) 180 160 140 120 100 80 25°C 125°C 60 40 −40°C 20 0 1 3 5 7 9 11 13 15 17 19 880 Vin = 3.25 V 860 Vin = 3.6 V 840 820 Vin = 4.2 V 800 Vin = 5 V 780 760 Vin = 5.25 V 740 720 −50 21 0 Vin, INPUT VOLTAGE (V) 50 Figure 18. Overcurrent Protection Threshold vs. Temperature 900 25°C 880 860 840 85°C 820 125°C 800 780 760 0°C −25°C 740 720 −40°C 3 100 TEMPERATURE (°C) Figure 17. Quiescent Current vs. Input Voltage OVERCURRENT THRESHOLD (mA) SUPPLY QUIESCENT CURRENT (mA) Figure 15. RDS(on) vs. Temperature (Load = 500 mA) 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) Figure 19. Overcurrent Protection Threshold vs. Input Voltage http://onsemi.com 9 150 NCP362 Figure 20. VBUS TVS Clamping Voltage Screenshot Positive 8 kV contact per IEC 61000−4−2 Figure 21. VBUS TVS Clamping Voltage Screenshot Negative 8 kV contact per IEC 61000−4−2 Figure 22. D+ & D− Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 23. D+ & D− Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 http://onsemi.com 10 NCP362 Operation is automatically turned off (5 ms) if the charge current exceeds Ilim. NCP362 goes into turn on and turn off mode as long as defect is present. The internal ton delay (4 ms typical) allows limiting thermal dissipation. The Flag pin goes to low level when an overcurrent fault appears. That allows the microcontroller to count defect events and turns off the PMOS with EN pin. NCP362 provides overvoltage protection for positive voltage, up to 20 V. A PMOS FET protects the systems (i.e.: VBUS) connected on the Vout pin, against positive overvoltage. The Output follows the VBUS level until OVLO threshold is overtaken. Undervoltage Lockout (UVLO) To ensure proper operation under any conditions, the device has a built−in undervoltage lock out (UVLO) circuit. During Vin positive going slope, the output remains disconnected from input until Vin voltage is above 3.0 V nominal. The FLAG output is pulled to low as long as Vin does not reach UVLO threshold. This circuit has a 70 mV hysteresis to provide noise immunity to transient condition. Vout Overload Iload Vin (V) 20 V Retrieve normal operation Ilim OVLO UVLO 0 ton Vout Figure 25. Overcurrent Event Example FLAG Output OVLO NCP362 provides a FLAG output, which alerts external systems that a fault has occurred. This pin is tied to low as soon as: 1.2 V < Vin < UVLO, Vin > OVLO, Icharge > Ilimit, TJ > 150°C. When NCP362 recovers normal condition, FLAG is held high. The pin is an open drain output, thus a pull up resistor (typically 1 MW − Minimum 10 kW) must be provided to VCC. FLAG pin is an open drain output. UVLO 0 Figure 24. Output Characteristic vs. Vin Overvoltage Lockout (OVLO) To protect connected systems on Vout pin from overvoltage, the device has a built−in overvoltage lock out (OVLO) circuit. During overvoltage condition, the output remains disabled until the input voltage exceeds 6.0 V. FLAG output is tied to low until Vin is higher than OVLO. This circuit has a 100 mV hysteresis to provide noise immunity to transient conditions. EN Input To enable normal operation, the EN pin shall be forced to low or connected to ground. A high level on the pin disconnects OUT pin from IN pin. EN does not overdrive an OVLO or UVLO fault. Overcurrent Protection (OCP) Internal PMOS FET The NCP362 integrates overcurrent protection to prevent system/battery overload or defect. The current limit threshold is internally set at 750 mA. This value can be changed from 150 mA to 750 mA by a metal tweak, please contact your ON Semiconductor representative for availability. During current fault, the internal PMOS FET The NCP362 includes an internal PMOS FET to protect the systems, connected on OUT pin, from positive overvoltage. Regarding electrical characteristics, the RDS(on), during normal operation, will create low losses on Vout pin, characterized by Vin versus Vout dropout. http://onsemi.com 11 NCP362 IEC61000−4−2 Waveform IEC 61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 26. IEC61000−4−2 Spec ESD Gun Oscilloscope TVS 50 W Cable 50 W Figure 27. Diagram of ESD Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger % OF PEAK PULSE CURRENT 100 PEAK VALUE IRSM @ 8 ms tr 90 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 10 0 0 20 40 t, TIME (ms) 60 Figure 28. 8 X 20 ms Pulse Waveform http://onsemi.com 12 80 NCP362 PCB Recommendations two different example of current capability, depending on PCB area: • With 280°C/W (without PCB area), allowing DC current is 500 mA • With 210°C/W (200 mm2), the charge DC current allows with a 85°C ambient temperature is: I = √(TJ-TA)/(RqJA x RDSON) I = 800 mA In every case, we recommend to make thermal measurement on final application board to make sure of the final Thermal Resistance. The NCP362 integrates a 500 mA rated PMOS FET, and the PCB rules must be respected to properly evacuate the heat out of the silicon. The UDFN PAD1 must be connected to ground plane to increase the heat transfer if necessary from an application standpoint. Of course, in any case, this pad shall be not connected to any other potential. By increasing PCB area, the RqJA of the package can be decreased, allowing higher charge current to fill the battery. Taking into account that internal bondings (wires between package and silicon) can handle up to 1 A (higher than thermal capability), the following calculation shows 310 290 1 oz C.F. 270 qJA (°C/W) 250 2 oz C.F. 1 oz Sim 2 oz Sim 230 210 190 175 150 0 25 50 75 100 125 150 175 200 225 250 275 300 325350 COPPER HEAT SPREADING AREA (mm2) Figure 29. Top View Bottom View Figure 30. Demo Board Layout http://onsemi.com 13 NCP362 TP3 1 Vcc Vcc TP1 TP2 VBUS IN VBUS TVS 1 In VBus STRAP2 /Flag 6 7 HEADER 3 TP5 /EN C2 1μF 10 D− D+ /EN J2 1 2 3 4 5 6 1 GND GND GND GND GND R3 Out NCP362 J4 1 2 3 1 S1 10k USB OUT 2 5 8 11 12 10k 1 HEADER 11 2 C1 1μF 3 4 /FLAG 9 1 1 1 2 3 4 5 6 7 8 9 10 11 R1 10k TP4 U1 1 J5 R2 TP6 ID 1 J3 2 GND Figure 31. Demo Board Schematic Bill of Material Designation Manufacturer R1, R2 Specification 10k - CMS0805 1% C1, C2 Murata − GRM188R61E105KA12D NCP362 ON Semiconductor GND Jumper WM8083-ND 1 mF, 25 V, X5R, CM0805 Jumper Ground 1mm pitch 10.16 mm EN, FLAG, IN, VBUS, ID, Vcc SMB R 114 665 PCB Plated Gold USB Input Connector Hirose UX60-MB-5S 5 pins USB mini USB Output Connector AU Y1006 R 4 pins USB A http://onsemi.com 14 NCP362 ORDERING INFORMATION Marking Package Shipping† NCP362AMUTBG ADA UDFN10 (Pb−Free) 3000 / Tape & Reel NCP362BMUTBG ADG UDFN10 (Pb−Free) 3000 / Tape & Reel NCP362CMUTBG ADC UDFN10 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. SELECTION GUIDE The NCP362 can be available in several undervoltage, overvoltage, overcurrent and clamping voltage versions. Part number is designated as follows: NCP362xxxMUxxTBG abc de f g Code Contents a ESD diode options A: TVS diode on pin 4 B: ESD diodes on pins 6 & 7 C: Option A & B b TVS Pin 4 VRWM voltage −: 12 V ESD Pin 6 & 7 VRWM voltage −: 5 V c Overcurrent Typical Threshold −: 750 mA d UVLO Typical Threshold −: 3.00 V e OVLO Typical Threshold −: 5.675 V f Tape & Reel Type B: = 3000 g Pb−Free NOTE: Please contact your ON Semiconductor representative for availability of additional options. http://onsemi.com 15 NCP362 PACKAGE DIMENSIONS UDFN10 2x2.5, 0.5P CASE 517AV−01 ISSUE O D 0.15 C 2X 0.15 C OPTIONAL CONSTRUCTIONS ÇÇÇ ÉÉÉ ÇÇÇ A3 0.10 C A A1 0.08 C A1 C B 10X D2 DETAIL A F L MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.20 0.30 2.50 BSC 1.35 1.55 0.30 0.50 2.00 BSC 0.95 1.15 0.50 BSC 1.08 BSC 0.20 --0.20 0.30 --0.15 SOLDERING FOOTPRINT* b 0.10 C A 1.55 B 10X 1.13 NOTE 3 0.35 5 10X E2 0.45 0.10 C A K DETAIL B SEATING PLANE 0.05 C 1 A3 OPTIONAL CONSTRUCTION SIDE VIEW 0.10 C A DIM A A1 A3 b D D2 D3 E E2 e F K L L1 MOLD CMPD EXPOSED Cu TOP VIEW NOTE 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L DETAIL A E DETAIL B 10X L L1 ÍÍ ÍÍ PIN ONE REFERENCE 2X A B 10 6 e 1.15 B D3 PACKAGE OUTLINE F 0.10 C A 2.30 1 B 0.50 PITCH BOTTOM VIEW 0.50 1.13 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 16 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NCP362/D