® RT8287 3A, 21V 500kHz Synchronous Step-Down Converter General Description Features The RT8287 is a synchronous step-down regulator with an internal power MOSFET. It achieves 3A of continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. z 3A Output Current z Adjustable Soft-Start 120mΩ Ω/40mΩ Ω Internal Power MOSFET Switch Internal Compensation Minimizes External Parts Count Fixed 500kHz Frequency Thermal Shutdown Protection Cycle-by-Cycle Over Current Protection Wide 4.5V to 21V Operating Input Range Adjustable Output from 0.808V to 15V Small 14-Lead WDFN Package RoHS Compliant and Halogen Free Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. An adjustable soft-start reduces the stress on the input source at startup. z z z z z z The RT8287 requires a minimal number of readily available external components, providing a compact solution. z z z Ordering Information RT8287 Applications Package Type QW : WDFN-14L 4x3 (W-Type) z z Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) z z Distributive Power Systems Battery Charger DSL Modems Pre-Regulator for Linear Regulators Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Pin Configurations Suitable for use in SnPb or Pb-free soldering processes. Marking Information A8 : Product Code A8 YM DNN YMDNN : Date Code Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8287-03 June 2012 (TOP VIEW) VIN SW SW SW SW BOOT EN 14 13 1 2 3 4 5 6 7 GND 15 12 11 10 9 8 AGND GND GND VCC SS PGOOD FB WDFN-14L 4x3 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8287 Typical Application Circuit 1 VIN BOOT VIN CIN 22µF RT8287 9 PGOOD PGOOD R3 100k 2, 3, 4, 5 CBOOT 0.1µF L VOUT 1.2V/3A R1 11 VCC CC 0.1µF 7 EN AGND 14 ON/OFF SW 6 COUT RT FB 8 SS 10 CSS 47nF R2 GND 12, 13, 15 (Exposed Pad) Table 1. Recommended Components Selection VOUT (V) 5 3.3 2.5 1.8 1.5 1.2 1.05 R1 (kΩ) 75 75 75 5 5 5 5 R2 (kΩ) 14.46 24.32 35.82 4.07 5.84 10.31 16.69 RT (kΩ) 0 0 0 30 39 47 47 L (μH) 4.7 3.6 3.6 2 2 2 1.5 COUT (μF) 22 x 2 22 x 2 22 x 2 22 x 2 22 x 2 22 x 2 22 x 2 Function Pin Description Pin No. Pin Name 1 VIN 2, 3, 4, 5 SW 6 BOOT 7 EN 8 FB 9 PGOOD 10 SS 11 VCC 12, 13 GND 15 (Exposed Pad) 14 AGND Pin Function Supply Input. VIN supplies the power to the IC, as well as the step-down converter switches. Drive VIN with a 4.5V to 21V power source. Bypass VIN to GND with a suitably large capacitor to eliminate noise on the input to the IC. Switch Node. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BOOT to power the high side switch. High Side Gate Drive Boost Input. BOOT supplies the drive for the high side N-MOSFET switch. Connect a 100nF or greater capacitor from SW to BOOT to power the high side switch. Chip Enable (Active High). For automatic start-up, connect the EN pin to VIN with a 100kΩ resistor. Feedback Input. FB senses the output voltage to regulate said voltage. Drive FB with a resistive voltage divider from the output voltage. The feedback threshold is 0.808V. Power Good Output. The output of this pin is open-drain. Power good threshold is 90% low to high and 70% high to low of regulation value. Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. Bias Supply. Decouple with 0.1μF to 0.22μF capacitor. The capacitance should be no more than 0.22μF. Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Analog Ground. Connect this pin to the system ground in PCB layout. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS8287-03 June 2012 RT8287 Function Block Diagram VIN 1.2V Shutdown Comparator + - EN Current Sense Amplifier - Ramp Generator Regulator + VA VA 5k VC - 1µA 3V + Oscillator 500kHz BOOT S Lockout Comparator Q + 1.7V Driver R PWM Comparator VCC PGOOD + SW Reference Error + Amplifier + - - FB VC 30pF GND 400k 10µA SS 1pF Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8287-03 June 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8287 Absolute Maximum Ratings z z z z z z z z z z (Note 1) Supply Input Voltage, VIN ---------------------------------------------------------------------------------Switch Voltage, SW ----------------------------------------------------------------------------------------Boot Voltage, BOOT ----------------------------------------------------------------------------------------Other Pins -----------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C WDFN-14L 4x3 -----------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WDFN-14L 4x3, θJA -----------------------------------------------------------------------------------------WDFN-14L 4x3, θJC -----------------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) --------------------------------------------------------------------------------- Recommended Operating Conditions z z z −0.3V to 26V −0.3V to (VIN + 0.3V) (SW − 0.3V) to (SW + 6V) −0.3V to 6V 1.667W 60°C/W 7°C/W 150°C 260°C −65°C to 150°C 2kV (Note 4) Supply Input Voltage, VIN ---------------------------------------------------------------------------------- 4.5V to 21V Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 12V, TA = 25°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Shutdown Current ISHDN VEN = 0 -- 0 1 μA Quiescent Current IQ VEN = 2V, VFB = 1V -- 0.7 -- mA Upper Switch On Resistance R DS(ON)1 -- 120 -- mΩ Lower Switch On Resistance R DS(ON)2 -- 40 -- mΩ Switch Leakage ILEAK VEN = 0V, VSW = 0V or 12V -- 0 10 μA Current Limit ILIMIT VBOOT − VSW = 4.8V 5.4 6.5 -- A Oscillator Frequency fSW VFB = 0.75V 425 500 575 kHz VFB = 0V -- 150 -- kHz VFB = 0.8V -- 90 -- % -- 100 -- ns 0.82 V nA Short Circuit Frequency Maximum Duty Cycle D MAX Minimum On Time tON Feedback Voltage VFB Feedback Current IFB -- 10 50 Logic-High VIH 2 -- 5.5 Logic-Low VIL -- -- 0.4 VEN = 2V -- 1 -- VEN = 0V -- 0 -- EN Threshold Voltage Enable Current 4.5V ≤ VIN ≤ 21V Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 0.796 0.808 V μA is a registered trademark of Richtek Technology Corporation. DS8287-03 June 2012 RT8287 Parameter Symbol Min Typ Max Unit Power Good Rising Threshold -- 90 -- % Power Good Falling Threshold -- 70 -- % Power Good Delay -- 20 -- μs -- -- 0.4 V -- 10 -- nA 3.8 4 4.2 V -- 400 -- mV -- 5 -- V ICC = 5mA -- 5 -- % CSS = 47nF -- 4.7 -- ms Power Good Sink Current Capability Test Conditions Sink 4mA Power Good Leakage Current Under Voltage Lockout Threshold Under Voltage Lockout Threshold Hysteresis VUVLO VIN Rising ΔVUVLO VCC Regulator VCC Load Regulation Soft-Start Period tSS Thermal Shutdown TSD -- 150 -- °C Thermal Shutdown Hysteresis ΔTSD -- 30 -- °C Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.bsolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8287-03 June 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8287 Typical Operating Characteristics Reference Voltage vs. Input Voltage Efficiency vs. Output Current 0.830 100 90 VIN = 12V 0.825 Reference Voltage(V) Efficiency (%) 80 VIN = 21V 70 60 50 40 30 20 0.820 0.815 0.810 0.805 0.800 0.795 10 VOUT = 1.22V, IOUT = 0A to 3A 0.790 0 0 0.5 1 1.5 2 2.5 4 3 6 8 10 14 16 18 20 22 Input Voltage (V) Output Current (A) Reference Voltage vs. Temperature Output Voltage vs. Output Current 0.84 1.226 0.83 1.224 0.82 1.222 Output Voltage (V) Reference Voltage (V) 12 0.81 0.80 0.79 0.78 1.220 1.218 1.216 1.214 0.77 1.212 0.76 1.210 VIN = 12V, VOUT = 1.22V, IOUT = 0A to 3A -50 -25 0 25 50 75 100 125 0 0.5 1 Temperature (°C) Switching Frequency vs. Input Voltage 2 2.5 3 Switching Frequency vs. Temperature 550 550 525 525 Switching Frequency (kHz)1 Switching Frequency (kHz)1 1.5 Output Current (A) 500 475 450 425 400 375 500 475 450 425 400 375 VOUT = 1.22V, IOUT = 0.8A 350 VIN = 12V, VOUT = 1.22V, IOUT = 1A 350 4 6 8 10 12 14 16 18 20 Input Voltage (V) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 22 -50 -25 0 25 50 75 100 125 Temperature (°C) is a registered trademark of Richtek Technology Corporation. DS8287-03 June 2012 RT8287 Current Limit vs. Input Voltage Current Limit vs. Temperature 12 11 10 Current Limit (A) Current Limit (A) 10 8 6 4 9 8 7 6 5 2 4 VIN = 12V, VOUT = 1.22V 0 3 4 6 8 10 12 14 16 18 20 22 -50 0 25 50 75 100 Input Voltage (V) Temperature (°C) Load Transient Response Load Transient Response VOUT (200mV/Div) VOUT (200mV/Div) IOUT (2A/Div) IOUT (2A/Div) VIN = 12V, VOUT = 1.22V, IOUT = 0A to 3A Time (100μs/Div) Time (100μs/Div) Output Voltage Ripple Output Voltage Ripple VOUT (50mV/Div) VSW (10V/Div) VSW (10V/Div) IL (2A/Div) IL (2A/Div) VIN = 12V, IOUT = 1A Time (1μs/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. June 2012 125 VIN = 12V, VOUT = 1.22V, IOUT = 1A to 3A VOUT (50mV/Div) DS8287-03 -25 VIN = 12V, IOUT = 3A Time (1μs/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT8287 Power Off from VIN Power On from VIN VIN (10V/Div) VIN (10V/Div) VOUT (1V/Div) VOUT (1V/Div) VPGOOD (5V/Div) IL (5A/Div) VPGOOD (5V/Div) IL (5A/Div) VIN = 12V, VOUT = 1.22V, IOUT = 3A Time (5ms/Div) Time (50ms/Div) Power On from EN Power Off from EN VEN (5V/Div) VEN (5V/Div) VOUT (1V/Div) VOUT (1V/Div) VPGOOD (5V/Div) IL (5A/Div) VPGOOD (5V/Div) IL (5A/Div) VIN = 12V, VOUT = 1.22V, IOUT = 3A Time (2.5ms/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 VIN = 12V, VOUT = 1.22V, IOUT = 3A VIN = 12V, VOUT = 1.22V, IOUT = 3A Time (50μs/Div) is a registered trademark of Richtek Technology Corporation. DS8287-03 June 2012 RT8287 Application Information The IC is a synchronous high voltage buck converter that can support the input voltage range from 4.5V to 21V and the output current can be up to 3A. Output Voltage Setting The output voltage is set by an external resistive divider according to the following equation : VOUT = VFB ⎛⎜ 1+ R1 ⎞⎟ ⎝ R2 ⎠ where VFB is the feedback reference voltage 0.808V (typ.). The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 1. VOUT R1 FB RT8287 R2 GND Soft-Start The IC contains an external soft-start clamp that gradually raises the output voltage. The soft-start timing is programmed by the external capacitor between SS pin and GND. The chip provides an internal 10μA charge current for the external capacitor. If 47nF capacitor is used to set the soft-start, the period will be 4.7ms (typ.). Under Voltage Lockout Threshold The IC includes an input Under Voltage Lockout Protection (UVLO). If the input voltage exceeds the UVLO rising threshold voltage (4.2V), the converter resets and prepares the PWM for operation. If the input voltage falls below the UVLO falling threshold voltage (3.8V) during normal operation, the device stops switching. The UVLO rising and falling threshold voltage includes a hysteresis to prevent noise caused reset. Chip Enable Operation Figure 1. Output Voltage Setting External Bootstrap Diode Connect a 100nF low ESR ceramic capacitor between the BOOT pin and SW pin as shown in Figure 2. This capacitor provides the gate driver voltage for the high side MOSFET. It is recommended to add an external bootstrap diode between an external 5V and BOOT pin for efficiency improvement when input voltage is lower than 5.5V or duty ratio is higher than 65% .The bootstrap diode can be a low cost one such as IN4148 or BAT54. The external 5V can be a 5V fixed input from system or a 5V output of the IC. Note that the external boot voltage must be lower than 5.5V. 5V BOOT RT8287 100nF SW Figure 2. External Bootstrap Diode Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8287-03 June 2012 The EN pin is the chip enable input. Pulling the EN pin low (<0.4V) will shut down the device. During shutdown mode, the IC quiescent current drops to lower than 1μA. Driving the EN pin high (>2V, < 5.5V) will turn on the device again. For external timing control (e.g.RC), the EN pin can also be externally pulled high by adding a REN* resistor and CEN* capacitor from the VIN pin, as can be seen from the Figure 5. An external MOSFET can be added to implement digital control on the EN pin when front age system voltage below 2.5V is available, as shown in Figure 3. In this case, a 100kΩ pull-up resistor, REN, is connected between VIN and the EN pin. MOSFET Q1 will be under logic control to pull down the EN pin. To prevent enabling circuit when VIN is smaller than the VOUT target value, a resistive voltage divider can be placed between the input voltage and ground and connected to the EN pin to adjust IC lockout threshold, as shown in Figure 4. For example, if an 8V output voltage is regulated from a 12V input voltage, the resistor REN2 can be selected to set input lockout threshold larger than 8V. is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT8287 1 VIN REN 100k BOOT VIN CIN CBOOT RT8287 SW 7 EN Chip Enable 6 2, 3, 4, 5 L VOUT Q1 R1 9 PGOOD R3 100k 11 CC SS VCC AGND 14 RT FB 8 PGOOD 10 COUT CSS 47nF R2 GND 12, 13, 15 (Exposed Pad) Figure 3. Enable Control Circuit for Logic Control with Low Voltage 1 VIN REN 100k BOOT VIN CIN CBOOT RT8287 SW 7 EN 6 2, 3, 4, 5 L VOUT REN2 R1 9 PGOOD R3 100k CC 11 PGOOD FB 8 VCC SS 10 AGND 14 COUT RT CSS 47nF R2 GND 12, 13, 15 (Exposed Pad) Figure 4. The Resistors can be Selected to Set IC Lockout Threshold Power Good Output Inductor Selection The power good output is an open-drain output and requires a pull up resistor. When the output voltage is 70% below its set voltage, PGOOD will be pulled low. It is held low until the output voltage returns to within the allowed tolerances once more. During soft-start, PGOOD is actively held low and only allowed to transition high after soft-start is over and the output voltage has reached 90% of its set voltage. For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. V V ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥ VIN ⎦ ⎣ f ×L ⎦ ⎣ Under Output Voltage Protection-Hiccup Mode For the IC, Hiccup Mode of Under Voltage Protection (UVP) is provided. When the FB voltage drops below half of the feedback reference voltage, VFB, the UVP function will be triggered and the IC will shut down for a period of time and then recover automatically. The Hiccup Mode of UVP can reduce input current in short-circuit conditions. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 Having a lower ripple current reduces not only the ESR losses in the output capacitors but also the output voltage ripple. Highest efficiency operation is achieved by reducing ripple current at low frequency, but it requires a large inductor to attain this goal. For the ripple current selection, the value of ΔIL = 0.24(IMAX) will be a reasonable starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : ⎡ VOUT ⎤ ⎡ VOUT ⎤ L =⎢ × ⎢1 − ⎥ ⎥ f I V × Δ L(MAX) ⎦ ⎣ IN(MAX) ⎦ ⎣ is a registered trademark of Richtek Technology Corporation. DS8287-03 June 2012 RT8287 The inductor's current rating (caused a 40°C temperature rising from 25°C ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. Please see Table 2 for the inductor selection reference and it is highly recommended to keep inductor value as close as possible to the recommended inductor values for each VOUT as shown in Table 1. Table 2. Suggested Inductors for Typical Application Circuit Component Supplier Series Dimensions (mm) TDK VLF10045 10 x 9.7 x 4.5 TDK SLF12565 12.5 x 12.5 x 6.5 TAIYO YUDEN NR8040 8x8x4 Input and Output Capacitors Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the high side MOSFET. To prevent large ripple current, a low ESR input capacitor sized for the maximum RMS current should be used. The RMS current is given by : V IRMS = IOUT(MAX) OUT VIN VIN −1 VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT / 2. This simple worst case condition is commonly used for design because even significant deviations do not offer much relief. Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For the input capacitor, one 22μF low ESR ceramic capacitors are recommended. For the recommended capacitor, please refer to table 3 for more detail. Table 3. Suggested Capacitors for CIN and COUT Location C IN C IN COUT COUT COUT COUT Component Supplier MURATA TDK MURATA TDK MURATA TDK Part No. GRM32ER71C226M C3225X5R1C226M GRM31CR60J476M C3225X5R0J476M GRM32ER71C226M C3225X5R1C226M The selection of COUT is determined by the required ESR to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key for COUT selection to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response. The output ripple, ΔVOUT, is determined by : 1 ⎤ ΔVOUT ≤ ΔIL ⎡⎢ESR + 8fCOUT ⎦⎥ ⎣ Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8287-03 June 2012 Capacitance (μF) 22 22 47 47 22 22 Case Size 1210 1210 1206 1210 1210 1210 and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at excessively high temperatures. When the junction temperature is higher than 150°C, the chip will shut down the switching operation. The chip will automatically resume switching, once the junction temperature cools down by approximately 30°C. is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT8287 EMI Consideration Figure 5. Another method is by adding a resistor in series with the bootstrap capacitor, CBOOT, but this method will decrease the driving capability to the high side MOSFET. It is strongly recommended to reserve the R-C snubber during PCB layout for EMI improvement. Moreover, reducing the SW trace area and keeping the main power in a small loop will be helpful on EMI performance. For detailed PCB layout guide, please refer to the section Layout Considerations. Since parasitic inductance and capacitance effects in PCB circuitry would cause a spike voltage on SW pin when high side MOSFET is turned-on/off, this spike voltage on SW may impact on EMI performance in the system. In order to enhance EMI performance, there are two methods to suppress the spike voltage. One way is by placing an R-C snubber (RS*, CS*) between SW and GND and locating them as close as possible to the SW pin, as shown in 1 VIN REN* BOOT VIN CIN CBOOT RT8287 SW 7 EN 6 2, 3, 4, 5 L VOUT CS* CEN* COUT RS* 9 PGOOD R3 100k CC 11 PGOOD AGND 14 RT FB 8 VCC SS R1 10 CSS 47nF R2 GND 12, 13, 15 (Exposed Pad) * : Optional Figure 5. Reference Circuit with Snubber and Enable Timing Control For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WDFN-14L 4x3 package, the thermal resistance, θJA, is 60°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for WDFN-14L 4x3 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 6 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 1.80 Maximum Power Dissipation (W)1 Thermal Considerations Four-Layer PCB 1.50 1.20 0.90 0.60 0.30 0.00 0 25 50 75 100 125 Ambient Temperature (°C) Figure 6. Derating Curve of Maximum Power Dissipation Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS8287-03 June 2012 RT8287 Layout Considerations ` Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the IC. ` Connect all analog grounds to a common node and then connect the common node to the power ground behind the output capacitors. ` An example of PCB layout guide is shown in Figure 7 for reference. Follow the PCB layout guidelines for optimal performance of the IC. ` Keep the traces of the main current paths as short and wide as possible. ` Put the input capacitor as close as possible to the device pins (VIN and GND). ` SW node is with high frequency voltage swing and should be kept at small area. Keep analog components away from the SW node to prevent stray capacitive noise pickup. Place the input and output capacitors as close to the IC as possible. GND CIN SW should be VIN connected to SW inductor by wide SW and short trace and SW CBOOT SW keep sensitive components away BOOT EN from this trace. L VOUT 1 14 2 13 3 4 5 6 7 12 GND 15 11 10 9 8 AGND GND CSS GND VCC SS PGOOD FB RT R2 R1 Place the feedback as close to the IC as possible. VOUT COUT GND Figure 7. PCB Layout Guide Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8287-03 June 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT8287 Outline Dimension 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 3.900 4.100 0.154 0.161 D2 3.250 3.350 0.128 0.132 E 2.900 3.100 0.114 0.122 E2 1.650 1.750 0.065 0.069 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 14L DFN 4x3 Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 14 DS8287-03 June 2012