SANYO LC75836W

Ordering number : ENA0428A
CMOS IC
LC75836W
1/4-Duty General-Purpose
LCD Display Driver
Overview
The LC75836W is 1/4-duty general-purpose microprocessor-controlled LCD driver that can be used in applications such
as frequency display in products with electronic tuning. In addition to being able to drive up to 140 segments directly, the
LC75836W can also control up to 4 general-purpose output ports.
Features
• 1/4 duty, 1/3 bias drive (Up to 140 segment can be displayed.)
• Serial data input supports CCB* format communication with the system controller (support 3V operation).
• Serial data control of the power-saving mode based backup function and the all segments forced off function.
• Serial data control of switching between the segment output port and general-purpose output port functions.
• Serial data control of the frame frequency of the common and segment output waveforms.
• Either RC oscillator operating or external clock operating mode can be selected with the serial control data.
• High generality, since display data is displayed directly without the intervention of a decoder circuit.
• The INH pin allows the display to be forced to the off state.
• RC oscillation circuit (with external resistor and capacitor)
•
•
CCB is a registered trademark of SANYO Electric Co., Ltd.
CCB is SANYO Semiconductor's original bus format. All bus addresses are managed by SANYO
Semiconductor for this format.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
32509HKIM 20070522-S00003/70506HKIM No.A0428-1/18
LC75836W
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0V
Parameter
Symbol
Maximum supply voltage
Conditions
VDD max
Input voltage
Ratings
VDD
Unit
-0.3 to +7.0
V
VIN1
CE, CL, DI, INH
VIN2
OSC, VDD1, VDD2
-0.3 to VDD+0.3
Output voltage
VOUT
S1 to S35, COM1 to COM4, P1 to P4, OSC
-0.3 to VDD+0.3
V
Output current
IOUT1
S1 to S35
300
μA
IOUT2
COM1 to COM4
3
IOUT3
P1 to P4
5
Pdmax
Ta=85°C
Allowable power dissipation
-0.3 to +7.0
V
mA
100
mW
Operating temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-55 to +125
°C
Allowable Operating Ranges at Ta = -40 to +85°C, VSS = 0V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Supply voltage
VDD
VDD
Input voltage
VDD1
VDD1
2/3VDD
VDD
VDD2
VDD2
1/3VDD
VDD
VIH1
CE, CL, DI, INH
0.4VDD
6.0
VIH2
OSC external clock operating mode
0.4VDD
VDD
Input high-level voltage
Input low-level voltage
4.5
6.0
VIL1
CE, CL, DI, INH
0
0.2VDD
VIL2
OSC external clock operating mode
0
0.2VDD
Rosc
OSC RC oscillator operating mode
Cosc
OSC RC oscillator operating mode
fosc
OSC RC oscillator operating mode
External clock operating frequency
fCK
OSC external clock operating mode [Figure 4]
19
External clock duty cycle
DCK
OSC external clock operating mode [Figure 4]
30
Recommended external resistor
for RC oscillation
Recommended external capacitor
for RC oscillation
Guaranteed range of RC
19
oscillation
Data setup time
tds
Data hold time
tdh
CE wait time
tcp
CE setup time
tcs
CE hold time
CL, DI
V
V
V
V
39
kΩ
1000
pF
38
76
kHz
38
76
kHz
50
70
%
[Figure 2][Figure 3]
160
ns
CL, DI
[Figure 2][Figure 3]
160
ns
CE, CL
[Figure 2][Figure 3]
160
ns
CE, CL
[Figure 2][Figure 3]
160
ns
tch
CE, CL
[Figure 2][Figure 3]
160
ns
High-level clock pulse width
tφH
CL
[Figure 2][Figure 3]
160
ns
Low-level clock pulse width
tφL
CL
[Figure 2][Figure 3]
160
ns
Rise time
tr
CE, CL, DI
[Figure 2][Figure 3]
160
Fall time
tf
CE, CL, DI
[Figure 2][Figure 3]
160
INH switching time
tc
INH, CE
[Figure 5]
10
ns
ns
μs
No.A0428-2/18
LC75836W
Electrical Characteristics for the Allowable Operating Ranges
Parameter
Symbol
Pin
Ratings
Conditions
min
typ
Unit
max
Hysteresis
VH
CE, CL, DI, INH
Input high-level current
IIH1
CE, CL, DI, INH
VI = 6.0V
5.0
IIH2
OSC
VI = VDD external clock operating mode
5.0
IIL1
CE, CL, DI, INH
VI = 0V
-5.0
IIL2
OSC
VI = 0V external clock operating mode
-5.0
Input low-level current
Output high-level voltage
0.03VDD
VOH1
S1 to S35
IO = -20μA
VOH2
COM1
IO = -100μA
VOH3
P1 to P4
IO = -1mA
VOL1
S1 to S35
IO = 20μA
VOL2
COM1
IO = 100μA
μA
V
VDD-0.9
VDD-0.9
0.9
0.9
to COM4
Output middle-level
VOL3
P1 to P4
IO =1mA
VMID1
S1 to S35
1/3 bias IO = ±20μA
2/3VDD
-0.9
+0.9
VMID2
S1 to S35
1/3 bias IO = ±20μA
1/3VDD
1/3VDD
-0.9
+0.9
VMID3
COM1
1/3 bias IO = ±100μA
2/3VDD
2/3VDD
-0.9
+0.9
VMID4
COM1
1/3 bias IO = ±100μA
1/3VDD
1/3VDD
-0.9
+0.9
to COM4
to COM4
fosc
OSC
RC oscillator operating mode
Rosc = 39 kΩ, Cosc = 1000pF
Current drain
V
0.9
voltage *1
Oscillator frequency
μA
VDD-0.9
to COM4
Output low-level voltage
V
IDD1
VDD
Power-saving mode
IDD2
VDD
VDD = 6.0V output open
RC oscillator operating mode
30.4
2/3VDD
38
45.6
V
kHz
5
350
700
fosc = 38kHz
IDD3
VDD
μA
VDD = 6.0V output open
External clock operating mode
fCK = 38kHz
450
900
VIH2 = 0.5VDD
VIL2 = 0.1VDD
Note: *1 Excluding the bias voltage generation divider resistors built in the VDD1 and VDD2. (See Figure 1.)
VDD
VDD1
To the common and segment drivers
VDD2
Except these resistors.
VSS
Figure 1
No.A0428-3/18
LC75836W
1. When CL is stopped at the low level
tφL
tcp
≈ ≈
DI
tf
VIH1
VIL1
tds
≈ ≈ ≈
VIH1
50%
VIL1
tr
VIL1
≈ ≈
tφH
CL
≈
VIH1
CE
tcs
tch
tdh
Figure 2
2. When CL is stopped at the high level
≈
VIH1
CE
≈
VIL1
tφH
≈
tφL
tf
tr
tcp
tcs
≈ ≈
≈ ≈ ≈
VIH1
50%
VIL1
CL
VIH1
DI
VIL1
tds
tch
tdh
Figure 3
3. OSC pin clock timing in external clock operating mode
tCKH
OSC
VIH2
50%
VIL2
tCKL
fCK=
1
tCKH+ tCKL
[kHz]
tCKH
×100[%]
DCK=
tCKH+ tCKL
Figure 4
No.A0428-4/18
LC75836W
Package Dimensions
unit : mm (typ)
3163B
36
0.5
9.0
7.0
25
24
48
13
7.0
9.0
37
1
12
0.5
0.15
0.18
0.1 (1.5)
1.7max
(0.75)
SANYO : SQFP48(7X7)
COM3
36
37
S25
S26
S27
S28
S30
S29
S31
S32
S33
COM1
S34
COM2
Pin Assignment
25
24
COM4
S35
VDD
VDD1
S22
S21
S20
VDD2
S19
LC75836W
VSS
S18
OSC
S17
S16
INH
CE
S15
S14
S13
S12
S11
S9
S10
S8
S7
S6
S5
P4/S4
P3/S3
13
12
P2/S2
48
1
P1/S1
CL
DI
S24
S23
Top view
No.A0428-5/18
LC75836W
COMMON
DRIVER
S1/P1
S2/P2
S3/P3
S4/P4
S5
S35
COM4
COM3
COM2
COM1
Block Diagram
SEGMENT DRIVER & LATCH
INH
OSC
CLOCK
GENERATOR
CONTROL
REGISTER
VDD
SHIFT REGISTER
VDD1
VDD2
CCB INTERFACE
CE
CL
DI
VSS
No.A0428-6/18
LC75836W
Pin Functions
Handling
Symbol
Pin No.
Function
Active
I/O
when
unused
S1/P1
1 to 4
Segment outputs for displaying the display data transferred by serial data input.
-
O
OPEN
Common driver outputs. The frame frequency is fo [Hz].
-
O
OPEN
Oscillator connection. An oscillator circuit is formed by connecting an external
-
I/O
VDD
H
I
GND
The S1/P1 to S4/P4 pins can be used as general-purpose output ports when so set
to S4/P4
S5 to S34
5 to 34
S35
39
COM1
35 to 38
up by the control data.
to COM4
OSC
44
resistor and capacitor to this pin. This pin can be used as the external clock input
pin if external clock operating mode is selected with the control data.
CE
46
CL
47
Serial data transfer inputs. Must be connected to the controller.
CE: Chip enable
DI
48
CL: Synchronization clock
I
-
I
L
I
GND
DI: Transfer data
INH
45
Display off control input
• INH = low (VSS) ...Display forced off
S1/P1 to S4/P4 = low (VSS)
(These pins are forcibly set to the segment output port function
and held at the VSS level.)
S5 to S35 = low (VSS)
COM1 to COM4 = low (VSS)
OSC = Z (high impedance)
RC oscillation stopped
Inhibits external clock input.
• INH = high (VDD)...Display on
RC oscillation enabled (RC oscillator operating mode)
Enables external clock input (external clock operating mode).
However, serial data transfer is possible when the display is forced off.
VDD1
41
Used to apply the LCD drive 2/3 bias voltage externally.
-
I
OPEN
VDD2
42
Used to apply the LCD drive 1/3 bias voltage externally.
-
I
OPEN
VDD
40
Power supply pin. A power voltage of 4.5 to 6.0V must be applied to this pin.
-
-
-
VSS
43
Ground pin. Must be connected to ground.
-
-
-
No.A0428-7/18
LC75836W
Serial Data Transfer Formats
1. When CL is stopped at the low level
∼
CE
DI
0
1
1
0
0
0
1
0
D1 D2
D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 0 FC0 FC1 FC2 P0 P1 P2 OC SC BU 0
∼∼∼
CL
0
B0 B1 B2 B3 A0 A1 A2 A3
Control data
10 bit
Display data
36 bit
1
1
0
0
0
1
0
D37 D38
D59 D60 D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72 0
0
0
0
0
0
0
0
0
0
0
∼∼∼
∼∼∼
0
∼
DD
2 bit
∼
CCB address
8 bit
1
B0 B1 B2 B3 A0 A1 A2 A3
Display data
36 bit
DD
2 bit
1
1
0
0
0
1
0
D73 D74
D95 D96 D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 0
0
0
0
0
0
0
0
0
0
1
∼∼∼
∼∼∼
0
∼
Fixed data
10 bit
∼
CCB address
8 bit
0
B0 B1 B2 B3 A0 A1 A2 A3
Fixed data
Display data
36 bit
DD
2 bit
10 bit
∼∼∼
∼
CCB address
8 bit
0
1
1
0
0
0
1
0
D109 D110
D131 D132 D133 D134 D135 D136 D137 D138 D139 D140 0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bit
Display data
32 bit
Fixed data
14 bit
DD
2 bit
Note: DD is the direction data.
No.A0428-8/18
LC75836W
2. When CL is stopped at the high level
∼∼
CE
DI
0
1
1
0
0
0
1
0
D1 D2
D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 0 FC0 FC1 FC2 P0 P1 P2 OC SC BU 0
∼∼
CL
0
B0 B1 B2 B3 A0 A1 A2 A3
Control data
10 bit
DD
2 bit
1
1
0
0
0
1
0
D37 D38
D59 D60 D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72 0
0
0
0
0
0
0
0
0
0
0
∼∼
∼∼
0
∼∼
Display data
36 bit
∼∼
CCB address
8 bit
1
B0 B1 B2 B3 A0 A1 A2 A3
Fixed data
10 bit
Display data
36 bit
1
1
0
0
0
1
0
D73 D74
D95 D96 D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 0
0
0
0
0
0
0
0
0
0
1
∼∼
∼∼
0
∼∼
DD
2 bit
∼∼
CCB address
8 bit
0
B0 B1 B2 B3 A0 A1 A2 A3
Display data
36 bit
Fixed data
10 bit
DD
2 bit
∼∼
∼∼
CCB address
8 bit
0
1
1
0
0
0
1
0
D109 D110
D131 D132 D133 D134 D135 D136 D137 D138 D139 D140 0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bit
Display data
32 bit
Fixed data
14 bit
DD
2 bit
Note: DD is the direction data.
• CCB address ....... "46H"
• D1 to D140 ......... Display data
• FC0 to FC2 ......... Common/segment output waveform frame frequency control data
• P0 to P2 .............. Segment output port/general-purpose output port switching control data
• OC ...................... RC oscillator operating mode/external clock operating mode switching control data
• SC ...................... Segments on/off control data
• BU ...................... Normal mode/power-saving mode control data
No.A0428-9/18
LC75836W
Serial Data Transfer Example
• When 109 or more segments are used
All 192 bits of serial data must be sent.
8 bit
0 1 1 0 0 0 1 0
48 bit
D1 D2
D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 0 FC0 FC1 FC2 P0 P1 P2 OC SC BU 0 0
D37 D38
D59 D60 D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72 0 0 0 0 0 0 0 0 0 0 0 1
D73 D74
D95 D96 D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 0 0 0 0 0 0 0 0 0 0 1 0
D109 D110
D131 D132 D133 D134 D135 D136 D137 D138 D139 D140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
B0 B1 B2 B3 A0 A1 A2 A3
0 1 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
0 1 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
0 1 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
• When fewer than 109 segments are used
Either 48, 96, or 144 bits of serial data must be sent, depending on the number of segments to be used. However,
the serial data shown below (the D1 to D36 display data and the control data) must always be sent.
8 bit
0 1 1 0 0 0 1 0
48 bit
D1 D2
D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 0 FC0 FC1 FC2 P0 P1 P2 OC SC BU 0 0
B0 B1 B2 B3 A0 A1 A2 A3
No.A0428-10/18
LC75836W
Control Data Functions
1. FC0 to FC2: Common/segment output waveform frame frequency control data
These control data bits set the frame frequency of the common and segment output waveforms.
Control data
Frame frequency fo [Hz]
FC0
FC1
FC2
1
1
0
fosc/768,fCK/768
1
1
1
fosc/576,fCK/576
0
0
0
fosc/384,fCK/384
0
0
1
fosc/288,fCK/288
0
1
0
fosc/192,fCK/192
2. P0 to P2: Segment output port/general-purpose output port switching control data
These control data bits switch the segment output port/general-purpose output port functions of the S1/P1 to S4/P4
output pins.
Control data
Output pin state
P0
P1
P2
S1/P1
S2/P2
S3/P3
S4/P4
0
0
0
S1
S2
S3
S4
0
0
1
P1
S2
S3
S4
0
1
0
P1
P2
S3
S4
0
1
1
P1
P2
P3
S4
1
0
0
P1
P2
P3
P4
Note: Sn (n = 1 to 4): Segment output ports
Pn (n = 1 to 4): General-purpose output ports
Note that when the general-purpose output port function is selected, the correspondence between the output pins and
the display data will be that shown in the table.
Output pin
Corresponding display data
S1/P1
D1
S2/P2
D5
S3/P3
D9
S4/P4
D13
For example, if the general-purpose output port function is selected for the S4/P4 output pin, that output pin will
output a high level (VDD) when the display data D13 is 1, and a low level (VSS) when the D13 is 0.
3. OC: RC oscillator operating mode/external clock operating mode switching control data.
This control data bit switches the OSC pin function
(either RC oscillator operating mode or external clock operating mode).
OC
OSC pin function
0
RC oscillator operating mode
1
External clock operating mode
Note: An external resistor, Rosc, and an external capacitor, Cosc, must be connected to the OSC pin if RC oscillator
operating mode is selected.
4. SC: Segment on/off control data
This control data bit controls the on/off state of the segments.
SC
Display state
0
On
1
Off
Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off
waveforms from the segment output pins.
No.A0428-11/18
LC75836W
5. BU: Normal mode/power-saving mode control data
This control data bit selects either normal mode or power saving mode.
BU
0
Mode
Normal mode
Power saving mode.
In RC oscillator operating mode (OC = 0), the OSC pin oscillator is stopped, and in external clock operating mode
1
(OC = 1), acceptance of the external clock is stopped. In this mode the common and segment output pins go to the
VSS levels. However, S1/P1 to S4/P4 output pins that are set to be general-purpose output ports by the control data
P0 to P2 can be used as general-purpose output ports.
No.A0428-12/18
LC75836W
Display Data and Output Pin Correspondence
Output pin
COM1
COM2
COM3
COM4
Output pin
COM1
COM2
COM3
COM4
S1/P1
D1
D2
D3
D4
S19
D73
D74
D75
D76
S2/P2
D5
D6
D7
D8
S20
D77
D78
D79
D80
S3/P3
D9
D10
D11
D12
S21
D81
D82
D83
D84
S4/P4
D13
D14
D15
D16
S22
D85
D86
D87
D88
S5
D17
D18
D19
D20
S23
D89
D90
D91
D92
S6
D21
D22
D23
D24
S24
D93
D94
D95
D96
S7
D25
D26
D27
D28
S25
D97
D98
D99
D100
S8
D29
D30
D31
D32
S26
D101
D102
D103
D104
S9
D33
D34
D35
D36
S27
D105
D106
D107
D108
S10
D37
D38
D39
D40
S28
D109
D110
D111
D112
S11
D41
D42
D43
D44
S29
D113
D114
D115
D116
S12
D45
D46
D47
D48
S30
D117
D118
D119
D120
S13
D49
D50
D51
D52
S31
D121
D122
D123
D124
S14
D53
D54
D55
D56
S32
D125
D126
D127
D128
S15
D57
D58
D59
D60
S33
D129
D130
D131
D132
S16
D61
D62
D63
D64
S34
D133
D134
D135
D136
S17
D65
D66
D67
D68
S35
D137
D138
D139
D140
S18
D69
D70
D71
D72
Note: Applies when the S1/P1 to S4/P4 output pins are set to their segment output function.
For example, the table below lists the output states for the S21 output pin.
Display data
Output pin (S21) state
D81
D82
D83
D84
0
0
0
0
The LCD segments corresponding to COM1, COM2, COM3, and COM4 are off.
0
0
0
1
The LCD segment corresponding to COM4 is on.
0
0
1
0
The LCD segment corresponding to COM3 is on.
0
0
1
1
The LCD segments corresponding to COM3 and COM4 are on.
0
1
0
0
The LCD segment corresponding to COM2 is on.
0
1
0
1
The LCD segments corresponding to COM2 and COM4 are on.
0
1
1
0
The LCD segments corresponding to COM2 and COM3 are on.
0
1
1
1
The LCD segments corresponding to COM2, COM3, and COM4 are on.
1
0
0
0
The LCD segment corresponding to COM1 is on.
1
0
0
1
The LCD segments corresponding to COM1 and COM4 are on.
1
0
1
0
The LCD segments corresponding to COM1 and COM3 are on.
1
0
1
1
The LCD segments corresponding to COM1, COM3, and COM4 are on.
1
1
0
0
The LCD segments corresponding to COM1 and COM2 are on.
1
1
0
1
The LCD segments corresponding to COM1, COM2, and COM4 are on.
1
1
1
0
The LCD segments corresponding to COM1, COM2, and COM3 are on.
1
1
1
1
The LCD segments corresponding to COM1, COM2, COM3, and COM4 are on.
No.A0428-13/18
LC75836W
Output Waveforms (1/4-Duty 1/3-Bias Drive Scheme)
fo[Hz]
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
VDD
VDD1
VDD2
0V
COM1
COM2
COM3
COM4
LCD driver output when all LCD segments corresponding to
COM1, COM2, COM3, and COM4 are off.
LCD driver output when only LCD segments
corresponding to COM1 are on.
LCD driver output when only LCD segments
corresponding to COM2 are on.
LCD driver output when LCD segments
corresponding to COM1 and COM2 are on.
LCD driver output when only LCD segments
corresponding to COM3 are on.
LCD driver output when LCD segments
corresponding to COM1 and COM3 are on.
LCD driver output when LCD segments
corresponding to COM2 and COM3 are on.
LCD driver output when LCD segments corresponding
to COM1, COM2, and COM3 are on.
LCD driver output when only LCD segments
corresponding to COM4 are on.
LCD driver output when LCD segments
corresponding to COM2, and COM4 are on.
LCD driver output when all LCD segments corresponding
to COM1, COM2, COM3, and COM4 are on.
Control data
Frame frequency fo [Hz]
FC0
FC1
FC2
1
1
0
fosc/768,fCK/768
1
1
1
fosc/576,fCK/576
0
0
0
fosc/384,fCK/384
0
0
1
fosc/288,fCK/288
0
1
0
fosc/192,fCK/192
No.A0428-14/18
LC75836W
Display Control and the INH Pin
Since the LSI internal data (the display data D1 to D140 and the control data) is undefined when power is first applied,
applications should set the INH pin low at the same time as power is applied to turn off the display. (This sets the S1/P1
to S4/P4, S5 to S35, and COM1 to COM4 pins to the VSS level.) and during this period send serial data from the
controller. The controller should then set the INH pin high after the data transfer has completed. This procedure
prevents meaningless displays at power on.
(See Figure 5.)
≈
t1
≈
VDD
INH
VIL1
CE
VIL1
Display data and control data dtratransterred
≈ ≈≈ ≈ ≈ ≈ ≈≈ ≈
tc
D1 to D36,
Internal data FC0 to FC2, P0 to P2,
OC, SC, BU
Undefined
Defined
Undefined
Internal data (D37 to D72)
Undefined
Defined
Undefined
Internal data (D73 to D108)
Undefined
Defined
Undefined
Internal data (D109 to D140)
Undefined
Defined
Undefined
Notes: t1>0
tc⋅⋅⋅10μs min
Figure 5
No.A0428-15/18
LC75836W
Notes on Controller Transfer of Display Data
Since the LC75836W transfer the display data (D1 to D140) in four separate transfer operations, we recommend that
applications make a point of completing all four data transfers within a period of less than 30ms to prevent
observable degradation of display quality.
OSC Pin Peripheral Circuit
(1) RC oscillator operating mode (control data OC = 0)
An external resistor, Rosc, and an external capacitor, Cosc, must be connected between the OSC pin and GND if
RC oscillator operating mode is selected.
OSC
Rosc
Cosc
(2) External clock operating mode (control data OC = 1)
When the external clock operating mode is selected, insert a current protection resistor Rg (4.7 to 47kΩ) between
the OSC pin and external clock output pin (external oscillator). Determine the value of the resistance according to
the allowable current value at the external clock output pin. Also make sure that the waveform of the external
clock is not heavily distorted.
External clock output pin
OSC
Rg
External oscillator
Note: Allowable current value at external clock output pin >
VDD
Rg
No.A0428-16/18
LC75836W
Sample Application Circuit 1
(P1)
1/4 Duty, 1/3 Bias (for use with normal panels)
(P2)
(P3)
*4
(P4)
VDD1
VDD2
C
C
VSS
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P3/S3
P4/S4
S5
C≥0.047μF
INH
CE
CL
DI
From the controller
Used for functions
such as backlight
control
LCD panel (up to 140 segments)
OSC
*3
VDD
+5V
General-purpose
Output ports
*2
S34
S35
*2: The pins to be connected to the controller (CE, CL, DI, INH) can handle 3V.
*3: In RC oscillator operating mode, an external resistor, Rosc, and an external capacitor, Cosc, must be connected
between the OSC pin and ground. If external clock operating mode is selected, a current protection resistor, Rg (4.7
to 47 kΩ), must be inserted between the external clock output pin (on the external oscillator) and the OSC pin.
(See the “OSC Pin Peripheral Circuit” section.)
*4: When a capacitor except the recommended external capacitance (Cosc = 1000pF) is connected to the OSC pin, it
should be in the range 220 to 2200pF.
(P1)
1/4 Duty, 1/3 Bias (for use with large panels)
(P2)
(P3)
*4
(P4)
OSC
*3
VDD
+5V
R
VDD1
R
VDD2
C
C
R
VSS
S5
10kΩ≥R≥1kΩ
C≥0.047μF
From the controller
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P3/S3
P4/S4
INH
CE
CL
DI
*2
General-purpose
Output ports
Used for functions
such as backlight
control
LCD panel (up to 140 segments)
Sample Application Circuit 2
S34
S35
*2: The pins to be connected to the controller (CE, CL, DI, INH) can handle 3V.
*3: In RC oscillator operating mode, an external resistor, Rosc, and an external capacitor, Cosc, must be connected
between the OSC pin and ground. If external clock operating mode is selected, a current protection resistor, Rg (4.7
to 47 kΩ), must be inserted between the external clock output pin (on the external oscillator) and the OSC pin.
(See the “OSC Pin Peripheral Circuit” section.)
*4: When a capacitor except the recommended external capacitance (Cosc = 1000pF) is connected to the OSC pin, it
should be in the range 220 to 2200pF.
No.A0428-17/18
LC75836W
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
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semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
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This catalog provides information as of March, 2009. Specifications and information herein are subject
to change without notice.
PS No.A0428-18/18