MAXIM MAX5547

19-3988; Rev 0; 2/06
Dual, 10-Bit, Current-Sink Output DAC
Features
♦ Dual Current-Sink DACs
The MAX5547 dual, 10-bit, dual range, digital-to-analog
converter (DAC) sinks up to 3.6mA of current, making it
ideal for laser-driver-control applications. Parallel the
MAX5547 outputs to sink higher current (up to 7.2mA
max). Operating from a single +2.7V to +5.25V
supply, the MAX5547 typically consumes 1mA
(internal reference).
♦ 10-Bit Resolution
♦ Two Software-Programmable Full-Scale Current
Ranges: 3.6mA or 1.2mA
♦ Parallelable Outputs for Up to 7.2mA (max)
♦ +2.5V Internal Reference Drifts Only 4ppm/°C
The MAX5547 operates from a precision +2.5V internal
4ppm/°C reference or an external reference in the
+2.45V to +2.55V range. The maximum full-scale current-sink range is software programmable to 3.6mA or
1.2mA for each DAC. A 10MHz SPI™-compatible serial
interface configures the device.
♦ +2.7V to +5.25V Single-Supply Operation
♦ INL: ±4 LSB (1.2mA Output)
♦ DNL: ±0.75 LSB (Guaranteed Monotonic)
♦ Low +0.8V Output Compliance
♦ Ultra-Small, 3mm x 3mm x 0.8mm, 8-Pin TDFN
Package
The MAX5547 is available in a 3mm x 3mm x 0.8mm 8pin TDFN package and is specified over the -40°C to
+85°C extended temperature range.
Ordering Information
Applications
Laser-Driver Control
PART
Pin-Diode Bias Currents
TEMP RANGE
PINPACKAGE
MAX5547ETA -40°C to +85°C 8 TDFN-EP*
Modulation Currents
TOP
MARK
PKG
CODE
APF
T833-2
*EP = Exposed pad.
Average Power
Pin Configuration appears at end of data sheet.
Extinction Ratios
Typical Operating Circuit
+2.5V
+2.7V TO +5.25V
+3.3V
VDD
VCC
REF
+3.3V
I
MODSET
OUTA
MAX5547
OUT-
MAX3736
OUT+
I
CS
DIN
SCLK
CS
MOSI
SCLK
BIAS
BIASSET
OUTB
GND
GND
FERRITE
BEAD
DIS
BC_MON
+3.3V
VCC
AIN0
REF
GND
MICROCONTROLLER WITH ADC
I/O1
I/O2
I/O3
AIN1
AIN2
+3.3V
TX_DISABLE
MOD-DEF1
MOD-DEF2
SPI is a trademark of Motorola, Inc.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX5547
General Description
MAX5547
Dual, 10-Bit, Current-Sink Output DAC
ABSOLUTE MAXIMUM RATINGS
VDD to GND .............................................................-0.3V to +6V
OUTA, OUTB, REF to GND ........................-0.3V to (VDD + 0.3V)
SCLK, DIN, CS to GND ............................................-0.3V to +6V
Continuous Power Dissipation (TA = +70°C)
8-Pin TDFN (derate 18.2mW/°C above +70°C) .......1454.5mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7 to +5.25V, GND = 0, external reference = +2.5V, output voltage = +2.0V, TA = -40°C to +85°C. Typical values are at
VDD = +3.0V, and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC PERFORMANCE—ANALOG SECTION
Resolution
10
Integral Nonlinearity (Note 2)
INL
Differential Nonlinearity
DNL
Offset Error
OE
±4
IOUT_ = 3.6mA
±6
Guaranteed monotonic
±0.75
Code = 030h
Offset Temperature Coefficent
Gain Error
GE
Gain Temperature Coefficient
Bits
IOUT_ = 1.2mA
Measured from code
030h to 3FFh
LSB
0.05
LSB/°C
IOUT = 1.2mA
±0.1
±3
±0.1
±5.5
IOUT_ = 1.2mA
15
IOUT_ = 3.6mA
25
VDD = +2.7V to +5.25V
Output Crosstalk
OUTA = midscale, OUTB switching from
030h to 3FFh
LSB
±4
IOUT = 3.6mA
Line Regulation
LSB
%
ppm/°C
0.8
54
LSB/V
dB
REFERENCE
Internal-Reference Voltage
VREF
TA = +25°C
2.48
2.5
2.52
V
Internal-Reference Temperature
Coefficient
(Note 3)
4
35
ppm/°C
Internal-Reference Load
Regulation
0µA < IREF < +300µA
1
3.5
Ω
Internal-Reference Power-Up
Time
CREF = 1µF, to 0.05%
0.55
ms
Internal-Reference Sink Current
50
µA
Internal-Reference Source
Current
300
µA
REF Capacitive Load
(Note 3)
Reference Line Regulation
VDD = +2.7V to +5.25V
25
f = 0.1Hz to 10Hz
10
f = 10Hz to 10kHz
27
Internal-Reference Noise
External-Reference Range
2
VREF
0.1
10.0
2.45
_______________________________________________________________________________________
µF
µV/V
µVRMS
2.55
V
Dual, 10-Bit, Current-Sink Output DAC
(VDD = +2.7 to +5.25V, GND = 0, external reference = +2.5V, output voltage = +2.0V, TA = -40°C to +85°C. Typical values are at
VDD = +3.0V, and TA = +25°C.) (Note 1)
PARAMETER
External-Reference Input
Impedance
SYMBOL
CONDITIONS
MIN
RREF
TYP
MAX
90
UNITS
kΩ
DAC OUTPUTS
Output Current (Note 4)
IOUT_
LSB Size
Current-Source Compliance
Voltage Range
1.2mA low-current
range
Code = 030h
3.6mA high-current
range
Code = 030h
Code = 3FFh
Code = 3FFh
1170
1200
1230
150
3400
3600
1.2mA full-scale current
1.17
3.6mA full-scale current
3.52
IOUT_ = full-scale (Note 5)
Output Impedance at Full-Scale
Current
50
0.8
3800
µA
VDD
IOUT_ = 1.2mA
800
IOUT_ = 3.6mA
180
µA
V
kΩ
DYNAMIC PERFORMANCE
Settling Time
tS
To 1% (Note 6)
10
µs
f = 0.1Hz to 10Hz
0.05
f = 10Hz to 10kHz
0.35
Supply Feedthrough
100mV, 1kHz signal added to VDD
0.85
LSB/V
Digital Feedthrough
RLOAD = 500Ω, CLOAD = 100pF
2
pA·s
Digital-to-Analog Glitch Impulse
RLOAD = 500Ω, CLOAD = 100pF
16
pA·s
2
%
Output Noise
IRMS
DAC-to-DAC Full-Scale Current
Matching
LSBRMS
POWER SUPPLIES
Supply Voltage
VDD
Supply Current
IDD
+2.70
VDD = +5.25V, no load,
SCLK not switching
Internal reference
mode
External reference
mode
+5.25
1.1
2
0.75
1.5
V
mA
LOGIC AND CONTROL INPUTS
Input High Voltage
VIH
(Note 7)
Input Low Voltage
VIL
(Note 7)
0.7 x
VDD
V
0.8
VHYS
0.05 x
VDD
Input Capacitance
CIN
10
Input Leakage Current
IIN
Input Hysteresis
V
V
pF
±1
µA
_______________________________________________________________________________________
3
MAX5547
ELECTRICAL CHARACTERISTICS (continued)
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7 to +5.25V, GND = 0, external reference = +2.5V, output voltage = +2.0V, TA = -40°C to +85°C. Typical values are at
VDD = +3.0V, and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI TIMING CHARACTERISTICS (see Figure 1)
SCLK Clock Period
tCP
100
ns
SCLK Pulse-Width High
tCH
40
ns
SCLK Pulse-Width Low
tCL
40
ns
CS Fall to SCLK Fall Setup Time
tCSS
25
ns
SCLK Fall to CS Rise Hold Time
tCSH
50
ns
tDS
40
ns
DIN to SCLK Fall Setup Time
DIN to SCLK Fall Hold Time
CS Pulse-Width High
tDH
0
ns
tCSW
100
ns
Devices are 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design.
INL linearity is from code 48 to code 1023.
Guaranteed by design. Not production tested.
The DACs continue to operate at currents lower than 50µA on the 1.2mA range and 150µA on the 3.6mA range. However,
performance is not guaranteed at these low currents. A code of all zeros has a nominal output current of 0µA.
Note 5: Compliance voltage range is defined as the range where the output current is -2 LSB of its value at VOUT = +1V.
Note 6: Settling time is measured from 0.25 x full scale to 0.75 x full scale.
Note 7: The device draws higher supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (GND +
0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics.
Note 1:
Note 2:
Note 3:
Note 4:
Typical Operating Characteristics
(VDD = +3.0V, GND = 0, external reference = +2.5V, TA = +25°C, unless otherwise noted.)
DIFFERENTIAL NONLINEARITY
vs. DIGITAL INPUT CODE (1.2mA SETTING)
1.00
MAX5547 toc02
3
3
0.75
0.50
1
1
0.25
0
DNL (LSB)
2
INL (LSB)
2
0
0
-1
-1
-0.25
-2
-2
-0.50
-3
-3
-0.75
-4
-4
0
256
512
768
DIGITAL INPUT CODE
4
4
MAX5547 toc01
4
INTEGRAL NONLINEARITY
vs. DIGITAL INPUT CODE (3.6mA SETTING)
1024
MAX5547 toc03
INTEGRAL NONLINEARITY
vs. DIGITAL INPUT CODE (1.2mA SETTING)
INL (LSB)
MAX5547
Dual, 10-Bit, Current-Sink Output DAC
-1.00
0
256
512
768
DIGITAL INPUT CODE
1024
0
256
512
768
DIGITAL INPUT CODE
_______________________________________________________________________________________
1024
Dual, 10-Bit, Current-Sink Output DAC
DIFFERENTIAL NONLINEARITY
vs. DIGITAL INPUT CODE (3.6mA SETTING)
0
DNL (LSB)
0.4
0.25
4
-0.25
2
0.1
-0.75
0
0
512
768
1024
-40
-15
DIGITAL INPUT CODE
60
10
1.206
1.204
1.202
1.200
1.196
35
60
85
-15
10
35
60
TEMPERATURE (°C)
INTERNAL REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
INTERNAL REFERENCE
VOLTAGE vs. TEMPERATURE
2.4954
2.4952
2.5
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE (V)
5.0
5.5
3.60
-40
-15
10
35
60
85
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5547 toc11
502
EXTERNAL REFERENCE = 2.5V,
CS = SCLK = DIN = GND
500
2.4935
498
2.4930
496
494
2.4925
492
490
2.4920
2.4950
3.65
85
IDD (µA)
2.4956
3.70
TEMPERATURE (°C)
2.4940
INTERNAL REFERENCE VOLTAGE (V)
MAX5547 toc10
2.4958
3.75
3.50
-40
TEMPERATURE (°C)
2.4960
85
3.55
1.198
10
60
3.80
1.2mA FULL SCALE
-15
35
FULL-SCALE SINK CURRENT
vs. TEMPERATURE (3.6mA SETTING)
MAX5547 toc08
1.208
0
10
TEMPERATURE (°C)
1.210
FULL-SCALE CURRENT (mA)
3.6mA FULL SCALE
-40
-15
-40
85
FULL-SCALE SINK CURRENT
vs. TEMPERATURE (1.2mA SETTING)
MAX5547 toc07
20
5
35
TEMPERATURE (°C)
ZERO-SCALE SINK CURRENT
vs. TEMPERATURE
15
10
MAX5547 toc09
256
FULL-SCALE CURRENT (mA)
0
MAX5547 toc12
-1.00
ZERO-SCALE CURRENT (µA)
0.3
0.2
-0.50
INTERNAL REFERENCE VOLTAGE (V)
MAX5547 toc06
0.5
6
INL (LSB)
DNL (LSB)
0.50
0.6
MAX5547 toc05
0.75
MAXIMUM DIFFERENTIAL NONLINEARITY
vs. TEMPERATURE (3.6mA SETTING)
8
MAX5547 toc04
1.00
MAXIMUM INTEGRAL NONLINEARITY
vs. TEMPERATURE (3.6mA SETTING)
-40
-15
10
35
TEMPERATURE (°C)
60
85
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
MAX5547
Typical Operating Characteristics (continued)
(VDD = +3.0V, GND = 0, external reference = +2.5V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = +3.0V, GND = 0, external reference = +2.5V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. TEMPERATURE
VDD = 5.25V
1.215
TA = +85°C
1.0
1.11
INTERNAL REFERENCE
1.10
1.210
IOUT_ (mA)
IDD (mA)
IDD (mA)
1.220
MAX5547 toc14
INTERNAL REFERENCE,
CS = SCLK = DIN = GND
IOUT vs. VOUT (1.2mA SETTING)
1.2
MAX5547 toc13
1.12
MAX5547 toc15
SUPPLY CURRENT vs. SUPPLY VOLTAGE
0.8
1.205
TA = -40°C
1.200
EXTERNAL REFERENCE
0.6
1.09
TA = +25°C
1.195
1.190
0.4
2.5
3.5
4.0
4.5
5.0
-40
5.5
-15
10
35
60
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
IOUT vs. VOUT (3.6mA SETTING)
SUPPLY CURRENT vs. DIGITAL
INPUT VOLTAGE
TA = +85°C
3.75
IDD (µA)
TA = +25°C
1000
3.60
3.55
0
1
2
3
4
5
1
0.02
2
3
4
5
6
0.01
0.1
10
1
FREQUENCY (kHz)
SETTLING TIME
(FULL-SCALE POSITIVE STEP)
(IOUT = 1.2mA)
SETTLING TIME
(FULL-SCALE POSITIVE STEP)
(IOUT = 3.6mA)
SETTLING TIME
(FULL-SCALE NEGATIVE STEP)
(IOUT = 1.2mA)
16
VPULLUP = 3V, ROUT = 500Ω, COUT = 10pF
1.00µs/div
6
0.04
DIGITAL INPUT VOLTAGE (V)
MAX5547 toc20
SCLK
2V/div
GND
6
0.06
OUTPUT VOLTAGE (V)
MAX5547 toc19
15
5
0
0
6
4
0.08
100
3.50
3
0.10
VDD = 3V
TA = -40°C
2
OUTPUT NOISE vs. FREQUENCY
VDD = 5.25V
3.65
1
OUTPUT VOLTAGE (V)
CS, DIN, SCLK SHORTED TOGETHER
3.70
0
NOISE (LSBRMS/√Hz)
VDD = 5.25V
10,000
85
MAX5547 toc17
MAX5547 toc16
3.80
3.0
MAX5547 toc18
1.08
IOUT_ (mA)
MAX5547
Dual, 10-Bit, Current-Sink Output DAC
15
MAX5547 toc21
SCLK
2V/div
GND
16
3V
3V
OUT_
500mV/div
OUT_
500mV/div
VPULLUP = 3V,
ROUT = 500Ω,
COUT = 10pF
15
SCLK
2V/div
GND
16
3V
OUT_
500mV/div
VPULLUP = 3V,
ROUT = 500Ω,
COUT = 10pF
1.00µs/div
1.00µs/div
_______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC
SETTLING TIME
(FULL-SCALE NEGATIVE STEP)
(IOUT = 3.6mA)
SETTLING TIME
(HALF-SCALE POSITIVE STEP)
(IOUT = 1.2mA)
MAX5547 toc22
15
MAX5547 toc23
SCLK
2V/div
GND
16
SETTLING TIME
(HALF-SCALE NEGATIVE STEP)
(IOUT = 1.2mA)
SCLK
2V/div
GND
16
15
MAX5547 toc24
SCLK
2V/div
GND
16
15
MAX5547
Typical Operating Characteristics (continued)
(VDD = +3.0V, GND = 0, external reference = +2.5V, TA = +25°C, unless otherwise noted.)
3V
VPULLUP = 3V,
ROUT = 500Ω,
COUT = 10pF
OUT_
200mV/div
OUT_
200mV/div
OUT_
500mV/div
VPULLUP = 3V, ROUT = 500Ω,
COUT = 10pF, CODE = 0.25 x FS TO 0.75 x FS
1.00µs/div
VPULLUP = 3V, ROUT = 500Ω, COUT = 10pF,
CODE = 0.75 x FS TO 0.25 x FS
1.00µs/div
GLITCH IMPULSE
(MAJOR CARRY TRANSITION)
(IOUT = 3.6mA)
SUPPLY FEEDTHROUGH
vs. TEMPERATURE
MAX5547 toc25
0.5
TWO TYPICAL PARTS, IFS = 1.2mA, VDD = 5V,
100mV, 1kHz SIGNAL ADDED TO VDD
SCLK
2V/div
GND
14 15 16
REF
1V/div
GND
CREF = 1µF
SUPPLY FEEDTHROUGH (LSB/V)
0.4
0.3
MAX5547 toc27
MAX5547 toc26
INTERNAL REFERENCE
POWER-UP
1.00µs/div
0.2
0.1
OUT_
AC-COUPLED
2mV/div
0
-0.1
-0.2
VPULLUP = 3V,
ROUT = 500Ω,
COUT = 100pF,
CODE = 1FFh TO 200h
-0.3
-0.4
-0.5
-40
100µs/div
-15
10
35
60
10µs/div
85
TEMPERATURE (°C)
INTERNAL REFERENCE NOISE
(0.1Hz TO 10Hz)
OUTPUT NOISE
(0.1Hz TO 10Hz)
MAX5547 toc28
MAX5547 toc29
500Ω TO 3V
3.6mA RANGE
CODE = 3FFh
REF
20µV/div
1.00s/div
OUT_
50µV/div
1.00s/div
_______________________________________________________________________________________
7
Dual, 10-Bit, Current-Sink Output DAC
MAX5547
Pin Description
PIN
NAME
FUNCTION
1
VDD
Supply Voltage. Set VDD between +2.7V to +5.25V. Bypass VDD with a 0.1µF capacitor to GND, as close to
the device as possible.
2
CS
Active-Low Chip-Select Input. Set CS low to enable the serial interface.
3
SCLK
Serial-Clock Input
4
DIN
Serial-Data Input. DIN is clocked into the serial interface on the falling edge of SCLK.
5
GND
Ground
6
REF
External Reference Input/Internal Reference Output. When programmed for internal reference mode, REF is a
+2.5V output. When programmed for external reference mode, apply a voltage between +2.45V and +2.55V
(see Table 1). Connect a 1µF ceramic capacitor from REF to GND, as close to the device as possible.
7
OUTB
DAC B Current Output. OUTB sinks up to 3.6mA.
8
OUTA
DAC A Current Output. OUTA sinks up to 3.6mA.
—
EP
Exposed Pad. Connect to GND. Do not use as the ground connection.
Detailed Description
The MAX5547 10-bit, dual-range, current-sink DAC
operates with serial data clock rates up to 10MHz. The
double-buffered DAC input consists of a 16-bit input
register and two 10-bit DAC registers, followed by a
current-steering array (see the Functional Diagram).
The MAX5547 sinks full-scale output currents of 1.2mA
or 3.6mA per DAC. Each DAC’s full-scale current can
be independently programmed.
Operating from a single +2.7V to +5.25V supply, the
MAX5547 typically consumes 1mA. The MAX5547
operates from an internal +2.5V reference or an external reference in the +2.45V to +2.55V range.
The MAX5547 is ideal as the digital/analog interface for
laser-diode drivers with current-controlled inputs, such
as the MAX3736 (see the Typical Operating Circuit).
Set the current levels at the MAX3736’s MODSET and
BIASSET current-controlled inputs from the MAX5547’s
DAC outputs. The MAX3736’s MODSET and BIASSET
lines set the laser driver’s desired modulation and bias
currents.
Reference Architecture and Operation
The MAX5547 operates from an internal +2.5V reference or accepts an external reference voltage source
between +2.45V and +2.55V. The internal reference is
capable of sinking up to 50µA and sourcing up to
300µA. REF serves as the input for a low-impedance
8
reference source in external reference mode. Bypass
REF to GND with a ceramic capacitor in the 0.1µF to
10µF range, as close to the device as possible, in both
internal and external reference modes.
During startup, when power is first applied, the
MAX5547 defaults to external reference mode, and to
the 1.2mA full-scale current-range mode. Use software
commands to select internal reference mode and
3.6mA full-scale current-range mode (see Table 1).
DAC Data
The MAX5547‘s internal registers set the DAC full-scale
output currents (IFS) to 1.2mA or 3.6mA (see Table 1).
The 10-bit DAC data is decoded as straight binary,
with 1 LSB = IFS / 1023, and converted into the corresponding current as shown in Table 2.
Serial Interface
The MAX5547 operates through a 3-wire, 10MHz SPIcompatible serial interface. CS, SCLK, and DIN control
the serial interface timing and data. Ensure the SPI bus
master, typically a microcontroller (µC), runs in master
mode so that it generates the serial clock signal. Select
an SCLK frequency of 10MHz or less and set the clock
polarity (CPOL) and phase (CPHA) in the µC control
registers to opposite values. The MAX5547 operates
with SCLK idling high or low. Therefore, set CPOL = 0
and CPHA = 1, or CPOL = 1 and CPHA = 0.
_______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC
MAX5547
tCSW
CS
tCSS
SCLK
tCL
tCH
tCP
tCSH
tDS
tDH
DIN
C3
C2
S1
S0
Figure 1. SPI Serial-Interface Timing Diagram
Set CS low to begin clocking input data at DIN on the
falling edge of SCLK (see Figure 1). Serial communications to the shift register consist of a 16-bit command
word loaded from DIN. The first four control bits
(C3–C0) determine the target register (see Table 1).
The next 10 data bits set the current-sink level. D9 is
the MSB and D0 the LSB. Set bits S1 and S0 to zero for
proper operation. Data is latched into the appropriate
DAC register on the 16th SCLK falling edge. After writing 16 bits, drive CS high. Keep CS low throughout the
entire 16-bit word.
Write the command word to configure DAC registers A
and B individually or both registers at the same time.
The command word also determines whether the DACs
use the internal or external reference.
The MAX5547 powers up in external reference mode with
DAC registers A and B set to IFS = 1.2mA at code 000h.
Applications Information
Power Sequencing
Ensure the voltages applied at REF, OUTA, and OUTB
do not exceed V DD at any time. If proper power
sequencing is not possible, connect an external
Schottky diode between REF/OUTA/OUTB and VDD to
ensure compliance with the absolute maximum ratings.
Power-Supply Bypassing and Ground
Management
Digital or AC transient signals on GND create noise at
the analog output. Return GND to the highest quality
ground plane available. For extremely noisy environments, bypass both REF and VDD to GND with 10µF
and 0.1µF capacitors in parallel, with the 0.1µF capacitor as close to the device as possible. Careful PC
board ground layout minimizes crosstalk between the
DAC outputs and digital inputs.
_______________________________________________________________________________________
9
MAX5547
Dual, 10-Bit, Current-Sink Output DAC
Table 1. Command Word Summary
MSB
CONTROL BITS
C3
C2
C1
C0
D9
DATA BITS
D8
D7
D6
D5
D4
LSB
D3
D2
D1
D0
REGISTER FUNCTION
S1
S0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
0
0
External reference mode (default
state). Connect an external voltage
source at REF from +2.45V to
+2.55V.
1
0
0
0
X
X
X
X
X
X
X
X
X
X
0
0
Internal reference mode. Internal
reference is +2.5V.
0
0
1
0
10-bit data
0
0
Load DAC register A and set IOUTA
full-scale range to 1.2mA.
0
0
1
1
10-bit data
0
0
Load DAC register A and set IOUTA
full-scale range to 3.6mA.
0
1
0
0
10-bit data
0
0
Load DAC register B and set IOUTB
full-scale range to 1.2mA.
0
1
0
1
10-bit data
0
0
Load DAC register B and set IOUTB
full-scale range to 3.6mA.
0
1
1
0
10-bit data
0
0
Load DAC registers A and B and
set IOUTA and IOUTB full-scale
ranges to 1.2mA (default state).
0
1
1
1
10-bit data
0
0
Load DAC registers A and B and
set IOUTA and IOUTB ranges to
3.6mA.
X = Don’t care. Unused codes are reserved for factory use.
Table 2. Ideal DAC Output Code Table
BINARY DAC CODE
11 1111 1111
I
1023 × FS
1023
10 0000 0000
I
512 × FS
1023
00 0000 0001
00 0000 0000
10
IOUT_
Chip Information
PROCESS: BiCMOS
IFS
1023
0
______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC
+2.5V
+2.7V TO +5.25V
VDD
REF
+2.5V
REFERENCE
MAX5547
DAC A
DAC
REGISTER A
3.6mA/1.2mA
FULL-SCALE CURRENT
OUTA
RANGE
CONTROL
DACB
DAC
REGISTER B
3.6mA/1.2mA
FULL-SCALE CURRENT
OUTB
SERIAL INTERFACE
RANGE
CONTROL
GND
CS
DIN
SCLK
Pin Configuration
OUTA
OUTB
REF
GND
TOP VIEW
8
7
6
5
1
2
3
4
VDD
CS
SCLK
DIN
MAX5547
TDFN
______________________________________________________________________________________
11
MAX5547
Functional Diagram
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
6, 8, &10L, DFN THIN.EPS
MAX5547
Dual, 10-Bit, Current-Sink Output DAC
D2
D
A2
PIN 1 ID
N
0.35x0.35
b
PIN 1
INDEX
AREA
E
[(N/2)-1] x e
REF.
E2
DETAIL A
e
k
A1
CL
CL
A
L
L
e
e
PACKAGE OUTLINE, 6,8,10 & 14L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
-DRAWING NOT TO SCALE-
21-0137
G
1
2
COMMON DIMENSIONS
MIN.
MAX.
D
0.70
2.90
0.80
3.10
E
A1
2.90
0.00
3.10
0.05
L
k
0.20
0.40
0.25 MIN.
A2
0.20 REF.
SYMBOL
A
PACKAGE VARIATIONS
PKG. CODE
N
D2
E2
e
JEDEC SPEC
b
[(N/2)-1] x e
DOWNBONDS
ALLOWED
T633-1
6
1.50±0.10
2.30±0.10
0.95 BSC
MO229 / WEEA
0.40±0.05
1.90 REF
NO
T633-2
6
1.50±0.10
2.30±0.10
0.95 BSC
MO229 / WEEA
0.40±0.05
1.90 REF
NO
T833-1
8
1.50±0.10
2.30±0.10
0.65 BSC
MO229 / WEEC
0.30±0.05
1.95 REF
NO
T833-2
8
1.50±0.10
2.30±0.10
0.65 BSC
MO229 / WEEC
0.30±0.05
1.95 REF
NO
T833-3
8
1.50±0.10
2.30±0.10
0.65 BSC
MO229 / WEEC
0.30±0.05
1.95 REF
YES
T1033-1
10
1.50±0.10
2.30±0.10
0.50 BSC
MO229 / WEED-3
0.25±0.05
2.00 REF
NO
T1433-1
14
1.70±0.10
2.30±0.10
0.40 BSC
----
0.20±0.05
2.40 REF
YES
T1433-2
14
1.70±0.10
2.30±0.10
0.40 BSC
----
0.20±0.05
2.40 REF
NO
PACKAGE OUTLINE, 6,8,10 & 14L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
-DRAWING NOT TO SCALE-
21-0137
G
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products
Boblet
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.