TAOS Inc. is now ams AG The technical content of this TAOS datasheet is still valid. Contact information: Headquarters: ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 e-Mail: [email protected] Please visit our website at www.ams.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER r r TAOS135 − AUGUST 2012 PACKAGE FN DUAL FLAT NO-LEAD (TOP VIEW) D Red, Green, Blue (RGB), and Clear Light D D D SCL 2 5 INT GND 3 4 NC Package Drawing Not to Scale Applications D RGB LED Backlight Control D Light Color Temperature Measurement D Ambient Light Sensing for Display D D Backlight Control Fluid and Gas Analysis Product Color Verification and Sorting End Products and Market Segments D TVs, Mobile Handsets, Tablets, Computers, D D D D Description 6 SDA lv D VDD 1 am lc s on A te G nt st il D Sensing with IR Blocking Filter − Programmable Analog Gain and Integration Time − 3,800,000:1 Dynamic Range − Very High Sensitivity — Ideally Suited for Operation Behind Dark Glass Maskable Interrupt − Programmable Upper and Lower Thresholds with Persistence Filter Power Management − Low Power — 2.5-mA Sleep State − 65-mA Wait State with Programmable Wait State Time from 2.4 ms to > 7 Seconds 2 I C Fast Mode Compatible Interface − Data Rates up to 400 kbit/s − Input Voltage Levels Compatible with VDD or 1.8 V Bus Register Set and Pin Compatible with the TCS3x71 Series Small 2 mm 2.4 mm Dual Flat No-Lead (FN) Package al id Features and Monitors Consumer and Commercial Printing Medical and Health Fitness Solid State Lighting (SSL) and Digital Signage Industrial Automation ni ca The TCS3472 device provides a digital return of red, green, blue (RGB), and clear light sensing values. An IR blocking filter, integrated on-chip and localized to the color sensing photodiodes, minimizes the IR spectral component of the incoming light and allows color measurements to be made accurately. The high sensitivity, wide dynamic range, and IR blocking filter make the TCS3472 an ideal color sensor solution for use under varying lighting conditions and through attenuating materials. Te ch The TCS3472 color sensor has a wide range of applications including RGB LED backlight control, solid-state lighting, health/fitness products, industrial process controls and medical diagnostic equipment. In addition, the IR blocking filter enables the TCS3472 to perform ambient light sensing (ALS). Ambient light sensing is widely used in display-based products such as cell phones, notebooks, and TVs to sense the lighting environment and enable automatic display brightness for optimal viewing and power savings. The TCS3472, itself, can enter a lower-power wait state between light sensing measurements to further reduce the average power consumption. The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r Texas Advanced Optoelectronic Solutions Inc. 1001 Klein Road S Suite 300 S Plano, TX 75074 S (972) r 673-0759 www.taosinc.com 1 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Functional Block Diagram Interrupt Wait Control RGBC Control Clear Red Green Clear ADC Clear Data Red ADC Red Data Green ADC Green Data Blue ADC Blue Data Upper Limit Lower Limit SDA Blue am lc s on A te G nt st il Detailed Description lv GND SCL al id VDD INT I2C Interface IR-Blocking Filter The TCS3472 light-to-digital converter contains a 3 × 4 photodiode array, four analog-to-digital converters (ADC) that integrate the photodiode current, data registers, a state machine, and an I2C interface. The 3 × 4 photodiode array is composed of red-filtered, green-filtered, blue-filtered, and clear (unfiltered) photodiodes. In addition, the photodiodes are coated with an IR-blocking filter. The four integrating ADCs simultaneously convert the amplified photodiode currents to a 16-bit digital value. Upon completion of a conversion cycle, the results are transferred to the data registers, which are double-buffered to ensure the integrity of the data. All of the internal timing, as well as the low-power wait state, is controlled by the state machine. Communication of the TCS3472 data is accomplished over a fast, up to 400 kHz, two-wire I2C serial bus. The industry standard I2C bus facilitates easy, direct connection to microcontrollers and embedded processors. Te ch ni ca In addition to the I2C bus, the TCS3472 provides a separate interrupt signal output. When interrupts are enabled, and user-defined thresholds are exceeded, the active-low interrupt is asserted and remains asserted until it is cleared by the controller. This interrupt feature simplifies and improves the efficiency of the system software by eliminating the need to poll the TCS3472. The user can define the upper and lower interrupt thresholds and apply an interrupt persistence filter. The interrupt persistence filter allows the user to define the number of consecutive out-of-threshold events necessary before generating an interrupt. The interrupt output is open-drain, so it can be wire-ORed with other devices. Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 2 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Terminal Functions TERMINAL NO. TYPE DESCRIPTION GND 3 Power supply ground. All voltages are referenced to GND. INT 5 O Interrupt — open drain (active low). NC 4 O No connect — do not connect. SCL 2 I I2C serial clock input terminal — clock signal for I2C serial data. SDA 6 I/O VDD 1 I2C serial data I/O terminal — serial data I/O for I2C . al id NAME Supply voltage. Available Options 0x39 PACKAGE − LEADS INTERFACE DESCRIPTION FN−6 I2C Vbus = VDD Interface TCS34723† 0x39 FN−6 I2C TCS34725 0x29 FN−6 I2C Vbus = VDD Interface TCS34727 0x29 FN−6 I2C Vbus = 1.8 V Interface Vbus = 1.8 V Interface ORDERING NUMBER lv ADDRESS TCS34721FN TCS34723FN TCS34725FN am lc s on A te G nt st il † DEVICE TCS34721† TCS34727FN Contact TAOS for availability. Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 V Input terminal voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.8 V Output terminal voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.8 V Output terminal current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1 mA to 20 mA Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C ESD tolerance, human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000 V † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to GND. ca Recommended Operating Conditions ni Supply voltage, VDD (TCS34721 & TCS34725) (I2C Vbus = VDD) Supply voltage, VDD (TCS34723 & TCS34727) (I2C Vbus = 1.8 V) NOM MAX 2.7 3 3.6 2.7 3 3.3 V 70 °C −30 UNIT V Te ch Operating free-air temperature, TA MIN The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 3 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Operating Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN Active Supply current VOL INT SDA output low voltage INT, I LEAK Leakage current, SDA, SCL, INT pins I LEAK Leakage current, LDR pin VIH SCL SDA input high voltage SCL, VIL SCL SDA input low voltage SCL, MAX 235 330 Wait state 65 Sleep state — no I2C activity 2.5 UNIT μA 10 3 mA sink current 0 0.4 6 mA sink current 0 0.6 −5 5 μA 5 μA −5 TCS34721 & TCS34725 0.7 VDD TCS34723 & TCS34727 1.25 V al id IDD TYP V 0.3 VDD TCS34721 & TCS34725 V 0.54 lv TCS34723 & TCS34727 PARAMETER Irradiance responsivity Red Channel TEST CONDITIONS λD = 465 nm Note 2 Re am lc s on A te G nt st il Optical Characteristics, VDD = 3 V, TA = 25C, AGAIN = 16, ATIME = 0xF6 (unless otherwise noted) (Note 1) λD = 525 nm Note 3 λD = 615 nm Note 4 MIN TYP Green Channel MAX MIN 0% 15% 4% 80% TYP Blue Channel MAX MIN 10% 42% 25% 60% 110% 0% TYP Clear Channel MAX MIN TYP MAX 65% 88% 11.0 13.8 16.6 85% 10% 45% 13.2 16.6 20.0 14% 5% 24% 15.6 19.5 23.4 UNIT counts/ μW/ cm2 NOTES: 1. The percentage shown represents the ratio of the respective red, green, or blue channel value to the clear channel value. 2. The 465 nm input irradiance is supplied by an InGaN light-emitting diode with the following characteristics: dominant wavelength λD = 465 nm, spectral halfwidth Δλ½ = 22 nm. 3. The 525 nm input irradiance is supplied by an InGaN light-emitting diode with the following characteristics: dominant wavelength λD = 525 nm, spectral halfwidth Δλ½ = 35 nm. 4. The 615 nm input irradiance is supplied by a AlInGaP light-emitting diode with the following characteristics: dominant wavelength λD = 615 nm, spectral halfwidth Δλ½ = 15 nm. RGBC Characteristics, VDD = 3 V, TA = 25C, AGAIN = 16, AEN = 1 (unless otherwise noted) TEST CONDITIONS ca PARAMETER Dark ADC count value ADC integration time step size Ee = 0, AGAIN = 60×, ATIME = 0xD6 (100 ms) ATIME = 0xFF ADC number of integration steps (Note 5) ni ch G i scaling, Gain li relative l ti to t 1× gain i setting TYP MAX UNIT 0 1 5 counts 2.27 2.4 2.56 ms 256 steps 0 1024 counts 0 65535 counts 1 ADC counts per step (Note 5) ADC count value (Note 5) MIN ATIME = 0xC0 (153.6 ms) 4× 3.8 4 4.2 16× 15 16 16.8 16 8 58 60 63 60× Te NOTE 5: Parameter ensured by design and is not tested. Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 4 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Wait Characteristics, VDD = 3 V, TA = 25C, WEN = 1 (unless otherwise noted) PARAMETER TEST CONDITIONS Wait step size CHANNEL WTIME = 0xFF Wait number of integration steps (Note 1) MIN TYP MAX 2.27 2.4 2.56 ms 256 steps 1 UNIT AC Electrical Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted) PARAMETER† TEST CONDITIONS MIN Clock frequency t(BUF) Bus free time between start and stop condition only) 1.3 0 t(HDSTA) Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 t(SUSTA) Repeated start condition setup time t(SUSTO) Stop condition setup time t(HDDAT) Data hold time t(SUDAT) MAX UNIT 400 kHz μs μs lv f(SCL) TYP 0.6 μs 0.6 μs 0 μs Data setup time 100 ns t(LOW) SCL clock low period 1.3 μs t(HIGH) SCL clock high period 0.6 μs tF Clock/data fall time 300 ns tR Clock/data rise time 300 ns Ci Input pin capacitance 10 pF am lc s on A te G nt st il † (I2C al id NOTE 1: Parameter ensured by design and is not tested. Specified by design and characterization; not production tested. PARAMETER MEASUREMENT INFORMATION t(LOW) VIH SCL VIL t(R) t(F) t(HIGH) ca t(HDSTA) t(BUF) t(HDDAT) t(SUSTA) t(SUSTO) t(SUDAT) VIH SDA ni VIL P S S P Start Condition ch Stop Condition Te Figure 1. Timing Diagrams The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 5 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 TYPICAL CHARACTERISTICS NORMALIZED RESPONSIVITY vs. ANGULAR DISPLACEMENT PHOTODIODE SPECTRAL RESPONSIVITY RGBC 1 1.0 Clear Normalized to Clear @ 755 nm 0.9 0.5 0.4 Blue 0.3 0.6 0.4 0.2 0.2 0.1 0 300 500 700 900 λ − Wavelength − nm 0 −90 1100 -Q RESPONSIVITY TEMPERATURE COEFFICIENT 10,000 106% ca 104% Temperature Coefficient — ppm/ C 75C 108% 25C 102% 50C ni 100% 0C ch 98% 90 Figure 3 NORMALIZED IDD vs. VDD and TEMPERATURE 110% +Q −60 −30 0 30 60 Q − Angular Displacement − ° Figure 2 IDD Normalized @ 3 V, 25C al id Green lv Red 0.6 Optical Axis 0.7 am lc s on A te G nt st il Relative Responsivity TA = 25°C Normalized Responsivity 0.8 0.8 96% 1000 94% Te 92% 2.7 2.8 Copyright E 2012, TAOS Inc. 2.9 3 3.1 3.2 3.3 100 400 600 500 800 900 1000 λ − Wavelength − nm VDD — V Figure 4 Figure 5 The LUMENOLOGY r Company r r 6 700 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 PRINCIPLES OF OPERATION System States An internal state machine provides system control of the RGBC and power management features of the device. At power up, an internal power-on-reset initializes the device and puts it in a low-power Sleep state. al id When a start condition is detected on the I2C bus, the device transitions to the Idle state where it checks the Enable Register (0x00) PON bit. If PON is disabled, the device will return to the Sleep state to save power. Otherwise, the device will remain in the Idle state until the RGBC function is enabled (AEN). Once enabled, the device will execute the Wait and RGBC states in sequence as indicated in Figure 5. Upon completion and return to Idle, the device will automatically begin a new Wait-RGBC cycle as long as PON and AEN remain enabled. Sleep lv I2C Start !PON am lc s on A te G nt st il Idle WEN & AEN !WEN & AEN Wait RGBC Te ch ni ca Figure 6. Simplified State Diagram The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 7 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 RGBC Operation ATIME(r0x0 1) 2.4 ms to 614 ms al id The RGBC engine contains RGBC gain control (AGAIN) and four integrating analog-to-digital converters (ADC) for the RGBC photodiodes. The RGBC integration time (ATIME) impacts both the resolution and the sensitivity of the RGBC reading. Integration of all four channels occurs simultaneously and upon completion of the conversion cycle, the results are transferred to the color data registers. This data is also referred to as channel count. The transfers are double-buffered to ensure that invalid data is not read during the transfer. After the transfer, the device automatically moves to the next state in accordance with the configured state machine. AGAIN(r 0x0F, b1:0) 1, 4, 16, 60 Gain Clear lv RGBC Control Clear ADC Clear Data CDATAH(r 0x15), CDATA(r 0x14) Red ADC Red Data RDATAH(r 0x17), RDATA(r 0x16) Green ADC Green Data GDATAH(r 0x19), GDATA(r 0x18) Blue ADC Blue Data BDATAH(r 0x1B), BDATA(r 0x1A) am lc s on A te G nt st il Red Green Blue Figure 7. RGBC Operation NOTE: In this document, the nomenclature uses the bit field name in italics followed by the register address and bit number to allow the user to easily identify the register and bit that controls the function. For example, the power on (PON) is in register 0x00, bit 0. This is represented as PON (r0x00:b0). The registers for programming the integration and wait times are a 2’s compliment values. The actual time can be calculated as follows: ATIME = 256 − Integration Time / 2.4 ms Inversely, the time can be calculated from the register value as follows: Integration Time = 2.4 ms × (256 − ATIME) ca For example, if a 100-ms integration time is needed, the device needs to be programmed to: 256 − (100 / 2.4) = 256 − 42 = 214 = 0xD6 Te ch ni Conversely, the programmed value of 0xC0 would correspond to: (256 − 0xC0) × 2.4 = 64 × 2.4 = 154 ms. Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 8 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Interrupts The interrupt feature simplifies and improves system efficiency by eliminating the need to poll the sensor for light intensity values outside of a user-defined range. While the interrupt function is always enabled and its status is available in the status register (0x13), the output of the interrupt state can be enabled using the RGBC interrupt enable (AIEN) field in the enable register (0x00). al id Two 16-bit interrupt threshold registers allow the user to set limits below and above a desired light level. An interrupt can be generated when the Clear data (CDATA) is less than the Clear interrupt low threshold (AILTx) or is greater than the Clear interrupt high threshold (AIHTx). It is important to note that the thresholds are evaluated in sequence, first the low threshold, then the high threshold. As a result, if the low threshold is set above the high threshold, the high threshold is ignored and only the low threshold is evaluated. am lc s on A te G nt st il lv To further control when an interrupt occurs, the device provides a persistence filter. The persistence filter allows the user to specify the number of consecutive out-of-range Clear occurrences before an interrupt is generated. The persistence filter register (0x0C) allows the user to set the Clear persistence filter (APERS) value. See the persistence filter register for details on the persistence filter value. Once the persistence filter generates an interrupt, it will continue until a special function interrupt clear command is received (see command register). AIHTH(r0x 07), AIHTL(r0x 06) Upper Limit Clear ADC APERS(r 0x0C, b3:0) Clear Persistence Clear Data Lower Limit Clear AILTH(r 0x05), AILTL(r0x 04) Te ch ni ca Figure 8. Programmable Interrupt The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 9 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 System Timing The system state machine shown in Figure 5 provides an overview of the states and state transitions that provide system control of the device. This section highlights the programmable features, which affect the state machine cycle time, and provides details to determine system level timing. al id When the power management feature is enabled (WEN), the state machine will transition to the Wait state. The wait time is determined by WLONG, which extends normal operation by 12× when asserted, and WTIME. The formula to determine the wait time is given in the box associated with the Wait state in Figure 9. lv When the RGBC feature is enabled (AEN), the state machine will transition through the RGBC Init and RGBC ADC states. The RGBC Init state takes 2.4 ms, while the RGBC ADC time is dependent on the integration time (ATIME). The formula to determine RGBC ADC time is given in the associated box in Figure 9. If an interrupt is generated as a result of the RGBC cycle, it will be asserted at the end of the RGBC ADC. Sleep am lc s on A te G nt st il !PON I2C Start (Note 1) RGBC Idle RGBC ADC WEN & AEN !WEN & AEN RGBC Init Wait Time: 2.4 ms WTIME: 1 ~ 256 steps WLONG = 0 WLONG = 1 2.4 ms/step 28.8 ms/step 2.4 ms ~ 614 ms 28.8 ms ~ 7.37s ca Time: Range: ATIME: 1 ~ 256 steps Time: 2.4 ms/step Range: 2.4 ms ~ 614 ms Notes: 1. There is a 2.4 ms warm-up delay if PON is enabled. If PON is not enabled, the device will return to the Sleep state as shown. 2. PON, WEN, and AEN are fields in the Enable register (0x00). Te ch ni Figure 9. Detailed State Diagram Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 10 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Power Management Power consumption can be managed with the Wait state, because the Wait state typically consumes only 65 μA of IDD current. An example of the power management feature is given below. With the assumptions provided in the example, average IDD is estimated to be 152 μA. Table 1. Power Management PROGRAMMABLE PARAMETER PROGRAMMED VALUE Wait WTIME 0xEE WLONG 0 ATIME 0xEE DURATION 43 2 ms 43.2 RGBC Init 2.40 ms 43.2 ms 0 065 mA 0.065 0.235 mA 0.235 mA lv RGBC ADC TYPICAL CURRENT al id SYSTEM STATE MACHINE STATE Average IDD Current = ((43.2 × 0.065) + (43.2 × 0.235) + (2.40 × 0.235)) / 89 152 μA am lc s on A te G nt st il Keeping with the same programmed values as the example, Table 2 shows how the average IDD current is affected by the Wait state time, which is determined by WEN, WTIME, and WLONG. Note that the worst-case current occurs when the Wait state is not enabled. Table 2. Average IDD Current WEN 0 1 1 1 WLONG WAIT STATE AVERAGE IDD CURRENT n/a n/a 0 ms 291 μA 0xFF 0 2.40 ms 280 μA 0xEE 0 43.2 ms 152 μA 0x00 0 614 ms 82 μA 0x00 1 7.37 s 67 μA Te ch ni ca 1 WTIME The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 11 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 I2C Protocol Interface and control are accomplished through an I2C serial compatible interface (standard or fast mode) to a set of registers that provide access to device control functions and output data. The devices support the 7-bit I2C addressing protocol. al id The I2C standard provides for three types of bus transaction: read, write, and a combined protocol (Figure 10). During a write operation, the first byte written is a command byte followed by data. In a combined protocol, the first byte written is the command byte followed by reading a series of bytes. If a read command is issued, the register address from the previous command will be used for data access. Likewise, if the MSB of the command is not set, the device will write a series of bytes at the address stored in the last valid command with a register address. The command byte contains either control information or a 5-bit register address. The control commands can also be used to clear interrupts. ... Acknowledge (0) Not Acknowledged (1) Stop Condition Read (1) Start Condition Repeated Start Condition Write (0) Continuation of protocol Master-to-Slave Slave-to-Master 1 am lc s on A te G nt st il A N P R S Sr W lv The I2C bus protocol was developed by Philips (now NXP). For a complete description of the I2C protocol, please review the NXP I2C design specification at http://www.i2c−bus.org/references/. 7 S 1 Slave Address W 1 8 A 1 Command Code 8 A 1 Data Byte A 8 1 1 ... P I2C Write Protocol 1 7 S 1 Slave Address R 1 8 A 1 Data A Data 1 ... A P I2C Read Protocol 1 S Slave Address W 1 8 1 1 7 1 1 Command Code A Sr Slave Address R A ca 7 A 8 1 Data A 8 Data 1 A 1 ... P I2C Read Protocol — Combined Format Figure 10. I2C Protocols Te ch ni 1 Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 12 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Register Set The TCS3472 is controlled and monitored by data registers and a command register accessed through the serial interface. These registers provide for a variety of control functions and can be read to determine results of the ADC conversions. The register set is summarized in Table 3. Table 3. Register Address ADDRESS RESISTER NAME R/W −− COMMAND W REGISTER FUNCTION 0x00 ENABLE R/W Enables states and interrupts 0x01 ATIME R/W RGBC time 0x03 WTIME R/W Wait time 0x04 AILTL R/W Clear interrupt low threshold low byte 0x05 AILTH R/W Clear interrupt low threshold high byte 0x06 AIHTL R/W Clear interrupt high threshold low byte RESET VALUE 0x00 al id Specifies register address 0x00 0xFF 0xFF 0x00 lv 0x00 0x00 AIHTH R/W Clear interrupt high threshold high byte PERS R/W Interrupt persistence filter 0x00 0x0D CONFIG R/W Configuration 0x00 0x0F CONTROL R/W Control 0x00 0x12 ID R Device ID 0x13 STATUS R Device status 0x00 0x14 CDATAL R Clear data low byte 0x00 0x15 CDATAH R Clear data high byte 0x00 0x16 RDATAL R Red data low byte 0x00 0x17 RDATAH R Red data high byte 0x00 0x18 GDATAL R Green data low byte 0x00 0x19 GDATAH R Green data high byte 0x00 0x1A BDATAL R Blue data low byte 0x00 0x1B BDATAH R Blue data high byte 0x00 am lc s on A te G nt st il 0x07 0x0C 0x00 ID Te ch ni ca The mechanics of accessing a specific register depends on the specific protocol used. See the section on I2C protocols on the previous pages. In general, the COMMAND register is written first to specify the specific control-status-data register for subsequent read/write operations. The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 13 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Command Register The command register specifies the address of the target register for future write and read operations. Table 4. Command Register 4 3 TYPE FIELD BITS CMD 7 TYPE 6:5 2 1 0 −− ADDR/SF DESCRIPTION Select Command Register. Must write as 1 when addressing COMMAND register. Selects type of transaction to follow in subsequent data transfers: FIELD VALUE INTEGRATION TIME 00 Repeated byte protocol transaction 01 Auto-increment protocol transaction 10 Reserved — Do not use 11 Special function — See description below al id CMD 5 am lc s on A te G nt st il COMMAND 6 lv 7 Byte protocol will repeatedly read the same register with each data access. Block protocol will provide auto-increment function to read successive bytes. ADDR/SF 4:0 Address field/special function field. Depending on the transaction type, see above, this field either specifies a special function command or selects the specific control-status-data register for subsequent read and write transactions. The field values listed below only apply to special function commands: FIELD VALUE READ VALUE 00110 Clear channel interrupt clear other Reserved — Do not write Te ch ni ca The Clear channel interrupt clear special function clears any pending interrupt and is self-clearing. Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 14 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Enable Register (0x00) The Enable register is used primarily to power the TCS3472 device on and off, and enable functions and interrupts as shown in Table 5. Table 5. Enable Register 6 5 Reserved ENABLE 4 3 2 1 0 AIEN WEN Reserved AEN PON DESCRIPTION Address 0x00 al id 7 FIELD BITS Reserved 7:5 AIEN 4 RGBC interrupt enable. When asserted, permits RGBC interrupts to be generated. WEN 3 Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the wait timer. Reserved 2 Reserved. Write as 0. AEN 1 RGBC enable. This bit actives the two-channel ADC. Writing a 1 activates the RGBC. Writing a 0 disables the RGBC. PON 1, 2 0 am lc s on A te G nt st il lv Reserved. Write as 0. Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate. Writing a 1 activates the oscillator. Writing a 0 disables the oscillator. Te ch ni ca NOTES: 1. See Power Management section for more information. 2. A minimum interval of 2.4 ms must pass after PON is asserted before an RGBC can be initiated. The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 15 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 RGBC Timing Register (0x01) The RGBC timing register controls the internal integration time of the RGBC clear and IR channel ADCs in 2.4-ms increments. Max RGBC Count = (256 − ATIME) × 1024 up to a maximum of 65535. Table 6. RGBC Timing Register 7:0 DESCRIPTION VALUE INTEG_CYCLES TIME 0xFF 1 2.4 ms 0xF6 10 24 ms 0xD5 42 101 ms 0xC0 64 154 ms 0x00 256 700 ms MAX COUNT al id BITS 1024 10240 43008 65535 65535 lv FIELD ATIME Wait Time Register (0x03) am lc s on A te G nt st il Wait time is set 2.4 ms increments unless the WLONG bit is asserted, in which case the wait times are 12× longer. WTIME is programmed as a 2’s complement number. Table 7. Wait Time Register BITS WTIME 7:0 DESCRIPTION REGISTER VALUE WAIT TIME TIME (WLONG = 0) TIME (WLONG = 1) 0xFF 1 2.4 ms 0.029 sec 0xAB 85 204 ms 2.45 sec 0x00 256 614 ms 7.4 sec Te ch ni ca FIELD Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 16 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 RGBC Interrupt Threshold Registers (0x04 − 0x07) The RGBC interrupt threshold registers provides the values to be used as the high and low trigger points for the comparison function for interrupt generation. If the value generated by the clear channel crosses below the lower threshold specified, or above the higher threshold, an interrupt is asserted on the interrupt pin. Table 8. RGBC Interrupt Threshold Registers BITS 0x04 7:0 RGBC clear channel low threshold lower byte DESCRIPTION AILTH 0x05 7:0 RGBC clear channel low threshold upper byte AIHTL 0x06 7:0 RGBC clear channel high threshold lower byte AIHTH 0x07 7:0 RGBC clear channel high threshold upper byte al id ADDRESS AILTL lv REGISTER Persistence Register (0x0C) am lc s on A te G nt st il The persistence register controls the filtering interrupt capabilities of the device. Configurable filtering is provided to allow interrupts to be generated after each integration cycle or if the integration has produced a result that is outside of the values specified by the threshold register for some specified amount of time. Table 9. Persistence Register 7 6 PERS 5 4 3 Reserved BITS 7:4 APERS 3:0 0 Address 0x0C DESCRIPTION Reserved Interrupt persistence. Controls rate of interrupt to the host processor. FIELD VALUE MEANING 0000 Every 0001 1 1 clear channel value outside of threshold range 0010 2 2 clear channel consecutive values out of range INTERRUPT PERSISTENCE FUNCTION Every RGBC cycle generates an interrupt 0011 3 3 clear channel consecutive values out of range 0100 5 5 clear channel consecutive values out of range 0101 10 10 clear channel consecutive values out of range 0110 15 15 clear channel consecutive values out of range 0111 20 20 clear channel consecutive values out of range 1000 25 25 clear channel consecutive values out of range 1001 30 30 clear channel consecutive values out of range 1010 35 35 clear channel consecutive values out of range 1011 40 40 clear channel consecutive values out of range 1100 45 45 clear channel consecutive values out of range 1101 50 50 clear channel consecutive values out of range 1110 55 55 clear channel consecutive values out of range 1111 60 60 clear channel consecutive values out of range ni ch Te The LUMENOLOGY r Company 1 APERS ca FIELD PPERS 2 Copyright E 2012, TAOS Inc. r r www.taosinc.com 17 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Configuration Register (0x0D) The configuration register sets the wait long time. Table 10. Configuration Register 7 6 5 4 CONFIG 3 2 0 WLONG Reserved Address 0x0D al id Reserved 1 FIELD BITS Reserved 7:2 DESCRIPTION WLONG 1 Wait Long. When asserted, the wait cycles are increased by a factor 12× from that programmed in the WTIME register. Reserved 0 Reserved. Write as 0. lv Reserved. Write as 0. am lc s on A te G nt st il Control Register (0x0F) The Control register provides eight bits of miscellaneous control to the analog block. These bits typically control functions such as gain settings and/or diode selection. Table 11. Control Register 7 6 CONTROL 5 4 3 2 1 0 Reserved FIELD BITS Reserved 7:2 Reserved. AGAIN 1:0 RGBC Gain Control. DESCRIPTION Write bits as 0 FIELD VALUE RGBC GAIN VALUE 00 1× gain 01 4× gain 10 16× gain 11 60× gain ca ID Register (0x12) Address 0x0F AGAIN ni The ID Register provides the value for the part number. The ID register is a read-only register. 6 5 ch 7 Table 12. ID Register ID ID 3 7:0 Copyright E 2012, TAOS Inc. 2 1 DESCRIPTION 0x44 = TCS34721 and TCS34725 Part number identification 0x4D = TCS34723 and TCS34727 The LUMENOLOGY r Company r r 18 0 Address 0x12 ID BITS Te FIELD 4 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 Status Register (0x13) The Status Register provides the internal status of the device. This register is read only. Table 13. Status Register 6 STATUS 5 Reserved BIT 7:5 AINT 4 Reserved 3:1 AVALID 0 3 AINT 2 1 Reserved 0 AVALID Address 0x13 DESCRIPTION Reserved. RGBC clear channel Interrupt. Reserved. RGBC Valid. Indicates that the RGBC channels have completed an integration cycle. lv FIELD Reserved 4 al id 7 am lc s on A te G nt st il RGBC Channel Data Registers (0x14 − 0x1B) Clear, red, green, and blue data is stored as 16-bit values. To ensure the data is read correctly, a two-byte read I2C transaction should be used with a read word protocol bit set in the command register. With this operation, when the lower byte register is read, the upper eight bits are stored into a shadow register, which is read by a subsequent read to the upper byte. The upper register will read the correct value even if additional ADC integration cycles end between the reading of the lower and upper registers. Table 14. ADC Channel Data Registers ADDRESS BITS CDATA 0x14 7:0 Clear data low byte DESCRIPTION CDATAH 0x15 7:0 Clear data high byte RDATA 0x16 7:0 Red data low byte RDATAH 0x17 7:0 Red data high byte GDATA 0x18 7:0 Green data low byte GDATAH 0x19 7:0 Green data high byte BDATA 0x1A 7:0 Blue data low byte BDATAH 0x1B 7:0 Blue data high byte Te ch ni ca REGISTER The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 19 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 APPLICATION INFORMATION: HARDWARE PCB Pad Layout Suggested PCB pad layout guidelines for the Dual Flat No-Lead (FN) surface mount package are shown in Figure 11. 1000 al id 2500 Note: Pads can be extended further if hand soldering is needed. 1000 400 lv 650 1700 am lc s on A te G nt st il 650 400 NOTES: A. All linear dimensions are in micrometers. B. This drawing is subject to change without notice. Te ch ni ca Figure 11. Suggested FN Package PCB Layout Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 20 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 PACKAGE INFORMATION PACKAGE FN Dual Flat No-Lead TOP VIEW 877 75 PIN OUT TOP VIEW PIN 1 al id 871 75 369 VDD 1 6 SDA 406 SCL 2 5 INT lv 2400 75 4 NC am lc s on A te G nt st il GND 3 2000 75 Photodiode Array Area SIDE VIEW END VIEW 650 50 295 nominal BOTTOM VIEW 650 50 750 100 203 8 300 50 300 50 Pb ch PIN 1 ni ca 650 50 All linear dimensions are in micrometers. Dimension tolerance is ± 20 μm unless otherwise noted. The die is centered within the package within a tolerance of ± 3 mils. Package top surface is molded with an electrically nonconductive clear plastic compound having an index of refraction of 1.55. Contact finish is copper alloy A194 with pre-plated NiPdAu lead finish. This package contains no lead (Pb). This drawing is subject to change without notice. Te NOTES: A. B. C. D. E. F. Lead Free Figure 12. Package FN — Dual Flat No-Lead Packaging Configuration The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 21 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 CARRIER TAPE AND REEL INFORMATION TOP VIEW 2.00 0.05 1.75 1.50 4.00 al id 4.00 B + 0.30 8.00 − 0.10 0.50 0.05 DETAIL A B A am lc s on A te G nt st il A lv 3.50 0.05 DETAIL B 5 Max 5 Max 0.254 0.02 2.21 0.05 Ao 2.61 0.05 0.83 0.05 Bo All linear dimensions are in millimeters. Dimension tolerance is ± 0.10 mm unless otherwise noted. The dimensions on this drawing are for illustrative purposes only. Dimensions of an actual carrier may vary slightly. Symbols on drawing Ao, Bo, and Ko are defined in ANSI EIA Standard 481−B 2001. Each reel is 178 millimeters in diameter and contains 3500 parts. TAOS packaging tape and reel conform to the requirements of EIA Standard 481−B. In accordance with EIA standard, device pin 1 is located next to the sprocket holes in the tape. This drawing is subject to change without notice. Te ch NOTES: A. B. C. D. E. F. G. ni ca Ko Copyright E 2012, TAOS Inc. Figure 13. Package FN Carrier Tape The LUMENOLOGY r Company r r 22 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 SOLDERING INFORMATION The FN package has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate. The process, equipment, and materials used in these test are detailed below. Table 15. Solder Reflow Profile PARAMETER REFERENCE DEVICE Average temperature gradient in preheating 2 to 3 minutes Time above 217°C (T1) t1 Max 60 sec Time above 230°C (T2) t2 Max 50 sec Time above Tpeak −10°C (T3) t3 Max 10 sec lv tsoak am lc s on A te G nt st il Soak time 2.5°C/sec Peak temperature in reflow Tpeak 260°C Temperature gradient in cooling Max −5°C/sec Not to scale — for reference only T3 T2 Temperature (C) T1 ca Tpeak al id The solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of product on a PCB. Temperature is measured on top of component. The components should be limited to a maximum of three passes through this solder reflow profile. t3 t2 tsoak t1 Figure 14. Solder Reflow Profile Graph Te ch ni Time (sec) The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 23 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 STORAGE INFORMATION Moisture Sensitivity al id Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package. To ensure the package contains the smallest amount of absorbed moisture possible, each device is dry-baked prior to being packed for shipping. Devices are packed in a sealed aluminized envelope called a moisture barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. The Moisture Barrier Bags should be stored under the following conditions: < 40°C < 90% No longer than 12 months from the date code on the aluminized envelope if unopened. lv Temperature Range Relative Humidity Total Time am lc s on A te G nt st il Rebaking of the reel will be required if the devices have been stored unopened for more than 12 months and the Humidity Indicator Card shows the parts to be out of the allowable moisture region. Opened reels should be used within 168 hours if exposed to the following conditions: Temperature Range Relative Humidity < 30°C < 60% If rebaking is required, it should be done at 50°C for 12 hours. Te ch ni ca The FN package has been assigned a moisture sensitivity level of MSL 3. Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 24 www.taosinc.com TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER TAOS135 − AUGUST 2012 PRODUCTION DATA — information in this document is current at publication date. Products conform to specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard warranty. Production processing does not necessarily include testing of all parameters. LEAD-FREE (Pb-FREE) and GREEN STATEMENT al id Pb-Free (RoHS) TAOS’ terms Lead-Free or Pb-Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TAOS Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br) TAOS defines Green to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). am lc s on A te G nt st il lv Important Information and Disclaimer The information provided in this statement represents TAOS’ knowledge and belief as of the date that it is provided. TAOS bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TAOS has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TAOS and TAOS suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. NOTICE Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems. TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ca TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK. Te ch ni LUMENOLOGY, TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are registered trademarks of Texas Advanced Optoelectronic Solutions Incorporated. The LUMENOLOGY r Company Copyright E 2012, TAOS Inc. r r www.taosinc.com 25 TCS3472 COLOR LIGHT-TO-DIGITAL CONVERTER with IR FILTER Te ch ni ca am lc s on A te G nt st il lv al id TAOS135 − AUGUST 2012 Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company r r 26 www.taosinc.com