DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M www.ti.com SNLS352C – MAY 1999 – REVISED FEBRUARY 2013 DS26LS32AC/DS26LS32C/DS26LS32M/DS26LS33M Quad Differential Line Receivers Check for Samples: DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M FEATURES DESCRIPTION • The DS26LS32 and DS26LS32A are quad differential line receivers designed to meet the RS-422, RS-423 and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission. 1 2 • • • • • • High Differential or Common-Mode Input Voltage Ranges of ±7V on the DS26LS32 and DS26LS32A and ±15V on the DS26LS33 ±0.2V Sensitivity Over the Input Voltage Range on the DS26LS32 and DS26LS32A, ±0.5V Sensitivity on the DS26LS33 DS26LS32 and DS26LS32A Meet All Requirements of RS-422 and RS-423 6k Minimum Input Impedance 100 mV Input Hysteresis on the DS26LS32 and DS26LS32A, 200 mV on the DS26LS33 Operation From a Single 5V Supply TRI-STATE Outputs, with Choice of Complementary Output Enables for Receiving Directly onto a Data Bus The DS26LS32 and DS26LS32A have an input sensitivity of 200 mV over the input voltage range of ±7V and the DS26LS33 has an input sensitivity of 500 mV over the input voltage range of ±15V. The DS26LS32A differs in function from the popular DS26LS32 and DS26LS33 in that input pull-up and pull-down resistors are included which prevent output oscillation on unused channels. Each version provides an enable and disable function common to all four receivers and features TRI-STATE outputs with 8 mA sink capability. Constructed using low power Schottky processing, these devices are available over the full military and commercial operating temperature ranges. Logic Diagram 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M SNLS352C – MAY 1999 – REVISED FEBRUARY 2013 www.ti.com Connection Diagram For Complete Military Product Specifications, refer to the appropriate SMD or MDS. Figure 1. Dual-In-Line Package (Top View) D Package or NFG0016E Package Figure 2. 20-Lead Ceramic Leadless Chip Carrier Truth Table ENABLE ENABLE Input Output 0 1 X Hi-Z See note below. (2) (1) (2) 2 (1) VID ≥ VTH (Max) 1 VID ≤ VTH (Min) 0 Hi-Z = TRI-STATE Note: Input conditions may be any combination not defined for ENABLE and ENABLE . Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M www.ti.com SNLS352C – MAY 1999 – REVISED FEBRUARY 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage 7V Common-Mode Range ±25V Differential Input Voltage ±25V Enable Voltage 7V Output Sink Current Maximum Power Dissipation 50 mA (3) at 25°C Cavity Package 1433 mW Molded DIP Package 1362 mW SOIC Package (4) DS26LS32 1002 mW DS26LS32A 1051 mW −65°C to +165°C Storage Temperature Range Lead Temperature (Soldering, 4 seconds) (1) 260°C “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. Derate cavity package 9.6 mW/°C above 25°C; derate molded DIP package 10.9 mW/°C above 25°C. Derate SOIC Package 8.01 mW/°C for DS26LS32 8.41 mW/°C for DS26LS32A (2) (3) (4) Operating Conditions Min Max Units Supply Voltage, (VCC) DS26LS32M, DS26LS33M (MIL) 4.5 5.5 V DS26LS32C, DS26LS32AC (COML) 4.75 5.25 V −55 +125 °C 0 +70 °C Temperature, (TA) DS26LS32M, DS26LS33M (MIL) DS26LS32C, DS26LS32AC (COML) Electrical Characteristics (1) (2) (3) over the operating temperature range unless otherwise specified Symbol Parameter Min Typ Max Units DS26LS32, DS26LS32A, −7V ≤ VCM ≤ +7V Conditions −0.2 ±0.07 0.2 V DS26LS33, DS26LS33A, −15V ≤ VCM +15V −0.5 ±0.14 0.5 6.0 8.5 VTH Differential Input Voltage VOUT = VOH or VOL RIN Input Resistance −15V ≤ VCM ≤ +15V (One Input AC GND) IIN Input Current (Under Test) V IN = 15V, Other Input −15V ≤ VIN ≤ +15V 2.3 mA V IN = −15V, Other Input −15V ≤ VIN ≤ +15V −2.8 mA Output High Voltage VCC = MIN, ΔVIN = 1V, Commercial 2.7 4.2 VENABLE = 0.8V, IOH = −440 μA Military 2.5 4.2 VCC = Min, ΔVIN = −1V, IOL = 4 mA 0.4 V VENABLE = 0.8V IOL = 8 mA 0.45 V 0.8 V VOH VOL Output Low Voltage VIL Enable Low Voltage VIH Enable High Voltage VI Enable Clamp Voltage (1) (2) (3) V V 2.0 VCC = Min, IIN = −18 mA V kΩ V −1.5 V All currents into device pins are shown as positive, all currents out of device pins are shown as negative, all voltages are referenced to ground, unless otherwise specified. All values shown as max or min are so classified on absolute value basis. All typical values are VCC = 5V, TA = 25°C. Only one output at a time should be shorted. Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M 3 DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M SNLS352C – MAY 1999 – REVISED FEBRUARY 2013 Electrical Characteristics (1) (2) (3) www.ti.com (continued) over the operating temperature range unless otherwise specified Symbol IO Parameter Conditions Min Typ Max Units VO = 2.4V 20 μA VO = 0.4V −20 μA OFF-State (High Impedance) Output Current V CC = Max IIL Enable Low Current VIN = 0.4V −0.36 mA IIH Enable High Current VIN = 2.7V 20 μA ISC Output Short-Circuit Current V O = 0V, VCC = Max, ΔVIN = 1V −85 mA ICC Power Supply Current VCC = Max, All VIN = GND, DS26LS32, DS26LS32A 52 70 mA Outputs Disabled DS26LS33, DS26LS33A 57 80 mA II Input High Current VIN = 5.5V VHYST Input Hysteresis TA = 25°C, VCC = 5V, DS26LS32, DS26S32A 100 mV VCM = 0V DS26LS33, DS26LS33A 200 mV −15 100 μA Switching Characteristics VCC = 5V, TA = 25°C Symbol tPLH Parameter Conditions Input to Output CL = 15 pF tPHL tLZ ENABLE to Output CL = 5 pF ENABLE to Output CL = 15 pF tHZ tZL tZH DS26LS32/DS26LS33 Min DS26LS32A/DS26LS33A Typ Max 17 17 Min Units Typ Max 25 23 35 ns 25 23 35 ns 20 30 15 30 ns 15 22 20 25 ns 15 22 14 22 ns 15 22 15 22 ns AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS Figure 3. Load Test Circuit for TRI-STATE Outputs 4 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M www.ti.com SNLS352C – MAY 1999 – REVISED FEBRUARY 2013 Diagram shown for ENABLE low. Pulse generator for all pulses: Rate = 1.0 MHz; ZO = 50Ω; tr ≤ 6 ns; tf ≤ 6.0 ns. Figure 4. Propagation Delay S1 and S2 of load circuit are closed except where shown. Pulse generator for all pulses: Rate = 1.0 MHz; ZO = 50Ω; tr ≤ 6 ns; tf ≤ 6.0 ns. Figure 5. Enable and Disable Times TYPICAL APPLICATIONS Figure 6. Two-Wire Balanced Interface—RS-422 Figure 7. Single Wire with Driver Ground Reference—RS-423 Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M 5 DS26LS32AC, DS26LS32C, DS26LS32M, DS26LS33M SNLS352C – MAY 1999 – REVISED FEBRUARY 2013 www.ti.com REVISION HISTORY Changes from Revision B (February 2013) to Revision C • 6 Page Changed layout of National Data Sheet to TI format ............................................................................................................ 5 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: DS26LS32AC DS26LS32C DS26LS32M DS26LS33M PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) AM26LS32CN ACTIVE PDIP NFG 16 25 TBD Call TI Call TI 0 to 70 DS26LS32CN AM26LS32PC ACTIVE PDIP NFG 16 25 TBD Call TI Call TI 0 to 70 DS26LS32CN DS26LS32ACM ACTIVE SOIC D 16 48 TBD Call TI Call TI 0 to 70 DS26LS32 ACM DS26LS32ACM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32 ACM DS26LS32ACMX ACTIVE SOIC D 16 2500 TBD Call TI Call TI 0 to 70 DS26LS32 ACM DS26LS32ACMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32 ACM DS26LS32ACN ACTIVE PDIP NFG 16 25 TBD Call TI Call TI 0 to 70 DS26LS32ACN DS26LS32ACN/NOPB ACTIVE PDIP NFG 16 25 Pb-Free (RoHS) CU SN Level-1-NA-UNLIM 0 to 70 DS26LS32ACN DS26LS32CM ACTIVE SOIC D 16 48 TBD Call TI Call TI 0 to 70 DS26LS32CM DS26LS32CM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32CM DS26LS32CMX ACTIVE SOIC D 16 2500 TBD Call TI Call TI 0 to 70 DS26LS32CM DS26LS32CMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS26LS32CM DS26LS32CN ACTIVE PDIP NFG 16 25 TBD Call TI Call TI 0 to 70 DS26LS32CN DS26LS32CN/NOPB ACTIVE PDIP NFG 16 25 Pb-Free (RoHS) SN Level-1-NA-UNLIM 0 to 70 DS26LS32CN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DS26LS32ACMX SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 DS26LS32ACMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 DS26LS32CMX SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 DS26LS32CMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS26LS32ACMX SOIC D 16 2500 367.0 367.0 35.0 DS26LS32ACMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 DS26LS32CMX SOIC D 16 2500 367.0 367.0 35.0 DS26LS32CMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA NFG0016E N0016E N16E (Rev G) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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