SCLS379J − AUGUST 1997 − REVISED JUNE 2005 D Operating Range of 2 V to 5.5 V D Max tpd of 6 ns at 5 V D Low Power Consumption, 10-µA Max ICC D ±8-mA Output Drive at 5 V D Latch-Up Performance Exceeds 250 mA Per JESD 17 DCK PACKAGE (TOP VIEW) DBV PACKAGE (TOP VIEW) OE 1 A 2 GND 3 OE 1 A 2 GND 3 VCC 5 VCC 5 DRL PACKAGE (TOP VIEW) Y 4 OE 1 A 2 GND 3 5 VCC 4 Y Y 4 See mechanical drawings for dimensions. description/ordering information The SN74AHC1G126 is a single bus buffer gate/line driver with 3-state output. The output is disabled when the output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. ORDERING INFORMATION SOT (SOT-23) – DBV −40°C −40 C to 85 85°C C ORDERABLE PART NUMBER PACKAGE† TA SOT (SC-70) – DCK SOT (SOT-553) – DRL Reel of 3000 SN74AHC1G126DBVR Reel of 250 SN74AHC1G126DBVT Reel of 3000 SN74AHC1G126DCKR Reel of 250 SN74AHC1G126DCKT Reel of 4000 SN74AHC1G126DRLR TOP-SIDE MARKING‡ A26_ AN_ AN_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE INPUTS OE A OUTPUT Y H H H H L L L X Z logic diagram (positive logic) OE A 1 2 4 Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2005, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCLS379J − AUGUST 1997 − REVISED JUNE 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W DRL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) VCC VIH Supply voltage VCC = 2 V VCC = 3 V High-level input voltage VCC = 5.5 V VCC = 2 V VIL VI VO IOH ∆t/∆v MAX 2 5.5 Low-level input voltage Input voltage Output voltage VCC = 2 V VCC = 3.3 V ± 0.3 V High-level output current Low-level output current Input transition rise or fall rate UNIT V 1.5 2.1 V 3.85 0.5 VCC = 3 V VCC = 5.5 V VCC = 5 V ± 0.5 V VCC = 2 V IOL MIN 0.9 V 1.65 0 5.5 V 0 VCC −50 mA V −4 −8 50 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 4 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 100 8 20 mA mA mA ns/V TA Operating free-air temperature −40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCLS379J − AUGUST 1997 − REVISED JUNE 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −50 mA VOH IOH = −4 mA IOH = −8 mA IOL = 50 mA VOL IOL = 4 mA IOL = 8 mA II IOZ VI = 5.5 V or GND VI = VCC or GND ICC Ci VI = VCC or GND, VI = VCC or GND Co VO = VCC or GND IO = 0 VCC MIN TA = 25°C TYP MAX MIN 2V 1.9 2 1.9 3V 2.9 3 2.9 4.5 V 4.4 4.5 4.4 3V 2.58 4.5 V 3.94 MAX UNIT V 2.48 3.8 2V 0.1 0.1 3V 0.1 0.1 4.5 V 0.1 0.1 V 3V 0.36 0.44 4.5 V 0.36 0.44 0 V to 5.5 V ±0.1 ±1 mA 5.5 V ±0.25 ±2.5 mA 5.5 V 1 10 mA 10 10 pF 5V 4 5V 10 pF switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A Y CL = 15 pF tPZH tPZL OE Y CL = 15 pF tPHZ tPLZ OE Y CL = 15 pF tPLH tPHL A Y CL = 50 pF tPZH tPZL OE Y CL = 50 pF tPHZ tPLZ OE Y CL = 50 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN TA = 25°C TYP MAX MIN MAX 5.6 8 1 9.5 5.6 8 1 9.5 5.4 8 1 9.5 5.4 8 1 9.5 7 9.7 1 11.5 7 9.7 1 11.5 8.1 11.5 1 13 8.1 11.5 1 13 7.9 11.5 1 13 7.9 11.5 1 13 9.5 13.2 1 15 9.5 13.2 1 15 UNIT ns ns ns ns ns ns 3 SCLS379J − AUGUST 1997 − REVISED JUNE 2005 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A Y CL = 15 pF tPZH tPZL OE Y CL = 15 pF tPHZ tPLZ OE Y CL = 15 pF tPLH tPHL A Y CL = 50 pF tPZH tPZL OE Y CL = 50 pF tPHZ tPLZ OE Y CL = 50 pF MIN TA = 25°C TYP MAX MIN MAX 3.8 5.5 1 6.5 3.8 5.5 1 6.5 3.6 5.1 1 6 3.6 5.1 1 6 4.6 6.8 1 8 4.6 6.8 1 8 5.3 7.5 1 8.5 5.3 7.5 1 8.5 5.1 7.1 1 8 5.1 7.1 1 8 6.1 8.8 1 10 6.1 8.8 1 10 UNIT ns ns ns ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd 4 TEST CONDITIONS Power dissipation capacitance No load, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz TYP 14 UNIT pF SCLS379J − AUGUST 1997 − REVISED JUNE 2005 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw tsu VCC Input 50% VCC 50% VCC 0V th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) 50% VCC VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 50% VCC 0V tPZL tPLZ ≈VCC 50% VCC tPZH tPLH VOH 50% VCC VOL VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) 74AHC1G126DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (A263 ~ A26G ~ A26J ~ A26S) 74AHC1G126DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (A263 ~ A26G ~ A26J ~ A26S) 74AHC1G126DBVTE4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (A263 ~ A26G ~ A26S) 74AHC1G126DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (A263 ~ A26G ~ A26S) 74AHC1G126DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (AN3 ~ ANG ~ ANJ ~ ANS) 74AHC1G126DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (AN3 ~ ANG ~ ANJ ~ ANS) 74AHC1G126DCKTE4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (AN3 ~ ANG ~ ANS) 74AHC1G126DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (AN3 ~ ANG ~ ANS) 74AHC1G126DRLRG4 ACTIVE SOT DRL 5 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ANS SN74AHC1G126DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (A263 ~ A26G ~ A26J ~ A26S) SN74AHC1G126DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (A263 ~ A26G ~ A26S) SN74AHC1G126DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (AN3 ~ ANG ~ ANJ ~ ANS) SN74AHC1G126DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (AN3 ~ ANG ~ ANS) SN74AHC1G126DRLR ACTIVE SOT DRL 5 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ANS (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 28-Jun-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) SN74AHC1G126DBVR SOT-23 DBV 5 3000 178.0 9.2 SN74AHC1G126DBVR SOT-23 DBV 5 3000 178.0 SN74AHC1G126DBVR SOT-23 DBV 5 3000 180.0 SN74AHC1G126DBVT SOT-23 DBV 5 250 SN74AHC1G126DBVT SOT-23 DBV 5 SN74AHC1G126DCKR SC70 DCK SN74AHC1G126DCKR SC70 DCK SN74AHC1G126DCKT SC70 SN74AHC1G126DCKT SN74AHC1G126DRLR 3.3 3.2 1.55 4.0 8.0 Q3 9.0 3.23 3.17 1.37 4.0 8.0 Q3 8.4 3.23 3.17 1.37 4.0 8.0 Q3 178.0 9.2 3.3 3.2 1.55 4.0 8.0 Q3 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SOT DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 28-Jun-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHC1G126DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74AHC1G126DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74AHC1G126DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74AHC1G126DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74AHC1G126DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74AHC1G126DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74AHC1G126DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74AHC1G126DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74AHC1G126DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74AHC1G126DRLR SOT DRL 5 4000 202.0 201.0 28.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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