SN74CBT1G125 SINGLE FET BUS SWITCH SCDS046G – FEBRUARY 1998 – REVISED JANUARY 2003 D D D D DBV OR DCK PACKAGE (TOP VIEW) 5-Ω Switch Connection Between Two Ports TTL-Compatible Control Input Levels Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) OE A GND 1 5 VCC 4 B 2 3 description/ordering information The SN74CBT1G125 features a single high-speed line switch. The switch is disabled when the output-enable (OE) input is high. ORDERING INFORMATION ORDERABLE PART NUMBER PACKAGE† TA 23) – DBV SOT (SOT (SOT-23) –40°C 40°C to 85°C SOT (SC-70) – DCK Reel of 3000 SN74CBT1G125DBVR Reel of 250 SN74CBT1G125DBVT Reel of 3000 SN74CBT1G125DCKR Reel of 250 SN74CBT1G125DCKT TOP-SIDE MARKING‡ S25 S25_ SM SM_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE INPUT OE FUNCTION L A port = B port H Disconnect logic diagram (positive logic) 2 4 A B 1 OE Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74CBT1G125 SINGLE FET BUS SWITCH SCDS046G – FEBRUARY 1998 – REVISED JANUARY 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) MIN MAX 5.5 VCC VIH Supply voltage 4 High-level control input voltage 2 VIL TA Low-level control input voltage Operating free-air temperature –40 UNIT V V 0.8 V 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK II ICC Ci Control input Cio(OFF) ron§ TEST CONDITIONS VCC = 4.5 V, VCC = 5.5 V, II = –18 mA VI = 5.5 V or GND VCC = 5.5 V, VI = 3 V or 0 IO = 0, VO = 3 V or 0, VCC = 4 V, OE = VCC VCC = 4.5 V MIN TYP‡ MAX V ±1 µA 1 µA VI = VCC or GND 3 TYP at VCC = 4 V, VI = 0 pF 4 VI = 2.4 V, II = 64 mA II = 15 mA II = 30 mA II = 15 mA UNIT –1.2 pF 14 20 5 7 5 7 Ω VI = 2.4 V, 10 15 ‡ All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. § Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals. switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) VCC = 4 V VCC = 5 V ± 0.5 V MIN MIN FROM (INPUT) TO (OUTPUT) tpd¶ A or B B or A 0.35 ten OE A or B 5.5 PARAMETER MAX 1.6 UNIT MAX 0.25 ns 4.9 ns tdis A or B 4.5 1 4.2 ns OE ¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74CBT1G125 SINGLE FET BUS SWITCH SCDS046G – FEBRUARY 1998 – REVISED JANUARY 2003 PARAMETER MEASUREMENT INFORMATION 7V 500 Ω From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V Output Control LOAD CIRCUIT 1.5 V 1.5 V 0V tPLZ tPZL 3V Input 1.5 V 1.5 V 0V tPLH 1.5 V 3.5 V 1.5 V 1.5 V VOL Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOL + 0.3 V VOL tPHZ tPZH tPHL VOH Output Output Waveform 1 S1 at 7 V (see Note B) 1.5 V VOH VOH – 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) (3) Top-Side Markings (4) 74CBT1G125DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (S25G ~ S25J ~ S25S) 74CBT1G125DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (S25G ~ S25J ~ S25S) 74CBT1G125DBVTE4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (S253 ~ S25S) 74CBT1G125DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (S253 ~ S25S) 74CBT1G125DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (SM3 ~ SMS ~ SMT ~ SMU) 74CBT1G125DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (SM3 ~ SMS ~ SMT ~ SMU) 74CBT1G125DCKTE4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (SM3 ~ SMS) 74CBT1G125DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (SM3 ~ SMS) SN74CBT1G125DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (S25G ~ S25J ~ S25S) SN74CBT1G125DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (S253 ~ S25S) SN74CBT1G125DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (SM3 ~ SMS ~ SMT ~ SMU) SN74CBT1G125DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (SM3 ~ SMS) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 16-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) SN74CBT1G125DBVR SOT-23 DBV 5 3000 178.0 9.0 SN74CBT1G125DBVR SOT-23 DBV 5 3000 180.0 SN74CBT1G125DBVT SOT-23 DBV 5 250 180.0 SN74CBT1G125DCKR SC70 DCK 5 3000 SN74CBT1G125DCKT SC70 DCK 5 250 3.23 3.17 1.37 4.0 8.0 Q3 8.4 3.23 3.17 1.37 4.0 8.0 Q3 8.4 3.23 3.17 1.37 4.0 8.0 Q3 180.0 8.4 2.25 2.4 1.22 4.0 8.0 Q3 180.0 8.4 2.25 2.4 1.22 4.0 8.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 16-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74CBT1G125DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74CBT1G125DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74CBT1G125DBVT SOT-23 DBV 5 250 202.0 201.0 28.0 SN74CBT1G125DCKR SC70 DCK 5 3000 202.0 201.0 28.0 SN74CBT1G125DCKT SC70 DCK 5 250 202.0 201.0 28.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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