19-3663; Rev 0; 5/05 Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output Features The MAX5077 is a +4.5V to +15V push-pull, current-fed topology driver subsystem with an integrated oscillator used in telecom module power supplies. The device drives two MOSFETs connected to a center-tapped transformer primary providing secondary-side, isolated, negative or positive voltages. The MAX5077 features a programmable accurate integrated oscillator with a synchronizing clock output to synchronize an external PWM regulator. A single external resistor programs the internal oscillator frequency from 50kHz to 1.5MHz. The MAX5077 incorporates dual MOSFET drivers with ±3A peak drive currents and 50% duty cycle. The MOSFET drivers generate complementary signals to drive external ground-referenced n-channel MOSFETs. The MAX5077 clock output frequency is programmable by logic inputs to set the clock output to 1x, 2x, or 4x the MOSFET’s driver frequency. The MAX5077 is available in a 14-pin exposed pad TSSOP package and is specified over the -40°C to +125°C operating temperature range. ♦ Dedicated Current-Fed, Push-Pull Driver Subsystem ♦ Oscillator Frequency Programmable from 50kHz to 1.5MHz ♦ Single +4.5V to +15V Supply Voltage Range ♦ ±3A Peak Gate-Drive Current ♦ 1mA Operating Current at 250kHz with No Capacitive Load ♦ Selectable Synchronizing Clock Frequency for a Preceding PWM Stage ♦ Thermally Enhanced 14-Pin TSSOP ♦ -40°C to +125°C Operating Temperature Range Ordering Information Applications Current-Fed Power Supplies PART TEMP RANGE PIN-PACKAGE PKG CODE MAX5077AUD -40°C to +125°C 14 TSSOP-EP* U14E-3 *EP = Exposed paddle. Power-Supply Building Subsystems Pin Configuration appears at end of data sheet. Push-Pull Driver Subsystems Typical Operating Circuit VIN VOUT VIN DRVH SYNCIN PWM CONTROLLER CLK VCC MAX5077 VCC NDRV2 SEL1 I.C. NDRV1 DRVL GND RT AGND SEL2 DGND PGND GND ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX5077 General Description MAX5077 Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output ABSOLUTE MAXIMUM RATINGS VCC to AGND, DGND, PGND.................................-0.3V to +18V PGND, DGND to AGND ........................................-0.3V to +0.3V SEL1, SEL2 to DGND .............................................-0.3V to +18V CLK, RT to AGND.....................................................-0.3V to +6V NDRV1, NDRV2 to PGND...........................-0.3V to (VCC + 0.3V) CLK Current......................................................................±20mA NDRV1, NDRV2 Peak Current (200ns) ..................................±5A NDRV1, NDRV2 Reverse Current (Latchup Current) .....±500mA Continuous Power Dissipation (TA = +70°C) 14-Pin TSSOP (derate 20.8mW/°C above +70°C) .....1667mW Operating Temperature Range .........................-40°C to +125°C Maximum Junction Temperature .....................................+150°C Storage Temperature Range .............................-60°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +12V, SEL1 = VCC, SEL2 = DGND, RRT = 124kΩ, NDRV1 = NDRV2 = open, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SUPPLY Input Voltage Supply Range Static Supply Current VCC 4.5 ICCST SEL2 = SEL1 = DGND, drivers not switching Switching Supply Current ICCSW SEL2 = DGND, SEL1 = VCC, fOSC = 250kHz Undervoltage Lockout VUVLO VCC rising 3 UVLO Hysteresis 15.0 V 150 320 µA 1 3 mA 3.5 4 300 V mV OSCILLATOR Frequency Range fOSC Accuracy (Note 2) 50 1500 kHz fOSC = 250kHz, 6V ≤ VCC ≤ 15V (Note 3) -8 +10 % Oscillator Jitter ±0.6 CLK Output High Voltage ICLK = 1mA % 7V ≤ VCC ≤ 15V 4.1 5.0 4.5V ≤ VCC ≤ 7V 3.5 5.0 50 V CLK Output Low Voltage ICLK = -1mA CLK Output Rise Time CCLK = 30pF 35 mV ns CLK Output Fall Time CCLK = 30pF 10 ns GATE DRIVERS (NDRV1, NDRV2) Output High Voltage VOH INDRV1 = INDRV2 = 100mA Output Low Voltage VOL INDRV1 = INDRV2 = -100mA Output Peak Current IP Driver Output Impedance Latchup Current Protection Sourcing and sinking VCC 0.3 V 0.3 3 V A NDRV_ sourcing 100mA 1.8 3 NDRV_ sinking 100mA 1.6 2.6 Reverse current at NDRV1/NDRV2 400 mA Ω Rise Time tR CLOAD = 2nF 10 ns Fall Time tF CLOAD = 2nF 10 ns 2 _______________________________________________________________________________________ Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output (VCC = +12V, SEL1 = VCC, SEL2 = DGND, RRT = 124kΩ, NDRV1 = NDRV2 = open, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP 3 2.5 MAX UNITS 1 µA SEL_ INPUTS 0V ≤ VSEL_ ≤ VCC Input Current Input High Voltage VIH Input Low Voltage VIL V 2 1.5 V Note 1: The MAX5077 is 100% tested at TA = TJ = +125°C. All limits over temperature are guaranteed by design. Note 2: Use the following formula to calculate the MAX5077 oscillator frequency: fOSC = 1012 / (32 x RRT). Note 3: The accuracy of the oscillator’s frequency is lower at frequencies greater than 1MHz. Typical Operating Characteristics (VCC = +12V, SEL1 = VCC, SEL2 = DGND, RRT = 124kΩ, NDRV1 = NDRV2 = open, CLK = open.) STATIC SUPPLY CURRENT vs. SUPPLY VOLTAGE 4 fOSC = 500kHz 3 fOSC = 250kHz fOSC = 100kHz fOSC = 50kHz 1 0 MAX5077 toc02 TA = +25°C 130 TA = -40°C 120 110 1.40 7 8 1.15 1.05 1.00 4 5 6 7 8 0 9 10 11 12 13 14 15 20 40 60 80 SUPPLY VOLTAGE (V) CCLK (pF) SUPPLY CURRENT vs. TEMPERATURE CLK RISE TIME vs. SUPPLY VOLTAGE CLK RISE TIME vs. TEMPERATURE 50 MAX5077 toc04 1.16 1.12 1.10 1.08 1.06 40 35 30 25 20 15 1.04 10 1.02 5 1.00 CCLK = 30pF 45 CLK RISE TIME (ns) 1.14 0 25 50 75 TEMPERATURE (°C) 100 125 39.5 100 CCLK = 30pF 39.0 38.5 38.0 37.5 37.0 36.5 0 -25 1.20 SUPPLY VOLTAGE (V) fOSC = 250kHz -50 1.25 1.10 9 10 11 12 13 14 15 1.20 1.18 1.30 90 CLK RISE TIME (ns) 6 1.35 100 MAX5077 toc05 5 RRT = 124kΩ 1.45 80 4 SUPPLY CURRENT (mA) 150 140 1.50 MAX5077 toc06 2 TA = +125°C 160 SUPPLY CURRENT (mA) 5 170 STATIC SUPPLY CURRENT (µA) fOSC = 1.25MHz 6 SUPPLY CURRENT (mA) MAX5077 toc01 7 SUPPLY CURRENT vs. CCLK MAX5077 toc03 SUPPLY CURRENT vs. SUPPLY VOLTAGE 4 5 6 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (V) -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) _______________________________________________________________________________________ 3 MAX5077 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (continued) (VCC = +12V, SEL1 = VCC, SEL2 = DGND, RRT = 124kΩ, NDRV1 = NDRV2 = open, CLK = open.) 10 CCLK = 30pF 10 8 6 4 8 6 4 256 RRT = 124kΩ 2 2 0 5 6 7 8 9 10 11 12 13 14 15 TA = -40°C 254 252 TA = +25°C 250 248 246 TA = +125°C 244 242 0 -50 -25 0 25 50 75 100 125 4 5 6 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V) OSCILLATOR FREQUENCY vs. RRT NDRV FREQUENCY vs. CLK FREQUENCY MAX5077 WAVEFORM (fCLK:fNDRV = 1x, RRT = 124kΩ) 100 MAX5077 toc11 IGH 700 L1 =H 600 , SE 500 LOW 1= 400 300 200 H 2= H, L SE 2= SEL NDRV2 5V/div OW L L SE IG 2= NDRV FREQUENCY (kHz) 1000 MAX5077 toc12 800 MAX5077 toc10 10,000 SEL 4 L1 E H, S NDRV1 5V/div IGH =H HIG 100 10 CLK 5V/div 0 10 100 1000 0 250 RRT (kΩ) 500 750 1000 1250 1500 2µs/div CLK FREQUENCY (kHz) MAX5077 WAVEFORM (fCLK:fNDRV = 4x, RRT = 124kΩ) MAX5077 WAVEFORM (fCLK:fNDRV = 2x, RRT = 124kΩ) MAX5077 toc14 MAX5077 toc13 2µs/div 4 MAX5077 toc09 12 CLK FALL TIME (ns) CLK FALL TIME (ns) 12 OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE OSCILLATOR FREQUENCY (kHz) CCLK = 30pF MAX5077 toc07 14 CLK FALL TIME vs. TEMPERATURE MAX5077 toc08 CLK FALL TIME vs. SUPPLY VOLTAGE OSCILLATOR FREQUENCY (kHz) MAX5077 Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output NDRV2 5V/div NDRV2 5V/div NDRV1 5V/div NDRV1 5V/div CLK 5V/div CLK 5V/div 4µs/div _______________________________________________________________________________________ Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output PIN NAME FUNCTION 1, 8 N.C. No Connection. Must be left unconnected. 2 SEL1 CLK Frequency Ratio Select Input. Use SEL1 and SEL2 to set fCLK to fNDRV_ frequency ratio (see Table 1). 3 CLK Synchronizing Clock Output. Clock output with a ±10mA peak current drive that can be used to synchronize an external PWM regulator. CLK/NDRV_ frequency has a 1x, 2x, or 4x ratio (see the Synchronizing Clock Output section). 4, 14 I.C. Connect to ground. Internal function. 5 RT Oscillator Timing Resistor Connection. Bypass RT with a 1nF capacitor to AGND. Connect a resistor from RT to AGND to set the internal oscillator frequency. 6 AGND Analog Ground. Connect AGND to ground plane. 7 DGND Digital Ground. Connect DGND to ground plane. 9 PGND Power Ground. Connect to ground plane. 10 NDRV1 Gate Driver 1. Connect NDRV1 to the gate of an external n-channel FET. 11 NDRV2 Gate Driver 2. Connect NDRV2 to the gate of an external n-channel FET. 12 VCC Power-Supply Input. Bypass VCC to PGND with 0.1µF||1µF ceramic capacitors. 13 SEL2 CLK Frequency Divisor Input. Use SEL1 and SEL2 to set fCLK to fNDRV_ frequency ratio (see Table 1). EP EP Exposed Pad. Internally connected to DGND. Connect exposed pad to ground plane. MAX5077 SEL1 UVLO 3.5V VCC SEL2 VCC NDRV2 5V LDO Q DGND Q Q T-FF Q CLK NDRV1 PGND Q Q RT OSC INTERNAL FUNCTION I.C. I.C. N.C. AGND Figure 1. MAX5077 Functional Diagram _______________________________________________________________________________________ 5 MAX5077 Pin Description MAX5077 Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output Detailed Description The MAX5077 is a +4.5V to +15V push-pull, current-fed topology driver subsystem with an integrated oscillator for use in 48V module power supplies. The MAX5077 features a programmable accurate integrated oscillator with a synchronizing clock output that can be used to synchronize an external PWM stage. A single external resistor programs the internal oscillator frequency from 50kHz to 1.5MHz. The MAX5077 incorporates dual MOSFET drivers with ±3A peak drive currents and a 50% duty cycle. The MOSFET drivers generate complementary signals to drive external ground-referenced n-channel MOSFETs. The MAX5077 CLK output frequency is programmable through logic inputs that set the fCLK:NDRV_ ratio to 1x, 2x, or 4x. Table 1. CLK Output Frequency Selection SEL2 Low Low Low High fCLK fNRDV_ NDRV1, NDRV2, and CLK disabled fOSC / 2 fOSC / 2 1 Low fOSC fOSC / 2 2 High High fOSC fOSC / 4 4 NDRV1 NDRV2 CLK OSC SEL2 = 0, SEL1 = 0 NDRV1 NDRV2 CLK OSC 1012 fOSC = 32 × RRT where fOSC is the oscillator frequency and RRT is a resistor connected from RT to AGND in ohms. Place a 1nF capacitor from RT to AGND for stability and to filter out noise. When the fCLK:fNDRV_ ratio is set to 4, the NDRV1 and NDRV2 switching frequency is limited to one-fourth f OSC . When operating the MAX5077 with the fCLK:fNDRV_ ratios set to 1 or 2 (see the Synchronizing Clock Output section), the NDRV1 and NDRV2 switching frequency is set to one-half fOSC. Synchronizing Clock Output The MAX5077 provides a buffered clock output that can be used to synchronize the oscillator input of a PWM controller. CLK is powered from an internal 5V regulator and sources/sinks up to 10mA. Two logic inputs (SEL2, SEL1) select CLK output frequency to 1x, 2x, or 4x with respect to NDRV1 and NDRV2 switching frequency (see Table 1 and Figure 2). Drive SEL2 and SEL1 low to disable NDRV1, NDRV2, and CLK outputs. There is a typical 30ns delay from CLK to NDRV_ output. SEL2 = 0, SEL1 = 1 NDRV1 NDRV2 CLK OSC SEL2 = 1, SEL1 = 0 NDRV1 NDRV2 CLK OSC SEL2 = 1, SEL1 = 1 Figure 2. MAX5077 CLK Timing Diagram 6 fCLK to fNDRV RATIO High Internal Oscillator An external resistor at RT programs the MAX5077’s internal oscillator frequency from 50kHz to 1.5MHz. The MAX5077 NDRV1 and NDRV2 switching frequencies are one-half or one-fourth the programmed oscillator frequency with a nominal 50% duty cycle. Use the following formula to calculate the internal oscillator frequency: SEL1 _______________________________________________________________________________________ Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output Supply Bypassing Pay careful attention to bypassing and grounding the MAX5077. Peak supply and output currents may exceed 3A when driving large MOSFETs. Ground shifts due to insufficient device grounding may also disturb other circuits sharing the same ground-return path. Any series inductance in the VCC, NDRV1, NDRV2, and/or GND paths can cause noise due to the very high di/dt when switching the MAX5077 with any capacitive load. Place one or more 0.1µF ceramic capacitors in parallel as close to the device as possible to bypass VCC to PGND. Use a ground plane to minimize ground-return resistance and inductance. Place the external MOSFETs as close as possible to the MAX5077 to further minimize board inductance and AC path impedance. Power Dissipation Power dissipation of the MAX5077 is a function of the sum of the quiescent current and the output current (either capacitive or resistive load). Maintain the sum of the currents so the maximum power dissipation limit is not exceeded. The power dissipation (PDISS) due to the quiescent switching supply current (ICCSW) can be calculated as: PDISS = VCC x ICCSW For capacitive loads, use the following equation to estimate the power dissipation: PLOAD = 2 x CLOAD x VCC2 x fNDRV_ Layout Recommendations The MAX5077 drivers source and sink large currents that can create very fast rise and fall edges at the gate of the switching MOSFETs. The high di/dt can cause unacceptable ringing if the trace lengths and impedances are not well controlled. Use the following PC board layout guidelines when designing with the MAX5077: • Place one or more 0.1µF decoupling ceramic capacitors from VCC to PGND as close to the device as possible. Connect VCC and all ground pins to large copper areas. Place one bulk capacitor of 10µF on the PC board with a low-impedance path to the VCC input and PGND of the MAX5077. • Two AC current loops form between the device and the gates of the driven MOSFETs. The MOSFET looks like a large capacitance from gate to source when the gate pulls low. The current loop is from the MOSFET gate to NDRV1/NDRV2 of the MAX5077, to PGND, and to the source of the MOSFETs. When the gate of the MOSFET is pulled high, the current is from the VCC terminal of the decoupling capacitor, to VCC of the MAX5077, to NDRV1/NDRV2, to the MOSFET gate and source. Both charging current and discharging current loops are important. Minimize the physical distance and the impedance in these AC current paths. • Keep the device as close to the MOSFET as possible. where C LOAD is the capacitive load at NDRV1 and NDRV2, VCC is the supply voltage, and fNDRV_ is the MAX5077 NDRV_ switching frequency. Calculate the total power dissipation (PT) as follows: PT = PDISS + PLOAD _______________________________________________________________________________________ 7 MAX5077 Applications Information Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output MAX5077 Pin Configuration Chip Information TRANSISTOR COUNT: 1335 PROCESS: BiCMOS TOP VIEW N.C. 1 SEL1 2 CLK 3 I.C. 4 14 I.C. 13 SEL2 12 VCC MAX5077 RT 5 11 NDRV2 10 NDRV1 AGND 6 9 PGND DGND 7 8 N.C. *EP TSSOP *EXPOSED PADDLE CONNECTED TO DGND. 8 _______________________________________________________________________________________ Push-Pull FET Driver with Integrated Oscillator and Programmable Clock Output TSSOP 4.4mm BODY.EPS XX XX PACKAGE OUTLINE, TSSOP, 4.40 MM BODY, EXPOSED PAD 21-0108 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX5077 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)