PAM3101 - Diodes Incorporated

A Product Line of
Diodes Incorporated
PAM3101
300mA HIGH PSRR LOW-DROPOUT CMOS LINEAR REGULATOR
Description
Pin Assignments
The PAM3101 series of positive voltage linear regulators feature low
quiescent current (65µA typ.) and low dropout voltage, making them
ideal for battery powered applications. Their high PSRR make them
Top View
TSOT25
useful in applications where AC noise on the input power supply must
be suppressed. Space-saving TSOT25, SOT-23, SOT-89, SC70 and
DFN1.6x1.6-6L packages are attractive for portable and handheld
applications. They have both thermal shutdown and current limit
features to prevernt device failure from extreme operating conditions.
They are stable with an output capacitor of 2.2µF or greater.
Features

Low Dropout Voltage: 180mV@300mA (VO = 3.3V)

Output Voltage Accuracy within ±2%

Supply Voltage Range: 2.5V to 5.5V

Quiescent Current: 65µA typ.

High PSRR: 70dB@1kHz

Excellent Line and Regulation

Fast Discharge

Current Limiting

Short Circuit Protection

Low Temperature Coefficient

Shutdown Current: 0.5µA

Thermal Shutdown

Space Saving Packages: TSOT25, SOT-23, SOT-89, SC70 and
DFN1.6x1.6

Pb-Free Packages
Applications

Cellular Phones

Bluetooth Earphones

Digital Cameras

Portable Electronics

WLANs

MP3 Players
PAM3101
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PAM3101
Typical Applications Circuit
Pin Configuration and Description
Package
Type
SOT23-3
TSOT25
SOT89-3
SOT89-5
SC-70-3L
SC70-4L
SC70-5L
DFN1.6x1.6-6L
Pin Name
VIN
GND
VOUT
EN
BYP
NC
Pin Number
1
2
3
4
5
6
GND
VIN
VOUT
VIN
VIN
GND
VOUT
VOUT
VIN
EN
VIN
EN
VOUT
VIN
—
—
—
VOUT
GND
—
—
—
GND
VIN
—
—
—
GND
EN
BYP
VOUT
—
GND
EN
NC
VOUT
—
—
VIN
VOUT
—
—
GND
VIN
—
—
—
GND
NC
EN
VIN
—
VOUT
GND
—
—
—
GND
VOUT
VIN
—
—
GND
EN
BYP
VOUT
—
NC
VIN
VOUT
NC
GND
Function
Input
Ground
Output
Chip Enable (active high)
PAM3101BABXXX----EN default floating
Other part no----EN default pull high
Bypass Pin, need a 10nF capacitor connect to GND
No Connection
PAM3101
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PAM3101
Functional Block Diagram
Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability. All voltages are with respect to ground.
Parameter
Input Voltage
Output Current
Output Pin Voltage
Lead Soldering Temperature
Storage Temperature
ESD Rating
Rating
6.0
300
Unit
V
mA
GND -0.3 to VIN +0.3V
300, (5sec)
-65 to +150
Class B
°C
°C
V
Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Parameter
Rating
Unit
Supply Voltage Range
2.5 to 5.5
V
Junction Temperature
-40 to +125
Operation Temperature
-40 to +85
PAM3101
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PAM3101
Thermal Information
Parameter
Symbol
θJC
Thermal Resistance Junction to Case)
Thermal Resistance (Junction to Ambient)
Internal Power Dissipation (@TA = 25°C)
θJA
PD
Package
Max
TSOT25/SOT23
130
SOT-89
100
SC70
160
DFN1.6x1.6
65
TSOT25/SOT23
250
SOT-89
180
SC70
300
DFN1.6x1.6
175
TSOT25/SOT23
400
SOT-89
550
SC70
300
DFN1.6x1.6
570
Unit
°C/W
mW
Electrical Characteristics (@TA = +25°C, VCE1 = VCE2 = VIN = VO +1V, CIN = 2.2µF, CO = 2.2µF, unless otherwise specified.)
Parameter
Symbol
Input Voltage
VIN
Output Voltage
VO
Output Current
IO
Dropout Voltage
Ground Current
Quiescent Current
Line Regulation
Load Regulation
Temperature Coefficient
VDROP
IGND
IQ
LNR
LDR
Test Conditions
Min
IO = 1mA
Typ
Max
Units
Note 1
5.5
V
-2
+2
%
Note 2
mA
300
VO = 1.5V
1150
1400
VO = 1.8V
850
1100
2.5V ≤ VO < 3.3V
370
450
VO ≥ 3.3V
180
230
IO = 1mA to 300mA
70
90
µA
IO = 0mA
65
90
µA
IO = 300mA
mV
IO = 1mA, VO < 2V, VIN = 2.8V to 3.8V
-0.15
0.10
0.15
IO = 1mA, 2V ≤ VO < 3.3V, VIN = VO +0.5V to VO +1V
-0.10
0.03
0.10
IO = 1mA, VO ≥ 3.3V, VIN = VO +0.5V to VO +1V
-0.4
0.2
0.4
1
+2
%
30
60
mV
IO = 1mA to 300mA, VO ≥ 2V
-2
IO = 1mA to 300mA, VO < 2V
%/V
TC
IO = 1mA
40
ppm/°C
Over Temperature Shutdown
OTS
IO = 1mA
150
°C
Over Temperature Hysteresis
OTH
30
°C
Power Supply Ripple Rejection
PSRR
IO = 1mA
IO = 100mA
CBYP = 10nF
VO = 3.3V
Output Noise
VN
f = 10Hz to 100kHz, CBYP = 10nF
CE Input High Threshold
VTH
VIN = 2.5V to 5V
CE Input Low Threshold
VTL
VIN = 2.5V to 5V
Shutdown Current
ISD
VEN = 0V
Notes:
f = 100Hz
70
f = 1kHz
65
dB
50
µVRMS
1.5
V
0.01
0.3
V
1
µA
1. The minimym inout voltage (VIN(MIN) of the PAM3101 is determined by output voltage and dropout voltage. The minimum input voltage is defined as:
VIN(MIN) = VO +VDROP
2. Output current is limited by PD, maximum IO = PD/(VIN(MAX) – VO).
PAM3101
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PAM3101
Typical Performance Characteristics
(@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.)
PAM3101
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PAM3101
Typical Performance Characteristics (cont.)
(@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.)
PAM3101
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PAM3101
Typical Performance Characteristics (cont.)
(@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.)
PAM3101
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PAM3101
Typical Performance Characteristics (cont.)
(@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.)
PAM3101
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PAM3101
Typical Performance Characteristics (cont.)
(@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.)
PAM3101
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PAM3101
Typical Performance Characteristics (cont.)
(@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.)
PAM3101
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PAM3101
Application Information
Capacitor Selection and Regulator Stability
Similar to any low dropout regulator, the external capacitors used with the PAM3101 must be carefully selected for regulator stability and
performance.
A capacitor CIN of more than 1μF can be employed in the input pin, while there is no upper limit for the capacitance of CIN. Please note that the
distance between CIN and the input pin of the PAM3101 should not exceed 0.5 inch. Ceramic capacitors are suitable for the PAM3101.
Capacitors with larger values and lower ESR (equivalent series resistance) provide better PSRR and line-transient response.
The PAM3101 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using
an output ceramic capacitor whose value is >2.2μF with ESR>5mΩ ensures stability.
A 10nF bypass capacitor connected to BYP pin is suggested for suppressing output noise. The capacitor, in series connection with an internal
200kΩ resistor, forms a low-pass filter for noise reduction. Increasing the capacitance will slightly decrease the output noise, but increase the
start-up time.
Load Transient Consideration
Curve 10 of the PAM3101 load-transient response on page 10 shows two components of the output response: a DC shift from the output
impedance due to the load current change and transient response. The DC shift is quite small due to excellent load regulation of the PAM3101.
The transient spike, resulting from a step change in the load current from 1mA to 300mA, is 20mV. The ESR of the output capacitor is critical to
the transient spike. A larger capacitance with smaller ESR results in a smaller spike.
Shutdown Input Operation
The PAM3101 is shut down by pulling the EN input low, and is turned on by tying the EN input to VIN.
Internal P-Channel Pass Transistor
The PAM3101 features a 0.75Ω P-Channel MOSFET device as a pass transistor. The PMOS pass transistor enables the PAM3101 to consume
only 65μA of ground current during low dropout, light-load, or heavy-load operations. This feature increases the battery operation life time.
Input-Output (Dropout) Voltage
A regulator's minimum input-output voltage difference (or dropout voltage) determines the lowest usable supply voltage. The PAM3101 has a
typical 300mV dropout voltage. In battery powered systems, this will determine the useful end-of-life battery voltage.
Current Limit and Short Circuit Protection
The PAM3101 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output current can be limited to
400mA by regulating the gate voltage. The PAM3101 also has a built-in short circuit current limit.
Thermal Considerations
Thermal protection limits power dissipation in the PAM3101. When the junction temperature exceeds +150°C, the OTP (Over Temperature
Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature
drops below +120°C.
For continuous operation, the junction temperature should be maintained below +125°C. The power dissipation is defined as:
PD  VIN  V OUT  * IO  VIN * IGND
The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surrounding airflow and temperature
difference between junction and ambient. The maximum power dissipation can be calculated by the following formula:


PD(MAX )  TJ(MAX )  T A / JA
Where TJ(MAX) is the maximum allowable junction temperature +125°C , TA is the ambient temperature and θJA is the thermal resistance from the
junction to the ambient.
PAM3101
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Application Information (cont.)
For example, as θJA is 250°C/W for the SOT-23 package and 180°C/W for the SOT-89 package based on the standard JEDEC 51-3 for a singlelayer thermal test board, the maximum power dissipation at TA +25°C can be calculated by following formula:
PD(MAX)  125C  25C / 250  0.4 W SOT-23
PD(MAX)  125C  25C / 180  0.55 W SOT-89
It is also useful to calculate the junction temperature of the PAM3101 under a set of specific conditions. Suppose the input voltage VIN = 3.3V,
the output current IO = 300mA and the case temperature TA = +40°C measured by a thermalcouple during operation, the power dissipation for
the VO = 2.8V version of the PAM3101 can be calculated as:
PD  3.3 V  2.8 V  * 300mA  3.3 V * 70A  150mW
And the junction temperature, TJ can be calculated as follows:
TJ = TA + PD*θJA
TJ = 40°C +0.15W*250°C/W
= 40°C +37.5°C
= 77.5°C<TJ(MAX) = +125°C
For this application, TJ is lower than the absolute maximum operating junction temperature, +125°C, so it is safe to use the PAM3101 in this
configuration.
PAM3101
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PAM3101
Ordering Information
Pin Configuration
E Type:
1. GND
1. VOUT
2. VOUT
2. GND
3. VIN
3. NC
B Type:
4. EN
1. VIN
(EN Default
2. GND
floating
3. EN
5. VIN
(EN Default
F Type:
floating
1. EN
4. NC
(EN Default
5. VOUT
floating
C Type:
2. NC
1. VOUT
3. VIN
2. GND
4. VOUT
3. VIN
5. NC
D Type:
6. GND
1. VIN
G Type:
2.GND
1. VIN
3.EN
2. VOUT
(EN Default
3. GND
pull high
H Type:
4.BYP
1. GND
5.VOUT
2. VIN
3. VOUT
A Type:
PAM3101
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Package Type
A: TSOT25/SOT23
C: SOT-89
U: SC70
K: DFN1.6x1.6
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Number of Pins
A: 3
K: 4
B: 5
F: 6
Output Voltage
475: 4.75V
400: 4.0V
380: 3.8V
330: 3.3 V
310: 3.1V
290: 2.9V
285: 2.85V
280: 2.8V
250: 2.5V
200: 2.0V
180: 1.8V
150: 1.5V
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PAM3101
Ordering Information (cont.)
PAM3101
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Ordering Information (cont.)
PAM3101
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Ordering Information (cont.)
PAM3101
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Ordering Information (cont.)
PAM3101
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Marking Information
Top View
TSOT25
PAM3101
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Package Outline Dimensions (All dimensions in mm.)
SOT23-3
PAM3101
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Package Outline Dimensions (cont.) (All dimensions in mm.)
TSOT25
PAM3101
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Package Outline Dimensions (cont.) (All dimensions in mm.)
PAM3101
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Package Outline Dimensions (cont.) (All dimensions in mm.)
PAM3101
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Package Outline Dimensions (All dimensions in mm.)
PAM3101
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Package Outline Dimensions (All dimensions in mm.)
DFN 1.6x1.6-6L
PAM3101
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IMPORTANT NOTICE
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
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without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
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This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
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Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
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