AN008 A Basis for LDO and It`s Thermal Design

AN008
A Basis for LDO and It’s Thermal Design
Introduction
The AIC LDO family device, a 3-terminal
regulator, can be easily used with all protection
features that are expected in high performance
voltage regulation application. These devices
provide
short-circuit
protection,
thermal
shutdown protection and internal current limit
protection against any overload condition that
would create over heating junction temperature.
(1)Current Limit Protection
Like other power regulation IC, the AIC LDO
family has safety protection area. The current
limit
protection
works
while
outputting
heavy-loading current and keeps the output
current within a safe operating scope. The output
voltage decreases to a lower voltage level at the
same time. The AIC LDO family protection
function is designed to set up output current limit
when over-current happen and the downstream
devices can be protected from being damaged.
Upper: output voltage (1V/DIV)
Lower: output current (2A/DIV)
(2) Protection Diodes
During normal operation, the AIC LDO device
needs no protection diode. The internal diode
between input and output pins can handle
microsecond surge current. Even with large
output capacitance, it is very difficult to get those
values of surge current in normal operation. The
damage will not occur, unless the high value
output capacitors and the input pin are shorted to
ground instantaneously. A crowbar circuit at the
input of the LDO device can generate those kinds
of current and a diode from output-to-input is then
recommended. Normal power supply cycling or
even plugging and unplugging in the system will
not generate sufficient large current to damage
device (see Figure 2).
AIC1086
Topology
D1
Function
block
diagram
VIN
+
VOUT
+
CIN
Figure 2
Diagram
COUT
AIC1086
Protection
Diodes
(3) Ripple Rejection
Figure 1 AIC1086 Current Limit Test
It is recommended to use the AIC LDO family
May 2000
1
AN008
device in the application required improving
ripple rejection.
By connecting a bypass capacitor from the ADJ
pin to the ground can reduce the output voltage
ripple significantly (see Figure3). The bypass
capacitor prevents output ripple from being
amplified as the output voltage or loading current
increases. The function is defined by:
1
≤ R1
2p ∗ Fr ∗ C ADJ
Here the Fr is the output ripple frequency and
the CADJ is a bypass capacitor (For figure 4). The
ripple rejection capability intensifies as output
capacitor increases, the output ripple will then be
reduced. For more information, please refer to
AIC LDO family datasheet.
AIC1086
Topology
D1
Function
block
diagram
VIN
R1
+
CIN
Ripple Rejection (dB) (AIC1722D - 33)
COUT
R2
CADJ
AIC1086 and
Bypass Capacitor
60
C : COUT=1µF, IL=1mA
D : COUT=1µF, IL=40mA
VIN=5V DC + 1Vp-p
50
45
40
35
(b) Figure 6: When the adjustable type regulator
is used, the load should be connected to the
output terminal on the positive side and the
ground terminal on the negative side. The
output voltage is measured as the following
equation:
VL = VREF ×
R1 + R2
− Io (RS1 + RS2
R1
(c) Load regulation is the circuit’s ability to
maintain the specified output voltage level
under different load conditions, which is
defined as:
∆VOUT
∆IO
Here, Q1 is the series pass element, and β is the
current gain of Q1. Gm is the transconductance
of the error amplifier at its operating point.
30
25
20
15
0.1
VL = Vout − Io (RS1 + RS2)
Figure 7 shows a PMOS voltage regulator. The
ratio of output voltage variation to the given load
current variation (∆VOUT/∆Iο) under constant
input voltage Vi can be calculated as follow.
B : COUT=10µF, IL=1Ma
55
Being a three-terminal device, the AIC LDO
family is unable to provide true remote load
sensing. The resistance of the wire connecting
the regulator to the load will limit the load
regulation. Please refer to the datasheet for the
detail measurement.
(a) Figure 5: When the fixed type regulator is
used, the load should be connected to the
output terminal on the positive side and the
ground terminal on the negative side. The
output voltage is measured as the following
equation:
VOUT
+
Figure 3
(CADJ)
(4) Load Regulation
1
10
100
Frequency (KHz)
Figure 4 AIC 1722D-33 Frequency and
Ripple Rejection
Assume that there is a small output current
change (∆Iο), The change of output current
causes the output voltage to change was
calculated as:
∆Vout = ∆IoREQ(REQ = (R1 + R2) RL ≈ RL )
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AN008
Where REQ is the equivalent output resistor .The
change of sensed voltage multiplied by Gm of
the error amplifier input difference and β of the
PMOS current gain (Figure7) must be large
enough to achieve the specified change of
output current. Thus,
∆IO = βGM∆V + = βGM(
Q1 (β) Iο→
VIN
VOUT
-
R2
)∆VOUT
R1 + R2
GM
+
ERROR
AMP.
R1
RL
R2
V Reference
GND
Figure 7
PMOS Voltage Regulator
Then, the load regulator is obtained from above
equation.
(5) Quiescent Current or Ground Current
∆VOUT
1 R1 + R2
=
∆Io
βGm
R2
Since load regulation is a steady-state
parameter, all frequency components are
neglected. The load regulation is limited by the
open loop current gain of the system. As noted
from the above equation, increasing dc open
loop current gain improved load regulation.
RS1
VIN
VIN
VOUT
VOUT
GND
RL
RS2
GND
Figure 5 AIC LDO Fixed Regulator
VIN
VIN
VOUT
GND
RS1
R1
R2
VOUT
RL
RS2
GND
Figure 6 AIC LDO Adjustable Regulator
Quiescent current or ground current is the
difference between input and output current for
AIC LDO family. Minimum quiescent current is
necessary to maximize current efficiency. It is
defined:
I q = Ii − I o
Quiescent current consists of bias current and
drive current of the series pass element, which
does not contribute to output power. The series
pass element, function diagram, ambient
temperature, and etc, determine the value of
quiescent current. Linear dropout voltage
usually employ bipolar or MOS transistors as
series pass elements.
(a) Figure 8 :The collector current of bipolar
transistors is defined by:
IC = β IB
Where IC is the collector current of bipolar
transistor, β is the common-emitter current gain
of bipolar transistor and IB is the base current of
bipolar transistor. The base current of bipolar
transistor is proportional to the collector current.
When the output current increases, the base
current increases, too. Since the base current
contributes to quiescent current, bipolar
transistors have higher quiescent current than
MOS transistors. At the same time, during the
dropout region the quiescent current will
increase, because of the additional parasitic
current path between the emitter and the base of
bipolar transistors, which is caused by a lower
base voltage than that of the output voltage.
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AN008
(b) Figure 9 the drain source current of MOS
Figure 10 and figure 11 show the ground current
with respect to input voltage and temperature.
transistors is defined by:
ID = K(VGS − VT )2 (1 + λVDS )(λVDS ≈ 0)
Ground Current vs. Input Voltage
⇒ ID = K(VDS − VT)2
The drain current is a function of the gate to
source voltage, not the gate current.
β
Ground Current (µA)
60
K is a MOS transistor conductivity
parameter
Vgs is the gate to source voltage
Vt is the MOS threshold voltage
50
40
30
20
10
0
0
IB3
IC
2
4
6
Input Voltage (V)
8
10
12
IB2
IB1
VCC
Figure 8
Figure 10 AIC1722
Input
and
Current Characteristics
Ground
Ground Current vs. Temperature
I-V Characteristics of Bipolar
60
Transistors
K
ID
VGS4
VGS3
VGS2
Ground Current (µA)
58
IL =300mA
56
IL =150mA
54
IL=0.1mA
52
VGS1
50
VDS
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 9 I-V Characteristic of MOS Transistors
Figure 11 AIC 1722 Temperature and Ground
Current Characteristics
For bipolar transistors, the quiescent current
increases proportionally with the output current
because the series pass element is a
current-driven device. For MOS transistors, the
quiescent current has a near constant value with
respect to the load current since the device is
voltage-driven. The only things that contribute to
the quiescent current for MOS transistors are the
biasing currents of band-gap, sampling resistor,
and error amplifier. In most applications where
power consumption is critical or where small
bias current is requested in comparison with the
output current, an LDO voltage regulator using
MOS transistors is an essential choice.
(6) Thermal Considerations
The AIC LDO family has internal power and
thermal-limiting circuitry, which is designed to
protect the device against overload conditions.
For continuous normal load conditions, however,
maximum ratings of junction temperature must
not be exceeded. It is important to pay more
attention to all sources of thermal resistance
from junction to ambient . This includes
junction-to-case, case-to-heat sink interface,
and heat sink resistance itself.
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AN008
We take the following condition as an example of
AIC 1086.
VIN (max continuous)=5V,
VOUT=3.3V,
IOUT=1A ,
regulator, The dropout voltage and quiescent
current must be reduced. In addition, the dropout
voltage between input and output must be
minimized since the power dissipation of LDO
regulators affects to the efficiency significantly.
Power dissipation = (Vi – Vo) Io
TA=70ºC
For example of AIC1722:
θHEAT SINK=1ºC/W,
θCASE-TO-HEATSINK=0.2ºC/W
for
package with thermal compound.
Input voltage is 5V
TO-220
Output voltage is 3.3V
Output current is 300mA
Power dissipation under these conditions can be
calculated:
PD=(VIN-VOUT)(IOUT)=1.7W
Ground (max) current is 80µA
300mA × 3.3
× 100%
(300mA + 88µ8 ) × 5
= 66%
E=
Junction temperature will be equal to:
TJ=TA+PD(θHEAT SINK + θCASE-TO-HEAT SINK + θJC)
For the operating junction temperature range:
TJ =70ºC+1.7W(1ºC/W+0.2ºC/W+0.7ºC/W)
(8) Layout Note
According to the following parameter, we can
achieve the maximum allowable Temperature
Rise, (TR)
TR= TJ (max)- TA (max)
=73.23ºC
73.23ºC<125ºC=TJMAX
(Operating Junction Temperature Range)
For the storage temperature range:
TJ =70ºC +1.7W (1ºC / W+0.2ºC / +3ºC /W)
=77.14ºC
where TJ (max) is the maximum allowable
junction temperature (125ºC ), and TA (max) is
the maximum ambient temperature suitable in
the application. Use the calculated values for TR
and PD, the maximum allowable value of the
junction-to-ambient thermal resistance (θJA) can
be calculated:
θJA=TR/PD
77.14ºC<150ºC=TJMAX
(Storage Temperature Range)
In the above two cases, the junction temperature
are lower than the maximum rating, and this
ensure a reliable operation.
(7) Efficiency
The quiescent or ground current and
input/output voltage are with respect to the
efficiency of a LDO regulator input/output
voltage with following equation:
E=
I o Vo
× 100 %
I o + I g Vi
(
)
In order to achieve a higher efficiency for LDO
If the maximum allowable value for θJA is
achieved to be ≥ 133ºC /W for SOT-223 package
or ≥ 74ºC /W for TO-220 package or ≥102ºC /W
for TO-263 package, no heatsink is needed
since the package will dissipate heat to satisfy
these requirements. If the calculated value for
θJA falls below these limits, extra heatsink for
LDO device is required.
TABLE 1. θJA Different Heatsink Area
Table 1 shows the values of the θJA of SOT-223
and TO-263 for different heatsink area. The
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AN008
copper patterns that we used to measure these
θJA are shown as below.
Copper Area
Layout
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
2
Top Side (in )*
Bottom Side (in )*
0.012
0.064
0.3
0.52
0.75
1
0
0
0
0
0
0.065
0.174
0.283
0.391
0.4
0
0
0
0
0
0
0.2
0.4
0.6
0.8
1
0.065
0.174
0.283
0.391
0.4
Thermal Resistance
(θJA °C/W)
(θJA °C/W)
TO-263
SOT-223
102
133
83
122
61
82
53
73
51
67
46
63
83
117
69
94
62
87
54
81
55
78
88
123
71
92
60
82
55
75
53
70
TABLE 2. AIC LDO Series Temperature table
(-)èSince IC’s temperature can rise up, these operation conditions are not recommended.
Test IC TYPE AIC1722-33CZL(TO-92) without heat sink
Power
Long time test:
0.5W
0.7W(-)
dissipation
Ta: 28ºC
Test time: 20min.
Load current
298mA
417mA
No load:
Input voltage: 5VDC
Output voltage
3.302V
3.307V
Output
Package
70ºC
81ºC
voltage :3.322VDC
Test IC TYPE AIC1722-33CZL(SOT-89)IC stick on PCB
Power
Long time test
0.5W
0.6W(-)
dissipation
Ta: 28ºC
Test time: 20min.
Load current
290mA
348mA
No load:
Input voltage: 5VDC
Output voltage
3.305V
3.299V
Output
Package
70ºC
80ºC
voltage:3.278VDC
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AN008
Test IC TYPE AIC1723-33CE(TO-252)IC stick on PCB
Power
Long time test
0.5W
0.9W
dissipation
Ta: 28ºC
Test time: 20min.
Load current
300mA
538mA
No load :
Input voltage: 5VDC
Output voltage
3.321V
3.313V
Output
Package
40ºC
50ºC
voltage:3.328VDC
Test IC TYPE AIC1723-33CF(TO-251) without heat sink
Power
0.9W
1W
Dissipation
Long time test
Ta: 28ºC
Load Current
524mA
582mA
Test time: 20min.
No load:
Output Voltage
3.294V
3.295V
Input voltage: 5VDC
Output
Package
63ºC
66ºC
voltage:3.284VDC
Junction
80ºC
87ºC
Test IC TYPE AIC1084CT(TO-220) without heat sink
Power
1W
3W(-)
Long time test
Dissipation
Ta: 28ºC
Load Current
600mA
1.802A
Test time: 20min.
No load:
Output Voltage
3.331V
3.311V
Input voltage: 5VDC
Output
Package
55ºC
99ºC
voltage:3.335VDC
Junction
66ºC
124ºC
Test IC TYPE AIC1084CT(TO-220) with heat sink
Power
Long time test
1W
3W
Dissipation
Ta: 28ºC
Test time: 20min.
Load Current
600mA
1.802A
No load:
Output Voltage
3.333V
3.322V
Input voltage: 5VDC
Output
Package
47ºC
61ºC
voltage:3.335VDC
Junction
54ºC
85ºC
Test IC TYPE AIC1084CT(TO-220) IC stick on PCB
Power
Long time test
1W
3W
Dissipation
Ta : 28ºC
Test time: 20min.
Load Current
600mA
1.802A
No load:
Output Voltage
3.333V
3.324V
Input voltage: 5VDC
Output
Package
41ºC
66ºC
voltage:3.335VDC
Junction
46ºC
75ºC
1W(-)
598mA
3.316V
57ºC
1.1W(-)
641mA
3.296V
73ºC
96ºC
6W(-)
3.604A
3.291V
127ºC
176ºC
6W(-)
3.604A
3.219V
88ºC
113ºC
6W(-)
3.604A
3.197V
93ºC
110ºC
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AN008
Test IC TYPE AIC1084CM(TO-263) IC stick on PCB
Power
1W
3W
6W(-)
Long time test
Dissipation
Ta: 28ºC
Load Current
594mA
1.784A
3.567A
Test time: 20min.
No load:
Output Voltage 3.314V
3.296V
3.242V
Input voltage : 5VDC
Package
Output
40ºC
74ºC
88ºC
voltage:3.318VDC
Junction
44ºC
90ºC
108ºC
Test IC TYPE AIC1085CT(TO-220) without heat sink
Power
1W
3W(-)
Long time test
Dissipation
Ta: 28ºC
Load Current
556mA
1.667A
Test time: 20min.
No load:
Output Voltage
3.193V
3.173V
Input voltage: 5VDC
Output
Package
56ºC
90ºC
voltage:3.200VDC
Junction
76ºC
146ºC
Test IC TYPE AIC1085CT(TO-220) with heat sink
Power
1W
3W
Dissipation
Long time test
Ta : 28ºC
Test time: 20min.
No load:
Input voltage: 5VDC
Output
voltage:3.200VDC
7W(-)
4.162A
3.077V
100ºC
120ºC
6W(-)
3.333A
3.285V
130ºC
193ºC
6W(-)
Load Current
556mA
1.667A
3.333A
Output Voltage
3.192V
3.179V
3.176V
Package
40ºC
56ºC
95ºC
Junction
50ºC
80ºC
138ºC
Test IC TYPE AIC1085CT(TO-220) IC stick on PCB
Power
1W
3W
Long time test
Dissipation
Ta : 28
Load Current
556mA
1.667A
Test time: 20min.
No load:
Output Voltage
3.199V
3.192V
Input voltage: 5VDC
Package
Output
45ºC
65ºC
voltage:3.200VDC
Junction
54ºC
85ºC
Test IC TYPE AIC1085CM(TO-263) IC stick on PCB
Power
Long time test
1W
3W
Dissipation
Ta : 28ºC
Load Current
595mA
1.788A
Test time: 20min.
No load:
Output Voltage
3.321V
3.310V
Input voltage: 5VDC
Output
Package
40ºC
64ºC
voltage:3.322VDC
Junction
47ºC
88ºC
6W(-)
3.333A
3.174V
100ºC
132ºC
6W(-)
3.576A
3.192V
80ºC
100ºC
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AN008
Test IC TYPE AIC1117CE(TO-252) IC stick on PCB
Power
Long time test
1W
1.5W
Dissipation
Ta : 28ºC
Load Current
561mA
841mA
Test time: 20min.
No load:
Output Voltage
3.204V
3.192V
Input voltage : 5VDC
Output
Package
55ºC
68ºC
voltage:3.217VDC
Junction
60ºC
70ºC
2W(-)
1.122A
3.184V
80ºC
84ºC
(9) Summary
Install a 10µF (or greater) capacitor is required
between the AIC LDO family device’s output and
ground pins for the reason of stability. Without
this capacitor, the part will oscillate. Even though
most types of capacitor may work, the equivalent
series resistance (ESR) should be held to 5Ω or
less, if aluminum electrolytic type is used. Many
Aluminum
electrolytic
capacitors
have
electrolytes that will freeze under -30°C, so solid
tantalums are recommended for operation below
-25°C. The value of this capacitor may be
increased without limit.
A 10µF (or greater) capacitor should be placed
from the AIC LDO family input to ground if the
lead inductance between the input and power
source exceeds 500nH (approximately 10
inches of trace).
9