ASAHI KASEI [AK4556] AK4556 3V 192kHz 24Bit ∆Σ CODEC AK4556 24bit 192kHz S/N ADC DAC A/D, D/A 103dB,106dB 216kHz (SCF) S/N AK4556 20pin TSSOP ADC - DC-offset HPF (fc = 1Hz @ fs=48kHz) - S/(N+D): 91dB@VA=3.0V - Dynamic Range, S/N: 103dB@VA=3.0V DAC (32kHz, 44.1kHz, 48kHz) - S/(N+D): 90dB@VA=3.0V - Dynamic Range, S/N: 106dB@VA=3.0V I/F : MSB First, 2’s Complement - ADC: 24bit MSB justified or I2S compatible - DAC: 24bit MSB justified, 24bit LSB justified or I2S compatible : ADC = 2.1Vpp @ VA=3.0V DAC = 2.1Vpp @ VA=3.0V / : - Normal Speed: 8kHz to 54kHz (256fs or 512fs) 8kHz to 48kHz (384fs or 768fs) - Double Speed: 54kHz to 108kHz (256fs) 48kHz to 96kHz (384fs) - Quad Speed: 108kHz to 216kHz (128fs) 96kHz to 192kHz 192fs) : : 256fs, 384fs, 512fs or 768fs (Normal Speed) 256fs or 384fs (Double Speed) 128fs or 192fs (Quad Speed) : 256fs or 512fs (Normal Speed) 256fs (Double Speed) 128fs (Quad Speed) : 2.4 to 3.6V (Normal Speed, Double Speed) 2.7 to 3.6V (Quad Speed) : 27.5mA Ta = -40 to 85°C : 20pin TSSOP AK4552 MS0559-J-00 2006/11 -1- ASAHI KASEI [AK4556] VA LIN RIN VCOM VSS VD PDN ∆Σ Modulator Decimation Filter ∆Σ Modulator Decimation Filter Clock Divider MCLK LRCK BCLK Serial I/O Interface Common Voltage SDTO SDTI CKS3 LOUT LPF ∆Σ Modulator LPF ∆Σ Modulator CKS2 8X CKS1 Interpolator CKS0 ROUT 8X DEM0 Interpolator DEM1 Figure 1. Block Diagram AK4552 1. Function fs (max) HFP Cut-off HPF Disable ADC Input Level Input Resistance Init Cycle S/(N+D) DR, S/N DF SA SB GD DAC Output Level Road Resistance S/(N+D) DR, S/N DF SA GD MCLK (Slave) Monitor Mode M/S mode Audio I/F ADC DAC Idd (Vdd=3V) VDD Package AK4552 100kHz 3.7Hz @ fs = 48kHz No AK4556 216kHz 1Hz @ fs = 48kHz Yes 0.617 x VA 34kΩ @ fs = 44.1kHz, 24kΩ @ fs = 96kHz 2081/fs 89dB 97dB 65dB 29.4kHz 17/fs 0.7 x VA 8kΩ@ fs = 48kHz, 96kHz, 192kHz 4134/fs @ Normal Speed, Slave mode 91dB 103dB 68dB 28kHz 18/fs 0.583 x VA 10kΩ 88dB 100dB 43dB 15.4/fs 256/384/512/768fs @ Normal Speed 256/384fs @ Double Speed 128/192fs @ Double Speed Monitor 64/96/128/192fs @ Quad Speed Monitor Yes (Double / Quad) Slave 24bit MSB justified 24bit LSB justified 14mA 2.4V to 4.0V 0.7 x VA 5kΩ 90dB 106dB 54dB 21/fs 256/384/512/768fs @ Normal Speed 16TSSOP (5.0mm x 6.4mm, 0.65mm Pitch) MS0559-J-00 256/384fs @ Double Speed 128/192fs @ Quad Speed No Master / Slave 24bit MSB justified / I2S 24bit MSB justified /24bit LSB justified / I2S 27.5mA 2.4V to 3.6V (Normal/Double Speed) 2.7V to 3.6V (Quad Speed) 20TSSOP (6.5mm x 6.4mm, 0.65mm Pitch) 2006/11 -2- ASAHI KASEI [AK4556] 2. RIN 1 20 ROUT LIN 2 19 LOUT VSS 3 18 VCOM VA 4 17 PDN VD 5 16 BCLK DEM0 6 15 MCLK DEM1 7 14 LRCK SDTO 8 13 SDTI CKS0 9 12 CKS3 CSK1 10 11 CSK2 AK4552 Top View MS0559-J-00 AK4556 2006/11 -3- ASAHI KASEI [AK4556] AK4556VT AKD4556 -40 ∼ +85°C AK4556 20pin TSSOP (0.65mm pitch) RIN 1 20 ROUT LIN 2 19 LOUT VSS 3 18 VCOM VA 4 17 PDN VD 5 16 BCLK DEM0 6 15 MCLK DEM1 7 14 LRCK SDTO 8 13 SDTI CKS0 9 12 CKS3 CSK1 10 11 CSK2 Top View MS0559-J-00 2006/11 -4- ASAHI KASEI No. [AK4556] I/O 1 2 3 4 5 6 7 RIN LIN VSS VA VD DEM0 DEM1 I I I I 8 SDTO O 9 10 11 12 13 CKS0 CSK1 CSK2 CSK3 SDTI I I I I I 14 LRCK I/O 15 MCLK I 16 BCLK I/O 17 PDN I 18 VCOM O 19 LOUT O 20 ROUT O Note: Rch Analog Input Pin Lch Analog Input Pin Ground Pin Analog Power Supply Pin Digital Power Supply Pin De-emphasis Control Pin De-emphasis Control Pin Audio Serial Data Output Pin When PDN pin is “L”, SDTO pin outputs “L”. Mode Setting Pin #0 Mode Setting Pin #1 Mode Setting Pin #2 Mode Setting Pin #3 Audio Serial Data Input Pin Input/Output Channel Clock Pin When PDN pin is “L”, LRCK outputs “L” in master mode. Master Clock Input Pin Audio Serial Data Clock Pin When PDN pin is “L”, BCLK outputs “L” in master mode. Power-Down & Reset Mode Pin “L”: Power-down and Reset, “H”: Normal operation The AK4556 should be reset once by bringing PDN pin = “L”. Common Voltage Output Pin, 0.5 x VA Lch Analog Output Pin When PDN pin is “L”, LOUT pin becomes Hi-Z. Rch Analog Output Pin When PDN pin is “L”, ROUT pin becomes Hi-Z. (LIN, RIN) Analog Input Analog Output LIN, RIN LOUT, ROUT MS0559-J-00 2006/11 -5- ASAHI KASEI [AK4556] (VSS=0V; Note 1) Parameter Power Supplies Analog Digital Input Current (Any Pin Except Supplies) Analog Input Voltage (LIN, RIN pin) Digital Input Voltage (Note 2) Ambient Temperature (power applied) Storage Temperature Symbol VA VD IIN VINA VIND Ta Tstg min -0.3 -0.3 -0.3 -0.3 -40 -65 max 4.6 4.6 ±10 VA+0.3 VD+0.3 85 150 Units V V mA V V °C °C Note 1. Note 2. DEM1, DEM0, CKS3, CKS2, CKS1, CKS0, SDTI, LRCK, BCLK, MCLK, PDN pin : (Normal/Double Speed) (VSS=0V; Note 1) Parameter Power Supplies (Note 3) Analog Digital Difference Symbol VA VD VD - VA min 2.4 2.4 - typ 3.0 3.0 - max 3.6 3.6 0.3 Units V V V typ 3.0 3.0 - max 3.6 3.6 0.3 Units V V V (Quad Speed) (VSS=0V; Note 1) Parameter Power Supplies (Note 3) Note 1. Note 3. VA Analog Digital Difference Symbol VA VD VD - VA min 2.7 2.7 - VD : MS0559-J-00 2006/11 -6- ASAHI KASEI [AK4556] (Ta=25°C; VA=VD=3.0V; VSS=0V; fs=48kHz, 96kHz, 192kHz; Signal Frequency=1kHz; BCLK=64fs; Data=24bit Measurement frequency=20Hz ∼ 20kHz at fs=48kHz, 40Hz ∼ 40kHz at fs=96kHz, 40Hz ∼ 40kHz at fs=192kHz; unless otherwise specified) Parameter min typ max Units ADC Analog Input Characteristics: Resolution 24 Bits Input Voltage (Note 4) 1.9 2.1 2.3 Vpp S/(N+D) fs=48kHz −1dBFS 82 91 dB BW=20kHz −60dBFS 40 dB fs=96kHz −1dBFS 80 90 dB BW=40kHz −60dBFS 37 dB fs=192kHz −1dBFS 90 dB BW=40kHz −60dBFS 37 dB DR (−60dBFS with A-weighted) 95 103 dB S/N (A-weighted) 95 103 dB Input Resistance 6 8 kΩ Interchannel Isolation 90 110 dB Interchannel Gain Mismatch 0.1 0.5 dB Gain Drift 100 ppm/°C Power Supply Rejection (Note 8) 50 dB DAC Analog Output Characteristics: Resolution 24 Bits Output Voltage (Note 5) 1.9 2.1 2.3 Vpp S/(N+D) fs=48kHz 0dBFS 80 90 dB BW=20kHz −60dBFS 43 dB fs=96kHz 0dBFS 78 88 dB BW=40kHz −60dBFS 40 dB fs=192kHz 0dBFS 88 dB BW=40kHz −60dBFS 40 dB DR (−60dBFS with A-weighted) 98 106 dB S/N (A-weighted) 98 106 dB Load Capacitance (Note 6) 30 pF Load Resistance (Note 7) 5 kΩ Interchannel Isolation 90 110 dB Interchannel Gain Mismatch 0.1 0.5 dB Gain Drift 100 ppm/°C Power Supply Rejection (Note 8) 50 dB Note 4. 0dB VA 0dB VA Vin = 0.7 x VA (Vpp). Note 5. Vout = 0.7 x VA (Vpp). Note 6. LOUT/ROUT Note 7. AC Note 8. VCOM pin VSS pin 220Ω 2.2µF 0.1µF VA, VD MS0559-J-00 400pF 1kHz, 50mVpp 2006/11 -7- ASAHI KASEI [AK4556] Parameter min typ max Units - 19.5 8 11 14 29 12 17 21 mA mA mA mA Power Supplies Power Supply Current Normal Operation (PDN pin = “H”) VA VD fs=48kHz (Note 9) fs=96kHz fs=192kHz Power down mode (PDN pin = “L”) VA+VD Note 9. 15.2mA (typ.) @ fs=192kHz Note 10. VD (Note 10) 10 100 µA 8.3mA (typ.) @ fs=48kHz, 11.6mA (typ.) @ fs=96kHz, VSS (fs=48kHz) (Ta= -40 ∼ +85°C; VA, VD=2.4∼ 3.6V; DEM=OFF) Parameter Symbol ADC Digital Filter (Decimation LPF): Passband (Note 11) ±0.1dB PB −0.2dB −3.0dB Stopband (Note 11) SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ∆GD Group Delay (Note 12) GD ADC Digital Filter (HPF): Frequency Response (Note 11) −3dB FR −0.1dB DAC Digital Filter (LPF): Passband (Note 11) ±0.06dB PB −6.0dB Stopband (Note 11) SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ∆GD Group Delay (Note 12) GD DAC Digital Filter + Analog Filter: Frequency Response (Note 13) 20kHz FR MS0559-J-00 min typ max Units 0 28 68 - 20.0 23.0 0 18 18.9 ±0.04 - kHz kHz kHz kHz dB dB µs 1/fs - 1.0 6.5 - Hz Hz 0 26.2 54 - 24.0 0 21 21.8 ±0.02 - kHz kHz kHz dB dB µs 1/fs - -0.1 - dB 2006/11 -8- ASAHI KASEI [AK4556] (fs=96kHz) (Ta= -40 ∼ +85°C; VA, VD=2.4∼ 3.6V; DEM=OFF) Parameter Symbol ADC Digital Filter (Decimation LPF): Passband (Note 11) ±0.1dB PB −0.2dB −3.0dB Stopband (Note 11) SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ∆GD Group Delay (Note 12) GD ADC Digital Filter (HPF): Frequency Response (Note 11) −3dB FR −0.1dB DAC Digital Filter (LPF): Passband (Note 11) ±0.06dB PB −6.0dB Stopband (Note 11) SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ∆GD Group Delay (Note 12) GD DAC Digital Filter + Analog Filter: Frequency Response (Note 13) 40kHz FR min typ max Units 0 56 68 - 40.0 46.0 0 18 37.8 ±0.04 - kHz kHz kHz kHz dB dB µs 1/fs - 2.0 13.0 - Hz Hz 0 52.4 54 - 48.0 0 21 43.6 ±0.02 - kHz kHz kHz dB dB µs 1/fs - -0.3 - dB min Typ max Units 0 112 70 - 57.0 90.3 0 18 56.6 ±0.02 - kHz kHz kHz kHz dB dB µs 1/fs - 4.0 26.0 - Hz Hz 0 104.9 54 - 96.0 0 21 87.0 ±0.02 - kHz kHz kHz dB dB µs 1/fs - -0.3 - dB (fs=192kHz) (Ta= -40 ∼ +85°C; VA, VD=2.7∼ 3.6V; DEM=OFF) Parameter Symbol ADC Digital Filter (Decimation LPF): Passband (Note 11) ±0.1dB PB −0.2dB −3.0dB Stopband (Note 11) SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ∆GD Group Delay (Note 12) GD ADC Digital Filter (HPF): Frequency Response (Note 11) −3dB FR −0.1dB DAC Digital Filter (LPF): Passband (Note 11) ±0.06dB PB −6.0dB Stopband (Note 11) SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ∆GD Group Delay (Note 12) GD DAC Digital Filter + Analog Filter: Frequency Response (Note 13) 40kHz FR MS0559-J-00 2006/11 -9- ASAHI KASEI Note 11. ADC [AK4556] ±0.1dB fs ( Passband 0.39375 × fs ) DAC ±0.06dB fs=48kHz Passband 0.45412 x fs Note 12. 24 ADC DAC 24bit Note 13. 1kHz DC (Ta=-40 ∼ +85°C; VA, VD=2.4 ∼ 3.6V) Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage (Iout = -100µA) Low-Level Output Voltage (Iout = 100µA) Input Leakage Current Symbol VIH VIL VOH VOL Iin MS0559-J-00 Min 70%VD VD-0.5 - typ - max 30%VD 0.5 ± 10 Units V V V V µA 2006/11 - 10 - ASAHI KASEI [AK4556] (Ta=-40 ∼ +85°C; VA, VD=2.4 ∼ 3.6V; CL=20pF) Parameter Master Clock Timing (MCLK) Frequency: 128fs, 256fs, 512fs 192fs, 384fs, 768fs Pulse Width Low Pulse Width High LRCK (VA, VD = 2.4V∼3.6V) Normal Speed: 256fs, 512fs Frequency 384fs, 768fs Double Speed: 256fs 384fs Duty Cycle Slave mode Master mode LRCK (VA, VD = 2.7V∼3.6V) Frequency Quad Speed: 128fs 192fs Duty Cycle Slave mode Master mode Audio Interface Timing Slave mode (VA, VD = 2.4V ∼ 2.7V) BCLK Period: Normal Speed Double Speed BCLK Pulse Width Low Pulse Width High LRCK Edge to BCLK “↑” (Note 14) BCLK “↑” to LRCK Edge (Note 14) 2 LRCK to SDTO (MSB) (Except I S mode) BCLK “↓” to SDTO SDTI Hold Time SDTI Setup Time Slave mode (VA, VD = 2.7V ∼ 3.6V) BCLK Period: Normal Speed Double / Quad Speed BCLK Pulse Width Low Pulse Width High LRCK Edge to BCLK “↑” (Note 14) BCLK “↑” to LRCK Edge (Note 14) LRCK to SDTO (MSB) (Except I2S mode) BCLK “↓” to SDTO SDTI Hold Time SDTI Setup Time Note 14. LRCK BCLK Symbol min typ max Units fCLK fCLK tCLKL tCLKH 2.048 3.072 0.4/fCLK 0.4/fCLK - 27.648 36.864 - MHz MHz ns ns fs fs fs fs 8 8 54 48 45 - 50 54 48 108 96 55 - kHz kHz kHz kHz % % fs fs 108 96 45 - 50 216 192 55 - kHz kHz % % tBCK tBCK tBCKL tBCKH tLRB tBLR tDLR tBSD tSDH tSDS 1/128fs 1/64fs 60 60 20 20 20 20 - 40 40 - ns ns ns ns ns ns ns ns ns ns tBCK tBCK tBCKL tBCKH tLRB tBLR tDLR tBSD tSDH tSDS 1/128fs 1/64fs 33 33 20 20 13 13 - 20 20 - ns ns ns ns ns ns ns ns ns ns “↑” MS0559-J-00 2006/11 - 11 - ASAHI KASEI [AK4556] ( (Ta=-40 ∼ +85°C; VA, VD=2.4 ∼ 3.6V; CL=20pF) Parameter Master mode (VA, VD = 2.4V ∼ 2.7V) BCLK Frequency BCLK Duty BCLK “↓” to LRCK BCLK “↓” to SDTO SDTI Hold Time SDTI Setup Time Master mode (VA, VD = 2.7V ∼ 3.6V) BCLK Frequency BCLK Duty BCLK “↓” to LRCK BCLK “↓” to SDTO SDTI Hold Time SDTI Setup Time Symbol min typ max Units fBCK dBCK tMBLR tBSD tSDH tSDS −20 −20 20 20 64fs 50 - 40 40 - Hz % ns ns ns ns fBCK dBCK tMBLR tBSD tSDH tSDS −20 −20 13 13 64fs 50 - 20 20 - Hz % ns ns ns ns tPW 150 - - ns tPWV tPWV tPWV tPWV tPWV tPWV - 4134 8262 16518 4131 8259 16515 - 1/fs 1/fs 1/fs 1/fs 1/fs 1/fs Reset Timing PDN Pulse Width (Note 15) PDN “↑” to SDTO valid (Note 16) Slave Mode Noraml Speed Double Speed Quad Speed Master Mode Normal Speed Double Speed Quad Speed Note 15. AK4556 PDN pin = “L” Note 16. PDN pin ) LRCK “↑” 1/fCLK VIH VIL MCLK tCLKH tCLKL 1/fs VIH VIL LRCK tBCK VIH VIL BCLK tBCKH tBCKL Figure 2. Clock Timing MS0559-J-00 2006/11 - 12 - ASAHI KASEI [AK4556] VIH VIL LRCK tBLR tLRB VIH VIL BCLK tDLR tBSD SDTO 50%VD tSDS tSDH VIH VIL SDTI Figure 3. Audio Data Input/Output Timing (Slave mode) LRCK 50%VD tMBLR BCLK 50%VD tBSD 50%VD SDTO tSDS tSDH VIH VIL SDTI Figure 4. Audio Data Input/Output Timing (Master mode) tPW PDN VIL tPWV SDTO 50%VD Figure 5. Reset Timing MS0559-J-00 2006/11 - 13 - ASAHI KASEI [AK4556] AK4556 MCLK, BCLK, LRCK Table 1 CKS3-0 pin (Table 3) MCLK MCLK 192fs, 384fs, 768fs MCLK BCLK LRCK AK4556 HPF ON/OFF MCLK / (Table 2) (PDN pin = “H”) (MCLK, BCLK, LRCK) (PDN pin = “L”) (MCLK) fs 32kHz 44.1kHz 48kHz 96kHz 192kHz MCLK 128fs N/A N/A N/A N/A 24.576MHz 192fs 256fs 384fs 512fs N/A 8.192MHz 12.288MHz 16.384MHz N/A 11.2896MHz 16.9344MHz 22.5792MHz N/A 12.288MHz 18.432MHz 24.576MHz N/A 24.576MHz 36.864MHz N/A 36.864MHz N/A N/A N/A Table 1. System Clock Example (N/A: Not Available) 768fs 24.576MHz 33.8688MHz 36.864MHz N/A N/A Mode Sampling Frequency MCLK 256fs/512fs 8kHz ≤ fs ≤ 54kHz Normal Speed 384fs/768fs 8kHz ≤ fs ≤ 48kkHz 256fs 54kHz < fs ≤ 108kHz Double Speed 384fs 48kHz < fs ≤ 96kHz 128fs 108kHz < fs ≤ 216kHz Quad Speed 192fs 96kHz < fs ≤ 192kHz Table 2. Sampling Frequency Range MS0559-J-00 2006/11 - 14 - ASAHI KASEI [AK4556] Mode CKS3 pin CKS2 pin CKS1 pin CKS0 pin HPF M/S 0 (*) L L L L ON Slave 1 L L L H ON Slave 2 L L H L OFF Slave 3 L L H H OFF Slave 4 L H L L ON Slave 5 L H L H ON Slave 6 L H H L OFF Slave 7 L H H H OFF Slave 8 H L L L ON Slave 9 H L L H ON Slave 10 H L H L OFF Slave 11 H L H H OFF Slave 12 H H L 13 H H L 14 H H H 15 H H H * AK4552 Compatible mode L H L H ON ON ON ON Master Master Master Master Audio Interface Format (See Table 4) MCLK 128/192fs (Quad Speed) 256/384fs (Double Speed) 512/768fs (Normal Speed) 256/384/512/768fs (Normal Speed) 128/192fs (Quad Speed) 256/384fs (Double Speed) 512/768fs (Normal Speed) 256/384/512/768fs (Normal Speed) 128/192fs (Quad Speed) 256/384fs (Double Speed) 512/768fs (Normal Speed) 256/384/512/768fs (Normal Speed) 128/192fs (Quad Speed) 256/384fs (Double Speed) 512/768fs (Normal Speed) 256/384/512/768fs (Normal Speed) 128/192fs (Quad Speed) 256/384fs (Double Speed) 512/768fs (Normal Speed) 256/384/512/768fs (Normal Speed) 128/192fs (Quad Speed) 256/384fs (Double Speed) 512/768fs (Normal Speed) 256/384/512/768fs (Normal Speed) 256fs (Double Speed) 512fs (Normal Speed) 128fs (Quad Speed) 256fs (Normal Speed) LJ/RJ LJ/RJ LJ/RJ LJ/RJ I2S I2S I2S I2S LJ LJ LJ LJ I2S I2S I2S I2S Table 3. Mode Setting 3 complement LRCK BCLK Mode LJ I2S LJ/RJ CKS3-0 pin (Table 3, Table 4) SDTO BCLK MSB first 2’s SDTI BCLK LRCK fs 2 64fs SDTO 24bit, MSB justified 24bit, I2S Compatible 24bit, MSB justified IS SDTI LRCK 24bit, MSB justified H/L 2 24bit, I S Compatible L/H 24bit, LSB justified H/L Table 4. Audio Interface Format MS0559-J-00 BCLK (Slave) ≥ 48fs ≥ 48fs or 32fs ≥ 48fs BCLK (Master) 64fs - 2006/11 - 15 - ASAHI KASEI [AK4556] LRCK 0 1 2 18 19 20 21 22 23 24 25 0 1 2 18 19 20 21 22 23 24 25 0 1 BCLK(64fs) SDTO(o) 23 22 5 4 3 2 1 0 23 22 5 4 3 2 1 0 SDTI(i) 23 22 5 4 3 2 1 0 Don’t Care 23 22 5 4 3 2 1 0 Don’t Care 23:MSB, 0:LSB Lch Data 23 Rch Data Figure 6. Mode LJ Timing LRCK 0 1 2 3 19 20 21 22 23 24 25 0 1 2 3 19 20 21 22 23 24 25 0 1 BCLK(64fs) SDTO(o) 23 22 5 4 3 2 1 0 23 22 5 4 3 2 1 0 SDTI(i) 23 22 5 4 3 2 1 0 Don’t Care 23 22 5 4 3 2 1 0 Don’t Care 23:MSB, 0:LSB Lch Data Rch Data 2 Figure 7. Mode I S Timing LRCK 0 1 2 8 9 10 20 21 31 0 1 2 8 9 10 20 21 31 0 1 BCLK(64fs) SDTO(o) SDTI(i) 23 22 16 15 14 Don’t Care 23:MSB, 0:LSB 0 23 22 12 11 23 22 1 0 16 15 14 Don’t Care Lch Data 23 22 0 12 11 23 1 0 Rch Data Figure 8. Mode LJ/RJ Timing DAC IIR 3 32kHz, 44.1kHz, 48kHz DEM0 pin DEM1 pin Double/Quad Speed Mode (tc=50/15µs) OFF DEM1 DEM0 Mode 0 0 44.1kHz 0 1 OFF 1 0 48kHz 1 1 32kHz Table 5. De-emphasis filter control MS0559-J-00 2006/11 - 16 - ASAHI KASEI [AK4556] HPF ADC DC 20Hz HPF -0.12dB CKS3-0 pin HPF fc fs=48kHz 1.0Hz fs HPF ON/OFF PDN pin “L” (Table 3) HPF ON/OFF DC & AK4556 ADC DAC 4134 x LRCK (@ Normal Speed) ADC 4131 x LRCK 2’s complement “0” ( ADC SDTO (@ Normal Speed) ADC ) DAC PDN (1) ADC Internal State Normal Operation DAC Internal State Normal Operation Power-down Init Cycle Normal Operation Normal Operation Power-down GD GD ADC In (Analog) ADC Out (Digital) “0”data Idle Noise DAC In (Digital) Idle Noise “0”data GD GD (2) DAC Out (Analog) Clock In (2) (3) (4) MCLK,LRCK,BCLK The clocks may be stopped. External Mute Notes: (1) (2) PDN pin (3) (4) Mute ON (typ.): 4134/fs @ Normal Speed, 8262/fs @ Double Speed, 16518/fs @ Quad Speed (typ.): 4131/fs @ Normal Speed, 8259/fs @ Double Speed, 16515/fs @ Quad Speed (“↑↓”) LOUT/ROUT pin Hi-Z LRCK BCLK “L” Figure 9. MS0559-J-00 2006/11 - 17 - ASAHI KASEI [AK4556] PDN pin Mode I2S PDN pin LRCK “H” “L” MCLK PDN pin LRCK Mode LJ, Mode LJ/RJ BCLK LRCK “H” BCLK MCLK MS0559-J-00 2006/11 - 18 - ASAHI KASEI [AK4556] (AKD4556) Figure 10 10u 10u 10u 0.1u Analog Supply (3.0V) + + 5.1ohm 10u 0.1u Mode Control Figure 10. 1 RIN ROUT 20 2 LIN LOUT 19 3 VSS VCOM 18 4 VA 5 VD AK4556 + 2.2u 0.1u Reset PDN 17 BCLK 16 6 DEM0 MCLK 15 7 DEM1 LRCK 14 8 SDTO SDTI 13 9 CKS0 CKS3 12 10 CKS1 CKS2 11 (Mode 0: AK4552 Audio Controller ) Notes: - AK4556 VSS - LOUT/ROUT 220Ω MS0559-J-00 400pF 2006/11 - 19 - ASAHI KASEI [AK4556] 1. VA VA 5.1Ω VA VD VD VSS PC 2. VA pin VA pin VSS pin 0.1µF VCOM 2.2µF 0.1µF VSS pin VCOM pin LSI VA, VD, VCOM pin 3. ADC (typ. 0.5 x VA) 2’s complement AK4556 DC 8kΩ (typ @ fs=48kHz, 96kHz, 192kHz) VA typ. 0.7 x VA Vpp (ADC DC ) VCOM HPF 128fs (@ fs=48kHz), 64fs (@ fs=96kHz) or 32fs (@ fs=192kHz) AK4556 (RC ) 4. DAC ( VCOM 2’s complement 7FFFFFH(@24bit) 000000H(@24bit) VCOM ) VCOM+ mV DC 0.7 x VA Vpp (typ) 800000H(@24bit) ∆Σ DC MS0559-J-00 2006/11 - 20 - ASAHI KASEI [AK4556] 6.5 ± 0.1 11 1 10 0.105 ~ 0.175 0.10 0.65 6.4 ± 0.2 4.4 ± 0.1 0.60 ± 0.10 20 M 0o ~ 8 o 0.195 ~ 0.275 0.10 S 1.20MAX 0.10 ± 0.05 1.00 ± 0.05 S MS0559-J-00 2006/11 - 21 - ASAHI KASEI [AK4556] AKM 4556VT XXXXXX 1) Pin #1 indication 2) Date Code: XXXXXX (6 digits) 3) Marketing Code: 4556VT Date (YY/MM/DD) 06/11/06 Revision 00 Reason Page Contents • • • • • • MS0559-J-00 2006/11 - 22 -