[AK4181A] AK4181A 125kHz (max) (2.5V) 12bit ADC S/H (250μA (2.7V 3.6V) Package 16pin TSSOP AK4181A AK4181A 125kHz 12 2.7V DCLK XP CSN YP DIN Control Logic XN YN DOUT BUSY IN1 Internal VREF(2.5V) VREF IN2 VBAT R1 R2 VREF+ AIN+ AIN- VREF- 12bit ADC (SAR type) PENIRQN PEN INTERRUPT Temp. Sensor VCC MS0313-J-02 1 GND 2010/09 [AK4181A] AK4181AVT -20°C ∼ +70°C 16pin TSSOP MS0313-J-02 VCC 1 16 DCLK XP 2 15 CSN YP 3 14 DIN XN 4 13 BUSY YN 5 12 DOUT GND 6 11 PENIRQN VBAT 7 10 IN2 IN1 8 9 Top View 2 VREF 2010/09 [AK4181A] No. 1 2 Signal Name VCC XP I/O I/O 3 YP I/O 4 XN I/O 5 YN I/O 6 7 8 9 GND VBAT IN1 VREF I I I/O 10 11 IN2 PENIRQN 12 13 14 DOUT BUSY DIN I O O O I 15 CSN I 16 DCLK I MS0313-J-02 Description Power Supply Touch Screen X+ plate Voltage supply X X+ Y ADC Z1 ADC OPEN 50k Touch Screen Y+ plate Voltage supply Y Y+ X ADC Y+ OPEN OPEN Touch Screen X- plate Voltage supply X XY OPEN X OPEN OPEN Touch Screen Y- plate Voltage supply Y YX OPEN Z2 ADC OPEN GND Ground Analog Input for Battery Monitor Auxiliary 1 Analog Input Voltage Reference Input/Output 2.5V Auxiliary 2 Analog Input Pen Interrupt Output 100KΩ PullUp CSN = “H” Enable “H” CSN = “H” Disable “H” CSN = “L” Serial A/D Data Output A/D DCLK ↓ MSB MSB BUSY ↓ CSN = “L” AD CSN = “H” Hi-Z BUSY Output CSN↓ “L” 8DCLK↓ CSN = “H” Hi-Z Serial Data Input CSN = “L” 8 AK4181A DCLK ↑ “L” “L” 9DCLK↓ “H” “L” Chip Select Input CSN = “L” External Clock Input 3 2010/09 [AK4181A] GND = 0V (Note 1) Parameter Power Supplies Input Current (any pins except for supplies) Input Voltage Touch Panel Drive Current Ambient Temperature (power supplied) Storage Temperature Symbol VCC IIN VIN IOUTDRV Ta Tstg min -0.3 -0.3 max 6.0 ±10 6.0(VCC+0.3) 50 70 150 -20 -65 Units V mA V mA °C °C Note 1. : GND = 0V (Note 1) Parameter Power Supplies Symbol VCC min 2.7 typ 3.3 max 3.6 Units V Note 1. : MS0313-J-02 4 2010/09 [AK4181A] Ta = -20°C to 70°C,VCC = 2.7V, External Vref = 2.5V, fs = 125kHz, fDCLK = 16*fs, 12bit mode Parameter min. typ. ADC for Touch Screen Resolution 12 No Missing Codes 11 12 Integral Linearity Error DNL ±1 Analog Input Voltage Range 0 Offset Error Gain Error Touch Panel Driver 5 XP, YP, RL = 300Ω 5 XN, YN, RL = 300Ω XP Pull Up Register (when pen interrupt enable) 50 PSRR (10KHz 100mVpp) 70 Reference Output Internal Reference 2.44 2.50 Drift 30 Load Capacitance 0.1 Reference Input Input Voltage Range Battery Monitor Input Voltage Range Input Impedance (Battery Measure Mode) 5 10 Accuracy (Note 2) ( VREF ) Accuracy (Note 2) ( VREF ) Temperature Measurement Temperature Range -20 1.6 Resolution (Note ) ±3 Accuracy (Note ) Power Supply Current Normal Mode (Internal VREF OFF) 250 Normal Mode (Internal VREF ON) 520 0 Full Power Down ( PD1=PD0= ”0“ ) Note 2. 2. 5V VBAT Note 3. Note 4. MS0313-J-02 max. ±2 Vref ±6 ±4 Units Bits Bits LSB LSB V LSB LSB Ω Ω KΩ dB 2.56 V ppm/°C μF VCC V 5.0 V KΩ % % ±2 ±3 70 °C °C °C 500 800 3 μA μA μA 1.25V 2 5 2010/09 [AK4181A] DC Ta=-20 to 70°C, VCC=2.7V to 3.6V Parameter “H” level input voltage “L” level input voltage Input Leakage Current “H” level output voltage (@ Iout = -250uA) “L” level output voltage (@ Iout = 250uA) Tri-state Leakage Current All pins except for XP, YP, XN, YN pins XP, YP, XN, YN pins PENIRQN “L” level output voltage (100KΩ Pull-Up) Ta=-20°C to 70°C, VCC=2.7V to 3.6V Parameter Touch Panel (A/D Converter) Throughput Rate DCLK frequency duty Tracking Time (Rin=600Ω) ( Note 5) Conversion Time CSN “↓” to First DCLK “↑” CSN “↓” to BUSY Tri-State Disabled CSN “↓” to DOUT Tri-State Disabled DCLK High Pulse Width DCLK Low Pulse Width DCLK “↓” to BUSY “↑” Data Setup Time Data Valid to DCLK Hold Time Data Output Delay after DCLK “↓” CSN “↑” to DCLK Ignored CSN “↑” to BUSY High-Z state CSN “↑” to DOUT High-Z state Note 5. 3tDCLK Symbol VIH VIL IILK VOH VOL IOLK min. 0.8xVCC typ. - -10 VCC-0.4 - - -10 -50 VOLP Symbol min typ fs fDCLK 10 duty 40 tTRK 1.428 tCONV t1 100 t2 t3 t4 190 t5 190 t6 t7 100 t8 10 t9 t10 0 t11 t12 (tDCLK = 1/fDCLK) 50 max. 0.4 Units V V μA V V 10 50 0.8 μA μA V max Units 125 kHz 2100 60 kHz % μs 1/fDCLK ns ns ns ns ns ns ns ns ns ns ns ns 0.2xVCC 10 12 200 200 160 160 200 200 CSN 50%VCC t5 t1 t6 t6 t9 t4 t10 DCLK 50%VCC t8 t7 PD0 50%VCC DIN t2 t11 VOH BUSY VOL t12 t3 DOUT D11 D10 D0 Figure 1 Timing Diagram MS0313-J-02 6 2010/09 VOH VOL [AK4181A] A/D 12 bit A/D A/D 12 A/D Table 1 (ΔVREF-1.5LSB)~ ΔVREF (ΔVREF-2.5LSB) ~ (ΔVREF-1.5LSB) --------0.5LSB ~ 1.5LSB 0 ~ 0.5LSB ΔVREF (VREF+) – (VREF-) FFFH FFEH --------001H 000H Table 1 ΔVREF A/D 8 A2, A1, A0 YP SER/ DFR XP, “0” SER/ DFR ΔVREF A/D X (XP) – (XN) (YP) – (XN) X ΔAIN SER/ DFR ”1” A/D ΔVREF GND GND ΔAIN A/D SER/ DFR = “0” VREF CSN = “L” (Rin) GND IN2 VBAT, IN1 VREF IN2 START Rin 125kHz A/D 5DCLK 600 8CLK 1.428 s 2.1MHz 3tDCLK ADC YP 2 XP, XN X Y A/D MS0313-J-02 7 2010/09 [AK4181A] ON ON XP VREF XP AIN+ VREF YP ADC VREF- AIN+ YP ADC VREF- AIN- AIN- XN XN ON YN YN ON a) X-Position Measurement Differential Mode b) Y-Position Measurement Differential Mode Figure 2 A/D ON 3DCLK ON A/D OFF PD0 “0” YP VREF+ XN VREF- XP YN 2 X Z1 Rtouch = Rxplate Z2 Rxplate X X Y Xposition/4096 Y * [ (Z2/Z1) – 1] Rxplate, Ryplate Z1 Rtouch = (Rxplate*Xposition/4096)*[(4096/Z1) – 1] – Ryplate*[1 – (Yposition/4096)] MS0313-J-02 8 2010/09 [AK4181A] ON ON YP YP XP VREF+ AIN+ VREF- AIN- touch XP ADC VREF+ AIN+ VREF- AIN- touch ADC XN XN ON ON YN a) YN b) Z1-Position Measurement Differential Mode Z2-Position Measurement Differential Mode Figure 3 VREF AK4181A 2.5V VREF PD1 “1” “0” PD1 VREF VREF “1” 0.1μF VREF 400μs 0.1μF PD1 “0” AK4181A 2.7~3.6V Figure 4 VBAT R1 R2 5V 7.5k 2.5k 5μs VBAT VREF PD1 Internal VREF(2.5V) VBAT AIN+ R0 VREF+ ADC R1=7.5K AIN- VREF- R2=2.5K Enable Figure 4 MS0313-J-02 9 2010/09 [AK4181A] iD = I0exp(vD/VT) ( I0: q : 1.602189×10-19 ( k : 1.38054×10-23( vD: T: VT = kT/q) <1> ) ) Temp. Sensor I 82I TEMP0 TEMP1 Figure 5 AK4181A Figure 5 2 2 2 2 <1> (iD2 / iD1) = exp {(V(82I) – V(I))/VT} N = (iD2 / iD1) = 82 ( ) T°C = ΔVbe * q /(k * ln N) – 273 ΔVbe = V(82I) – V(I) T°C = 2.63×103 × ΔVbe – 273 <2> 1 2 T = (k/q)* vD/ln(iD/I0) MS0313-J-02 <2> 10 2010/09 [AK4181A] 8 AK4181A Table 2 DCLK AK4181A D7 S D6 A2 BIT 7 6-4 3 Name S A2-A0 MODE 2 SER/ DFR 3 PD1-PD0 A2 CSN = “L” DCLK A1 A0 D5 A1 D4 A0 D3 MODE D2 SER/ DFR D1 PD1 D0 PD0 “H” ADC A/D 12 /8 “L” 12 “H” 8 ADC SER/ XP XN YP YN ADC AIN+ (ΔAIN) AIN- VREF+ (ΔVREF) VREF- OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF ON ON ON OFF OFF OFF ON OFF ON ON OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF TEMP0 XP VBAT XP(Z1) YN(Z2) YP IN1 TEMP1 GND GND GND GND GND GND GND GND VREF VREF VREF VREF VREF VREF VREF VREF GND GND GND GND GND GND GND GND OFF OFF ON ON XP YN YP YN OFF OFF ON OFF ON ON ON OFF ON ON OFF OFF OFF OFF OFF OFF XP(Z1) YN(Z2) YP IN2 XN XN XN GND YP YP XP VREF XN XN XN GND Note DFR 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Note 6. IN2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 TEMP0 Y (Z1) (Z2) X IN1 TEMP1 NA Y NA (Z1) (Z2) X IN2 (Note 6) NA SER/ DFR = “0” Table 2 MS0313-J-02 11 2010/09 [AK4181A] PD1, PD0 PD1 2 PD0 A/D PD0 = “1” YN XP, YP, XN PD1 0 PD0 0 CSN = “L” CSN = “L” 5DCLK↑ OFF CSN = “L” A/D 7DCLK↑ 8DCLK↑ CSN = “H” PENIRQN Enabled A/D CSN = “H” OPEN A/D GND YN 0 1 Enabled ADC ON CSN = “L” A/D ADC ON X Y ON CSN = “H” 1 0 Enabled VREF ON CSN CSN = “L” A/D A/D ON 5DCLK↓ 20DCLK↓ AD CSN PENIRQN 1 1 Disabled ADC ON PEN ON/OFF CSN = “H” PENIRQN “H” CSN = “L” Table 3 CSN, DCLK, DIN, DOUT 4 CSN 1 2 3 4 5 6 7 8 MO SER/ DFR PD1 PD0 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DCLK S DIN A2 A1 A0 S A2 5 4 A1 A0 MO SER/ DFR PD1 PD0 Hi-Z BUSY 11 Hi-Z 10 9 8 7 6 3 2 1 0 DCLK ↑ 11 10 DOUT Driver SW SER/ DFR =”1” Driver SW SER/ DFR =”0” Figure 6 ↓ DIN MSB S CSN MS0313-J-02 BUSY DOUT CSN “H” Hi-Z ↓ “L” AK4181A “H” 12 2010/09 [AK4181A] 5DCLK↓ 8DCLK↓ SER/ DFR = “1” ADC PD0 = “0” ON SER/ DFR = “0” 5DCLK↓ 20 DCLK↓ ON PD0 = ”1” 8DCLK↓ 9DCLK↓ 8bit 5DCLK↓ ON BUSY “H” DOUT 7DCLK 9DCLK↓ MSB CSN = “H” “L” A/D DIN = “L” A/D 15DCLK A/D A/D YN GND 100KΩ 50K XP XP Ri PENIRQN 2 (VCC)--- (Ri)--- (X+)---(Y-) PENIRQN “L” PENIRQN CSN = “H” PENIRQN PD1 “L” PENIRQN CSN = “L” 8DCLK↑ PD0 PD1 “H” “H” (1,1) PD0 “1” PENIRQN PD0 CSN = “H” PD0 PD1 PD0 ON/OFF CSN = “H” ON i. CSN = “L” 5DCLK↓ 20DCLK↓ PENIRQN X Y “L” VBAT IN1IN2 ii. CSN = “L” 5DCLK↓ PENIRQN “0” PD0 “1” “H” PD0 X VBAT IN1 IN2 “H” iii. CSN = “L” 20DCLK↓ PENIRQN “0” PD0 “1” PENIRQN VBAT IN1 IN2 Y “L” PD0 PD0 “L” X Y “H” “L” “H” A/D MS0313-J-02 PD0 “H” PENIRQN “L” CSN 13 “L” PEN 2010/09 [AK4181A] 100kΩ PENIRQN EN2 50kΩ Driver OFF XP EN1 YN Driver ON Figure 7 CSN 1 2 3 4 5 6 7 8 MO SER/ DFR PD1 PD0 9 10 11 12 13 14 15 16 9 8 7 6 5 17 18 19 20 21 22 23 24 DCLK DIN S A2 A1 A0 BUSY 11 10 4 3 2 1 0 DOUT CONV Internal AXIS = ((!A2) & (!A1) & (A0)) | ((!A2) & (A1) & (A0)) | ((A2) & (!A1) & (!A0)) | ((A2) & (!A1) & (A0)); /* X /* Z1 /* Z2 /* Y */ */ */ */ EN1 = ((!CSN) & (!CONV) & AXIS & PD0) /* CSN = “L” X/Y/Z1/Z2 | ((!CSN) & AXIS & CONV); /* CSN = “L”, X/Y/Z1/Z2 PD0 = 1 5DCLK↓~20DCLK↓ */ 5DCLK↓~20DCLK↓ EN2 = ((!CSN) & (!CONV) & (!PD0)) /* CSN = “L”, PD0 = 1, 5DCLK↓~20DCLK↓ | (CSN & (!DCLK) & (!(PD1& PD0)); /* CSN = “H” DCLK = “L” PD0, PD1 */ */ (1,1) */ (PD1,PD0) ([PD1,PD0]=[1,1]) ON 8 CSN = “L” CSN= “H” CSN = “H” MS0313-J-02 CSN = “H” CSN = “L” 1 14 2010/09 [AK4181A] 16pin TSSOP (Unit: mm) 1.1 (max) *5.0±0.1 16 9 8 1 0.13 6.4±0.2 *4.4±0.1 A 0.65 0.22±0.1 M 0.17±0.05 Detail A 0.5±0.2 0.1±0.1 Seating Plane 0.10 NOTE: Dimension "*" does not include mold flash. 0-10° : : : MS0313-J-02 15 2010/09 [AK4181A] AKM 4181AVT XXYYY Contents of XXYYY XX: Lot # YYY: Date Code Date (YY/MM/DD) 04/08/30 10/09/17 MS0313-J-02 Revision 01 02 Reason Page Contents 15 16 2010/09 [AK4181A] z z z z z z MS0313-J-02 17 2010/09