ASAHI KASEI
[AK4182A]
AK4182A
12bit ADC
(VCC = 2.2V
(2.5V)
(260
Package
AK4182A12
(4)
AK4182A2.2V
125kHz
I/F
(S/H
)
3.6V)
I/F(1.5VVCC)
125kHz (max)
A/D
1.5V
X /Y
5V
μA)
16pin QFN
16
QFN
XP
DCLK
YP
Level
Shifter
XN
Control
Logic
CSN
DOUT
YN
DIN
IN
BUSY
Internal VREF(2.5V)
VBAT
IOVDD
R1
PENIRQN
R2
VREF+
VREF-
AIN+
AIN-
12bit
ADC
(SAR type)
PEN
INTERRUPT
Temp.
Sensor
VCC
MS0482-J-01
VREF
GND
2007/12
ASAHI KASEI
[AK4182A]
■
AK4182AVN
-40°C ∼ +85°C
16 pin QFN
■
VREF
IOVDD
PENIRQN
DOUT
IN
BUSY
DIN
VBAT
CSN
GND
DCLK
YN
XN
YP
XP
VCC
MS0482-J-01
2007/12
ASAHI KASEI
No.
1
2
Signal Name
BUSY
DIN
3
CSN
4
5
6
DCLK
VCC
XP
7
8
9
YP
XN
YN
10
11
12
13
GND
VBAT
IN
VREF
14
IOVDD
15
PENIRQN
16
DOUT
MS0482-J-01
[AK4182A]
I/O
O
I
I
I
I/O
I/O
I/O
I/O
I
I
I/O
O
O
Description
BUSY Output
CSN↓ “L” 8DCLK
CSN = “H”
Hi-Z
Serial Data Input
CSN = “L” 8
AK4182A
DCLK ↑
↓
9DCLK↓ “H”
“L”
Chip Select Input
CSN = “L”
External Clock Input
Power Supply
Touch Screen X+ plate Voltage supply
X
Y ADC
Z1
ADC
OPEN
50kΩ
Touch Screen Y+ plate Voltage supply
Y
X ADC
Y+
OPEN
OPEN
Touch Screen X- plate Voltage supply
X
Y OPEN
XOPEN
OPEN
Touch Screen Y- plate Voltage supply
Y
X OPEN
Z2
ADC
OPEN
GND
Ground
Analog Input for Battery Monitor
Auxiliary Analog Input
Voltage Reference Input/Output
Digital I/O Power Supply
I/F
Pen Interrupt Output
CSN = “H” Enable “L”
“H” CSN = “H”
“H”
Serial A/D Data Output
A/D
DCLK ↓
MSB BUSY
↓
CSN = “L”
AD “L”
CSN = “H”
Hi-Z
X+
Y+
X-
Y-
Disable
CSN = “L”
MSB
2007/12
ASAHI KASEI
GND = 0V (Note 1)
Parameter
Power Supply
Digital I/O Power Supply
Input Current (any pins except for supplies)
Input Voltage
Touch Panel Drive Current
Ambient Temperature (power supplied)
Storage Temperature
GND = 0V (Note 1)
Parameter
Power Supplies
Digital I/O Power Supply
[AK4182A]
Symbol
VCC
IOVDD
IIN
VIN
IOUTDRV
Ta
Tstg
Symbol
VCC
IOVDD
min
-0.3
-0.3
-0.3
-40
-65
min
2.2
1.5
typ
3.3
3.3
max
6.0
6.0
±10
6.0(VCC+0.3)
50
85
150
Units
V
V
mA
V
mA
°C
°C
max
3.6
VCC
Units
V
V
Note 1.
:
MS0482-J-01
2007/12
ASAHI KASEI
[AK4182A]
(Ta = -40°C to 85°C, VCC = IOVDD = 2.7V, External Vref = 2.5V, fs = 125KHz, fDCLK = 16 x fs, 12bit mode)
Parameter
min.
typ.
max.
ADC for Touch Screen
Resolution
12
No Missing Codes
11
12
Integral Nonlinearity (INL) Error
±2
Differential Nonlinearity (DNL) Error
±1
±2
Analog Input Voltage Range
0
Vref
Offset Error
±6
Gain Error
±4
Touch Panel Driver
5
XP, YP, RL = 300Ω
5
XN, YN, RL = 300Ω
XP Pull Up Register (when pen interrupt enable)
50
PSRR (10KHz 100mVpp)
70
Reference Output
Internal Reference
2.44
2.50
2.56
Drift
30
Load Capacitance
0.1
Reference Input
Input Voltage Range
VCC
Battery Monitor
Input Voltage Range
5.0
Input Impedance (Battery Measure Mode)
5
10
±2
Accuracy (Note 2) (VREF
)
±3
Accuracy (Note 2) (VREF
)
Temperature Measurement
Temperature Range
-40
85
1.6
Resolution (Note )
±3
Accuracy (Note )
Power Supply Current
Normal Mode (Internal VREF OFF)
260
500
Normal Mode (Internal VREF ON)
540
800
0
3
Full Power Down (PD1=PD0= “0”
)
Note 2.5V
Note 3.
Note 4. 2
MS0482-J-01
Units
Bits
Bits
LSB
LSB
V
LSB
LSB
Ω
Ω
KΩ
dB
V
ppm/°C
μF
V
V
KΩ
%
%
°C
°C
°C
μA
μA
μA
VBAT pin1.25V
2007/12
ASAHI KASEI
[AK4182A]
DC
(Ta=-40°C to 85°C, IOVDD=1.5V to 3.6V)
Parameter
“H” level input voltage
“L” level input voltage
Input Leakage Current
“H” level output voltage (@ Iout = -250μA)
“L” level output voltage
(@ Iout = 250μA)
Tri-state Leakage Current
All pins except for XP, YP, XN, YN pins
XP, YP, XN, YN pins
(Logic I/O)
Symbol
VIH
VIL
IILK
VOH
VOL
IOLK
min.
0.8xIOVDD
typ.
-
-10
IOVDD-0.4
-
-
-10
-10
(Ta=-40°C to 85°C, VCC=2.2V to 3.6V, IOVDD = 1.5V to VCC, CL=50pF)
Parameter
Symbol
Touch Panel (A/D Converter)
Throughput Rate
fs
DCLK
frequency
fDCLK
duty
duty
tTRK
Tracking Time (Rin=600Ω) (Note 5)
Conversion Time
tCONV
t1
CSN “↓” to First DCLK “↑”
t2
CSN “↓” to BUSY Tri-State Disabled
t3
CSN “↓” to DOUT Tri-State Disabled
DCLK High Pulse Width
t4
DCLK Low Pulse Width
t5
t6
DCLK “↓” to BUSY “↑”
Data Setup Time
t7
Data Valid to DCLK Hold Time
t8
t9
Data Output Delay after DCLK “↓”
t10
CSN “↑” to DCLK Ignored
t11
CSN “↑” to BUSY Hi-Z state
t12
CSN “↑” to DOUT Hi-Z state
Note 5. 3tDCLK
(tDCLK = 1/fDCLK)
min
typ
10
40
1.428
50
max.
0.4
Units
V
V
μA
V
V
10
10
μA
μA
max
Units
125
kHz
2100
60
kHz
%
μs
1/fDCLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.2xIOVDD
10
12
100
200
200
190
190
160
100
10
160
0
200
200
CSN
50%VCC
t5
t1
t6
t6
t9
t4
t10
DCLK
50%VCC
t8
t7
PD0
50%VCC
DIN
t2
t11
VOH
BUSY
VOL
t12
t3
DOUT
D11
D10
D0
Figure 1. Timing Diagram
MS0482-J-01
2007/12
VOH
VOL
ASAHI KASEI
[AK4182A]
■
A/D
12 bit
A/D
A/D
12 A/D
Table 1
(ΔVREF-1.5LSB)~ ΔVREF
(ΔVREF-2.5LSB) ~ (ΔVREF-1.5LSB)
--------0.5LSB ~ 1.5LSB
0 ~ 0.5LSB
ΔVREF (VREF+) – (VREF-)
FFFH
FFEH
--------001H
000H
Table 1
A/D Δ
VREF 8
■
A2, A1, A0
SER/ DFR
XP,
SER/ DFR bit “0” A/D
YP
Δ
X
VREFX
Δ
AINSER/ DFR
Δ
Δ
CSN = “L”
VREFGND
AIN
START bit 5DCLK
(XP) – (XN)
(YP) – (XN)
bit “1”
A/D
A/D
A/D
GND
8CLK
μs(2.1MHz
1.428
3tDCLK)
ADC 125kHz
■
XP, XN
YPX
2
A/D
MS0482-J-01
Y
2007/12
ASAHI KASEI
[AK4182A]
ON
ON
XP
VREF
XP
AIN+
VREF
YP
ADC
VREF-
AIN+
YP
ADC
VREF-
AIN-
AIN-
XN
XN
ON
YN
YN
ON
a)
X-Position Measurement Differential Mode
b)
Y-Position Measurement Differential Mode
Figure 2
A/D
3tDCLK
ON A/D
bit “0”
ON
OFF PD0
■
YP
VREF+XN
VREF-XPYN
2
X
Z1
Rxplate
Z2
Rtouch = Rxplate
X
X
Xposition/4096
Y
Y Z1
* [ (Z2/Z1) – 1]
Rxplate, Ryplate
Rtouch = (Rxplate*Xposition/4096)*[(4096/Z1) – 1] – Ryplate*[1 – (Yposition/4096)]
MS0482-J-01
2007/12
ASAHI KASEI
[AK4182A]
ON
ON
YP
YP
XP
VREF+
AIN+
VREF-
AIN-
touch
XP
ADC
VREF+
AIN+
VREF-
AIN-
touch
ADC
XN
XN
ON
ON
YN
a)
YN
b)
Z1-Position Measurement Differential Mode
Z2-Position Measurement Differential Mode
Figure 3
■
AK4182A
“0”
VREF
2.5V
VREF
PD1 bit “1”
PD1 bit “1”
VREF VREF pin
0.1
0.1μF VREF
μF
PD1 bit
“0”
500μs
2.7V
■
AK4182A
2.2~3.6V
Figure 4VBAT
5VVBAT pin
R1R27.5k2.5k
(R0)
5μs
VREF
PD1
Internal
VREF(2.5V)
VBAT
AIN+
R0
VREF+
ADC
R1=7.5K
AIN-
VREF-
R2=2.5K
Enable
Figure 4
MS0482-J-01
2007/12
ASAHI KASEI
[AK4182A]
■
iD = I0exp(vD/VT) (
I0:
q : 1.602189×10-19 ()
k : 1.38054×10-23()
vD:
T:
VT = kT/q)
<1>
Temp.
Sensor
iD1
=I
TEMP0
iD2
= 91 x I
TEMP1
Figure 5
AK4182A
Figure 5
2
2
2
2
<1>
(iD2 / iD1) = exp {(V(91 x I) – V(I))/VT}
N = (iD2 / iD1) = 91 (
)
T°C = ΔVbe * q / (k * ln N) – 273
ΔVbe = V(91 x I) – V(I)
T°C = 2.573×103 × ΔVbe – 273
<2>
T = (k/q)* vD/ln(iD/I0)
MS0482-J-01
1
<2>
2007/12
ASAHI KASEI
■
[AK4182A]
I/F
AK4182A
I/F I/O
I/F
1.5V
IOVDD
VCC=2.2V – 3.6V
IOVDD=1.5V – VCC
IOVDD
AK4182A
Micro-
DCLK
Processor
SDIN
SDOUT
BUSY
Figure 6
I/F
■
8 bit
AK4182A
Table 2
DCLK
AK4182A
D7
S
D6
A2
BIT
7
6-4
3
Name
S
A2-A0
MODE
2
SER/ DFR
3
PD1-PD0
A2
CSN = “L”
DCLK
A1
A0
D5
A1
D4
A0
D3
MODE
D2
SER/ DFR
D1
PD1
D0
PD0
“H”
ADC
A/D
12
/8
“L” 12
“H”
8
ADC
SER/
(ΔAIN)
AIN-
VREF+
(ΔVREF)
VREF-
TEMP0
XP
VBAT
XP(Z1)
YN(Z2)
YP
IN
TEMP1
GND
GND
GND
GND
GND
GND
GND
GND
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
GND
GND
GND
GND
GND
GND
GND
GND
ON
XP
YN
YP
YN
OFF
OFF
OFF
XP(Z1)
YN(Z2)
YP
XN
XN
XN
YP
YP
XP
XN
XN
XN
XP
XN
YP
YN
ADC
AIN+
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
ON
ON
ON
ON
ON
ON
OFF
Note
DFR
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
TEMP0
Y
(Z1)
(Z2)
X
IN
TEMP1
NA
Y
NA
(Z1)
(Z2)
X
NA
Table 2
MS0482-J-01
2007/12
ASAHI KASEI
[AK4182A]
■
PD1
PD0
A/D
CSN = “H”
8bit
CSN = “L”
CSN= “H”
CSN = “H”
CSN = “L”
1
■
AK4182A
OPEN
AK4182A
MODE bit
PD1 = 0
PD1, PD0
PENIRQN pin
(Table 3)
MODE bit
111010XX
111000XX
CSN = “L”
PENIRQN
CSN = “H”
PENIRQN
Hi-z
H
1
0
Open
Open
Table 3
8DCLK
CSN = “H”
8DCLK
■
PD1, PD0 2
PD0 bit
PD1 bit
A/D
A/D
PD0 = “1”
YN
XP, YP, XN
PD1
PD0 PENIRQN
0
0
Enabled
CSN = “L”
7DCLK↑
8DCLK↑
CSN = “L”
CSN = “L”
5DCLK↑
OFF
CSN = “H”
A/D
CSN = “H”
OPEN
A/D
GND
YN pin
0
1
Enabled
ADC ON
CSN = “L”
A/D
ADC
ON
X
Y
ON
CSN = “H”
1
1
0
1
Enabled
Disabled
VREF ON
CSN
CSN = “L”
A/D
A/D
ON
5DCLK↓ 20DCLK↓
PENIRQN
ADC
ON
PEN
CSN = “H”
PENIRQN
AD
CSN
“H”
CSN = “L”
ON/OFF
Table 4
MS0482-J-01
2007/12
ASAHI KASEI
[AK4182A]
■
CSN, DCLK, DIN, DOUT
4
CSN
1
2
3
4
5
6
7
8
MO SER/
DFR
PD1
PD0
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DCLK
S
DIN
A2
A1
A0
S
A2
5
4
A1
A0
MO SER/
DFR
PD1
PD0
Hi-Z
BUSY
11
Hi-Z
10
9
8
7
6
3
2
1
0
11
10
DOUT
Touch Screen Driver SW
(SER/ DFR
=”1”, PD0 =”0”)
Touch Screen Driver SW
(SER/ DFR
=”0”, PD0 =”0”)
Figure 7
CSN ↓
DIN
MSB S
5DCLK↓
BUSY
DOUT
CSN ↓
“H”
8DCLK↓
Hi-Z
“L”
AK4182A
DCLK ↑
“H”
ADC
SER/ DFR = “1”
PD0 = “0”
ON
SER/ DFR = “0”
5DCLK↓
20 DCLK↓
ON
5DCLK↓
PD0 = ”1”
8DCLK↓
9DCLK↓
8bit
9DCLK↓
MSB
A/D
MS0482-J-01
ON
BUSY “H”
DOUT
7DCLK
CSN = “H”
“L”
A/D
DIN = “L”
15DCLK
A/D
2007/12
ASAHI KASEI
[AK4182A]
■
A/D
YN pin
PENIRQN
GND
XP pin
2
typ.50K
(VCC)--- (Ri)--- (X+)---(Y-)
PENIRQN
PENIRQN
Ri
XP
“L”
“H”
CSN = “H”
“L”
PENIRQN
PD1 bit PD0 bit (1,1)
PD1 bit PD0 bit
PENIRQN
“1”
CSN = “H”
“H”
CSN = “L”
PENIRQN
PD0 bit
PD0
8DCLK↑
PD0
i.
PD1 bit
ON/OFF
CSN = “L”
5DCLK↓
PENIRQN
PD0
“H”
PENIRQN
“1”
X
VBAT
ii.
ON
PD0 bit
“L”
“0”
PD0
CSN = “H”
IN1
CSN = “L”
“H”
5DCLK↓
Y
“L”
20DCLK↓
PENIRQN
X
Y
“L”
VBAT
iii.
IN1
CSN = “L” 20DCLK↓
PENIRQN
“H”
PD0 bit
“L”
“0”
PD0
“1”
PENIRQN
X
VBAT
PD0
“H”
IN1
Y
“L”
“H”
A/D
CSN
“L”
PEN
PENIRQN
IOVDD
VCC
Ri =
VCC
EN2
50kΩ
Driver OFF
XP
EN1
YN
Driver ON
Figure 8
MS0482-J-01
2007/12
ASAHI KASEI
[AK4182A]
i
iii
ii
CSN
1
2
3
4
5
6
7
8
MO SER/
DFR
PD1
PD0
9
10
11
12
13
14
15
16
9
8
7
6
5
17
18
19
20
21
22
23
24
DCLK
DIN
S
A2
A1
A0
BUSY
11
10
4
3
2
1
0
DOUT
CONV
Internal
AXIS = ((!A2) & (!A1) & (A0))
| ((!A2) & (A1) & (A0))
| ((A2) & (!A1) & (!A0))
| ((A2) & (!A1) & (A0));
/* X
/* Z1
/* Z2
/* Y
*/
*/
*/
*/
EN1 = ((!CSN) & (!CONV) & AXIS & PD0)
/* CSN = “L” X/Y/Z1/Z2
| ((!CSN) & AXIS & CONV);
/* CSN = “L”, X/Y/Z1/Z2
EN2 = ((!CSN) & (!CONV) & (!PD0))
/* CSN = “L”, PD0 = “1”, 5DCLK↓
| (CSN & (!DCLK) & (!(PD1& PD0));
/* CSN = “H”
DCLK = “L”
MS0482-J-01
PD0 = “1” 5DCLK↓
5DCLK↓
*/
20DCLK↓
20DCLK↓
PD0, PD1
20DCLK↓
*/
*/
(1,1)
*/
2007/12
ASAHI KASEI
[AK4182A]
16pin QFN (Unit: mm)
TOP VIEW
BOTTOM VIEW
2.1 ± 0.15
4.0 ± 0.1
#9
#12
#13
#5
#16
A
#4
B
#1
0.3 ± 0.05
0.75 ± 0.05
#1Pin Indicator with Laser Maker
0.55 ± 0.1
4.0 ± 0.1
2.1 ± 0.15
#8
0.10
M
PIN #1 I.D.
(0.35 ×45 )
EXPOSED THERMAL DIE PAD
0.65
*
0.2
0.08
DIE PAD
■
:
:
:
MS0482-J-01
2007/12
ASAHI KASEI
[AK4182A]
4182A
XXXX
1
XXXX : Date code identifier (4
MS0482-J-01
)
2007/12
ASAHI KASEI
Date (YY/MM/DD)
06/03/23
07/12/10
[AK4182A]
Revision
00
01
Reason
Page
Contents
5
Differential Nonlinearity (DNL) Error
max ±2 LSB
Tri-state Leakage Current
(XP, YP, XN, YN pins)
max 50μA → 10μA
min -50μA → -10μA
6
7
16
DIE PAD
DIE PAD
→
GND
•
•
•
•
•
•
MS0482-J-01
2007/12