ASAHI KASEI
[AK4182A]
Touch Screen Controller
AK4182A
General Description:
The AK4182A is a 4-wire resistive touch screen
controller that incorporates a 12-bit 125 kHz sampling
SAR type A/D converter.
The AK4182A operates down to 2.2V supply voltage and
supports digital I/O interface voltage from 1.5V to VCC in
order to connect low voltage uP.
The AK4182A can detect the pressed screen location by
performing two A/D conversions. In addition to location,
the AK4182A also measures touch screen pressure.
On-chip VREF can be utilized for analog auxiliary input,
temperature measurement and battery monitoring with
the ability to measure voltage from 0V to 5V.
The AK4182A also has an on-chip temperature sensor.
The AK4182A is available in 16pin QFN thin package
(0.75mm in height) and has the operating temperature
range of -40°C to +85°C
Features:
12 bit SAR type A/D Converter with S/H circuit
Low Voltage Operation (VCC = 2.2V ∼ 3.6V)
Low Voltage Digital I/F (1.5V ∼ VCC)
4-wire I/F
Sampling Frequency: 125 kHz (max)
On-Chip Voltage Reference (2.5V)
Pen Pressure Measurement
On-Chip Thermo Sensor
Direct Battery Measurement
Low Power Consumption (260μA)
Package
16pin QFN
XP
DCLK
YP
Level
Shifter
XN
Control
Logic
CSN
DOUT
YN
DIN
IN
BUSY
Internal VREF(2.5V)
VBAT
IOVDD
R1
PENIRQN
R2
VREF+
VREF-
AIN+
AIN-
12bit
ADC
(SAR type)
PEN
INTERRUPT
Temp.
Sensor
VREF
VCC
GND
Block Diagram
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ASAHI KASEI
[AK4182A]
■ Ordering Guide
AK4182AVN
-40°C ∼ +85°C
16pinQFN
■ Pin Layout
VREF
IOVDD
PENIRQN
DOUT
IN
BUSY
DIN
VBAT
CSN
GND
DCLK
YN
2
XN
YP
XP
VCC
MS0482-E-01
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ASAHI KASEI
[AK4182A]
PIN/FUNCTION
No.
1
Signal Name
BUSY
I/O
O
2
DIN
I
3
CSN
I
4
5
6
DCLK
VCC
XP
I
I/O
7
YP
I/O
8
XN
I/O
9
YN
I/O
10
11
12
13
GND
VBAT
IN
VREF
I
I
I/O
14
15
IOVDD
PENIRQN
O
16
DOUT
O
MS0482-E-01
Description
BUSY Output
This pin goes to low at CSN = “L”. BUSY signal is “H” only for the period between the
falling edge of 8th DCLK and the falling edge of 9th DCLK.
This pin is Hi-Z state at CSN= “H”
Serial Data Input
Inputs 8-bit control command data serially when CSN= “L”
AK4182A latches at the rising edge of DCLK. Must keep “L” while not issuing commands.
Chip Select Input
Enables writing data to the registers when CSN= “L”.
External Clock Input
Power Supply
Touch Screen X+ plate Voltage supply
X axis Measurement: Supplies the voltage to X+ position input
Y axis Measurement: This pin is used as the input for the A/D converter
Pen Pressure Measurement: This pin is the input for the A/D converter at Z1 measurement.
Temperature/VBAT/IN Measurement: OPEN state
Pen Waiting State: Pulled up by an internal resistor (typ.50KΩ).
Touch Screen Y+ plate Voltage supply
Y axis Measurement: Supplies the voltage to Y+ position input
X axis Measurement: This pin is used as the input for the A/D converter
Pen Pressure Measurement: Supplies the voltage.
Temperature/VBAT/IN Measurement: OPEN state
Pen Waiting State: OPEN state
Touch Screen X- plate Voltage supply
X axis Measurement: Supplies the voltage to X- position input
Y axis Measurement: OPEN state
Pen Pressure Measurement: Supplies the voltage.
Temperature/VBAT/IN Measurement: OPEN state
Touch Screen Y- plate Voltage supply
Y axis Measurement: Supplies the voltage to Y- position input
X axis Measurement: OPEN state
Pen Pressure Measurement: This pin is the input for the A/D converter at Z2 measurement.
Temperature/VBAT/IN Measurement: OPEN state
Pen Waiting State: connected to GND.
Ground
Analog Input for Battery Monitor
Auxiliary Analog Input
Voltage Reference Input/Output
2.5V reference voltage output at PD1 = “1”. Voltage reference input at PD1 = “0”.
Digital I/O Power Supply
Pen Interrupt Output
This pin is “L” during the pen down on pen interrupt enable state with CSN =“H” otherwise
this pin is “H”. This pin is “H” during pen interrupt disable state with the CSN = “H”
regardless pen touch. See Power-down Control and Pen Interrupt for the reference.
Serial A/D Data Output
Output A/D data serially at the falling edge of DCLK. MSB is output at the falling edge of
BUSY signal.
Output “L” at CSN= “L” during A/D data does not output.
This pin is Hi-Z state at CSN= “H”
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ASAHI KASEI
[AK4182A]
ABSOLUTE MAXIMUM RATINGS
GND = 0V (Note 1)
Parameter
Power Supplies
Digital I/O Power Supply
Input Current (any pins except for supplies)
Input Voltage
Touch Panel Drive Current
Ambient Temperature (power supplied)
Storage Temperature
Symbol
VCC
IOVDD
IIN
VIN
IOUTDRV
Ta
Tstg
min
-0.3
-0.3
-0.3
-40
-65
max
6.0
6.0
±10
6.0(VCC+0.3)
50
85
150
Units
V
V
mA
V
mA
°C
°C
max
3.6
VCC
Units
V
V
Note 1.All voltages with respect to ground.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
GND = 0V (Note 1)
Parameter
Power Supplies
Digital I/O Power Supply
Symbol
VCC
IOVDD
min
2.7
1.5
typ
3.3
3.3
Note 1. All voltages with respect to ground.
WARNING: AKEMD assumes no responsibility for the usage beyond the conditions in this datasheet.
MS0482-E-01
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ASAHI KASEI
[AK4182A]
ANALOG CHARACTERISTICS
(Ta=-40°C to 85°C, VCC = IOVDD = 2.7V, External Vref=2.5V, fs = 125 KHz, fDCLK = 16 x fs, 12bit mode)
Parameter
min
typ
max
ADC for Touch Screen
Resolution
12
No Missing Codes
11
12
Integral Nonlinearity (INL) Error
±2
Differential Nonlinearity (DNL) Error
±1
±2
Analog Input Voltage Range
0
Vref
Offset Error
±6
Gain Error
±4
Touch Panel Driver
5
XP, YP, RL=300Ω
5
XN, YN, RL=300Ω
XP Pull Up Register (when pen interrupt enable)
50
PSRR (10KHz 100mVpp)
70
Reference Output
Internal Reference
2.44
2.50
2.56
Drift
30
Load Capacitance
0.1
Reference Input
Input Voltage Range
VCC
Battery Monitor
Input Voltage Range
5.0
Input Impedance (Battery Measure Mode)
5
10
Accuracy (Note 2) External VREF = 2.5V is used
±2
Accuracy (Note 2) Internal Reference is used.
±3
Temperature Measurement
Temperature Range
-40
85
Resolution (Note 3)
1.6
Accuracy (Note 4)
±3
Power Supply Current
Normal Mode (Internal Reference OFF)
260
500
Normal Mode (Internal Reference ON)
540
800
Full Power Down(when writing control command with PD1=PD0= “0”)
0
3
Units
Bits
Bits
LSB
LSB
V
LSB
LSB
Ω
Ω
KΩ
dB
V
ppm/°C
μF
V
V
KΩ
%
%
°C
°C
°C
μA
μA
μA
Note 2. Accuracy is the difference between the output code when 5 volts is input to the VBAT pin and the “ideal” code at 1.25
volts.
Note 3. “Ideal” value derived from theory
Note 4. Accuracy is defined as the difference between the voltage measured by two current sources, and the ideal voltage derived
from theory at specific temperatures.
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ASAHI KASEI
[AK4182A]
DC CHARACTERISTICS (Logic I/O)
(Ta = -40°C to 85°C, IOVDD = 1.5V to 3.6V)
Parameter
“H” level input voltage
“L” level input voltage
Input Leakage Current
“H” level output voltage (@ Iout = -250μA)
“L” level output voltage
(@ Iout= 250μA)
Tri-state Leakage Current
All pins except for XP, YP, XN, YN pins
XP, YP, XN, YN pins
Symbol
VIH
VIL
IILK
VOH
VOL
IOLK
min
0.8xIOVDD
typ
-
-10
IOVDD-0.4
-
-
-10
-10
max
0.4
Units
V
V
μA
V
V
10
10
μA
μA
max
Units
125
kHz
2100
60
kHz
%
μs
1/fDCLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.2xIOVDD
10
SWITCHING CHARACTERISTICS
(Ta = -40°C to 85°C, VCC = 2.2V to 3.6V, IOVDD = 1.5V to VCC, CL = 50pF)
Parameter
Symbol
min
Touch Panel (A/D Converter)
Throughput Rate
fs
DCLK
frequency
fDCLK
10
duty
duty
40
tTRK
1.428
Tracking Time (Rin=600Ω) (Note 5)
Conversion Time
tCONV
t1
100
CSN “↓” to First DCLK “↑”
t2
CSN “↓” to BUSY Tri-State Disabled
t3
CSN “↓” to DOUT Tri-State Disabled
DCLK High Pulse Width
t4
190
DCLK Low Pulse Width
t5
190
t6
DCLK “↓” to BUSY “↑”
Data Setup Time
t7
100
Data Valid to DCLK Hold Time
t8
10
t9
Data Access Time after DCLK “↓”
t10
0
CSN “↑” to DCLK Ignored
t11
CSN “↑” to BUSY Hi-Z state
t12
CSN “↑” to DOUT Hi-Z state
Note 5. The actual tracking periods are 3tDCLK. (tDCLK=1/fDCLK)
typ
50
12
200
200
160
160
200
200
CSN
50%VCC
t5
t1
t6
t6
t9
t4
t10
DCLK
50%VCC
t8
t7
PD0
50%VCC
DIN
t2
t11
VOH
BUSY
VOL
t12
t3
DOUT
D11
D10
D0
Figure 1 AK4182A Timing Diagram
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VOH
VOL
ASAHI KASEI
[AK4182A]
■ A/D Converter for Touch Screen
The AK4182A incorporates a 12-bit successive approximation resistor (SAR) A/D converter for position measurement,
temperature, and battery voltage. The architecture is based on capacitive redistribution algorithm, and an internal capacitor array
functions as the sample/hold (S/H) circuit.
The SAR A/D converter output is a straight binary format as shown below:
Input Voltage
Output Code
FFFH
(ΔVREF-1.5LSB)~ ΔVREF
FFEH
(ΔVREF-2.5LSB) ~ (ΔVREF-1.5LSB)
----------------0.5LSB ~ 1.5LSB
001H
0 ~ 0.5LSB
000H
ΔVREF: (VREF+) – (VREF-)
Table 1 Output Code
The full scale (ΔVREF) of the A/D converter depends on the input mode. The AK4182A is controlled by the 8 bit serial command
on DIN.
■ Analog Inputs
Analog input is selected via the A2, A1, A0 and SER/ DFR bits in the control register. If the analog inputs are selected to the X
or Y-axis, SER/ DFR = “0”, which means differential mode, the full scale (ΔVREF) is the differential voltage between the noninverting terminal and the inverting terminal of the measured axis (e.g. X-axis measurement :(XP) – (XN)). Analog non-inverting
input to A/D converter is the non-inverting terminal of the non-measured axis while the inverting input is the inverting terminal of
the measured axis. If the SER/ DFR bit is set to “1” which means single-ended mode, the full scale of A/D converter (ΔVREF)
is the internal reference voltage or external reference voltage. Note that SER/ DFR bit should be set to”0” if IN2 is selected as
analog input; nevertheless, IN2 is actually measured by single-ended mode.
Tracking time is the period from the falling edge of 5th DCLK to that of 8th DCLK after the detection of START bit during
CSN=”L”.
The required settling time to charge the internal capacitor array needs at least 1.428μs (3tDCLKat 2.1MHz). The maximum
throughput of A/D converter is 125 kHz.
■ The Position Detection of Touch Screen
The position on the touch screen is detected by taking the voltage of one axis when the voltage is supplied between the two
terminals of another axis. At least two A/D conversions are needed to get the two-dimensional (X/Y axis) position.
MS0482-E-01
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ASAHI KASEI
[AK4182A]
ON
ON
XP
VREF
XP
AIN+
VREF
YP
ADC
VREF-
AIN+
YP
ADC
AIN-
VREF-
AIN-
XN
XN
ON
YN
YN
ON
a)
X-Position Measurement Differential Mode
b)
Y-Position Measurement Differential Mode
Figure 2 Axis Measurement
The differential mode position detection is typically more accurate than the single-ended mode. As the full scale of single-ended
mode is fixed to the internal (or external) reference voltage, input voltage may exceed the full-scale reference voltage. This
problem does not occur in differential mode. In addition to this, the differential mode is less influenced by power supply voltage
variation due to the ratio-metric measurement.
However, note that the touch screen driver switch is still ON and the current flows even for the A/D conversion time. On the other
hand, the touch screen driver switch is ON only for the tracking time, 3tDCLK. From the point of power consumption, singleended mode has more advantages. However the differential mode is generally used to get more accurate measurement in position
detecting.
■ The Pen Pressure Measurement
The touch screen pen pressure can be derived from the measurement of the contact resistor between two plates. The contact
resistance depends on the size of the depressed area and the pressure. The area of the spot is proportional to the contact resistance.
This resistance (Rtouch) can be calculated using two different methods.
The first method is that when the total resistance of the X-plate sheet is already known. The resistance, Rtouch, is calculated from
the results of three conversions, X-position, Z1-Position, and Z2-Position, and then using the following formula:
Rtouch = (Rxplate) * (Xposition/4096) * [(Z2/Z1) – 1]
The second method is that when both the resistances of the X-plate and Y-plate are known. The resistance, Rtouch, is calculated
from the results of three conversions, X-position, Y-Position, and Z1-Position, and then using the following formula:
Rtouch = (Rxplate*Xposition/4096)*[(4096/Z1) – 1] – Ryplate*[1 – (Yposition/4096)]
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ASAHI KASEI
[AK4182A]
ON
ON
YP
YP
XP
VREF+
AIN+
VREF-
AIN-
touch
XP
ADC
VREF+
AIN+
VREF-
AIN-
touch
ADC
XN
XN
ON
ON
YN
a)
YN
b)
Z1-Position Measurement Differential Mode
Z2-Position Measurement Differential Mode
Figure 3 Pen Pressure Measurements
■ Voltage Reference
The AK4182A has an internal 2.5V voltage reference. This reference can be turned ON when PD1 = “1”, and OFF when PD1 =
“0”. This reference is used in the single-ended mode for the battery monitoring, temperature measurement, or for auxiliary input.
A 0.1μF or larger capacitor should be connected for stable operation of the VREF circuit. Settling time depends on this external
capacitance, but 500μs or longer time is required if the external capacitance is 0.1μF.
If an external voltage reference is used, PD1 bit should be set to “0”.
VCC should be more than 2.7V in order to be stable internal output reference when PD1 = “1” (internal voltage reference).
■ Battery Measurement
The AK4182A can directly measure the battery voltage up to 5V while the AK4182A operates at 2.2V to 3.6V. The VBAT input
voltage is divided internally by the resistance of R1 (7.5kΩ) and R2 (2.5kΩ) and applied to the input of AD converter (AIN+) as
shown in Figure 4. Minimum 5μs is required as tracking time.
VREF
PD1
Internal
VREF(2.5V)
VBAT
AIN+
R0
VREF+
ADC
R1=7.5K
AIN-
VREF-
R2=2.5K
Enable
Figure 4 Battery Monitoring
MS0482-E-01
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ASAHI KASEI
[AK4182A]
■ Temperature Measurement
Equation <1> describes the forward characteristics of the diode.
iD=I0exp(vD/VT) ( VT = kT/q)
<1>
I0: reverse saturation current
q : 1.602189×10-19 (electron charge)
k : 1.38054×10-23 (Boltzmann’s constant)
vD: voltage across diode
T: absolute temperature K
The diode characteristic is approximately shown as a diode junction voltage. That is theoretically proportional to the temperature;
the ambient temperature can be predicted by knowing this voltage.
Temp.
Sensor
iD1
=I
TEMP0
iD2
= 91 x I
TEMP1
Figure 5 Temperature Measurement
As the AK4182A has two different fixed current circuits and a diode (temperature sensor), the temperature can be measured by
using two different methods.
The first method needs two conversions, but can derive the temperature directly without knowing the voltage at a specific
temperature.
From equation <1>
(iD2 / iD1) = exp {(v(91 x I) - v(I))/VT}
N = (iD2 / iD1) = 91 (ratio of the current)
T°C = (ΔVbe * q)/(k * ln N) – 273
ΔVbe = V (91 x I) – V (I)
T°C = 2.573×103 × ΔVbe – 273
The second method needs only one conversion as the following equation, but requires knowing the junction voltage at the specific
temperature.
T = (k/q)* vD/ln (iD/I0)
MS0482-E-01
<2>
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ASAHI KASEI
[AK4182A]
■ Digital I/F
The digital I/O of the AK4182A can operate from 1.5V IOVDD. This allows connecting the low –voltage microprocessor. The
full scale level of digital I/O voltage is specified IOVDD.
VCC=2.2V – 3.6V
IOVDD=1.5V – VCC
IOVDD
AK4182A
Micro-
DCLK
Processor
SDIN
SDOUT
BUSY
Figure6 Digital I/F
■ Control Command
The control command, 8 bits, provided to the AK4182A via DIN is shown in the following table. This command includes start bit,
channel selection, resolution, measurement configuration, and power-down mode. The AK4182A latches the serial command at
the rising edge of DCLK. Refer to the detailed information regarding the bit order, function, the status of driver switch, ADC input,
reference voltage as shown in Table 2.
D7
S
D6
A2
BIT
7
6-4
Name
S
A2-A0
3
2
MODE
SER/ DFR
3
PD1-PD0
D5
A1
A1
A0
D3
MODE
D2
SER/ DFR
D1
PD1
D0
PD0
Function
Start Bit. This bit must be “H” because the AK4182A initiates the command recognition
Channel Selection Bits. Analog inputs to the A/D converter and the activated driver switches are
selected. Please see the following table for the detail.
Resolution of A/D converter. “L”: 12 bit output “H”: 8 bit output
Measurement Mode (Single-Ended/Differential)
Power-down Mode (reference to “ Power-down Control”)
Control Command
A2
D4
A0
SER/
ADC input (ΔAIN)
XP
XN
YP
YN
AIN+
AIN-
Reference Voltage
(ΔVREF)
VREF+
VREF-
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
TEMP0
XP
VBAT
XP(Z1)
YN(Z2)
YP
IN
TEMP1
GND
GND
GND
GND
GND
GND
GND
GND
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
GND
GND
GND
GND
GND
GND
GND
GND
OFF
OFF
ON
ON
XP
YN
YP
YN
OFF
OFF
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
XP(Z1)
YN(Z2)
YP
XN
XN
XN
YP
YP
XP
XN
XN
XN
Status of Driver Switch
Note
DFR
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
TEMP0
Y-axis
Battery Monitor
Z1 (Pen Pressure)
Z2 (Pen Pressure)
X-axis
IN
TEMP1
NA
Y-axis
NA
Z1 (Pen Pressure)
Z2 (Pen Pressure)
X-axis
Sleep mode
NA
Table 2 Control Command List
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ASAHI KASEI
[AK4182A]
■ Power on Sequence
It is recommended that the control command is sent to fix the internal register value to be 00H when first power up. This initiates
all registers such as A2-0 bit, MODE bit, SER/DFR bit, PD1 bit and PD0 bit. The sequence is that 1) Power On with CSN = “L” or
“H” then CSN = “H”. 2) Send control command after CSN = “L”. 3) CSN = “H” again. Once sending command to fix the internal
register after first power up, the state of AK4182A is held on the known-condition of state as last command issued.
■ Sleep mode
The AK4182A supports sleep mode that enables touch panel to put open state and disables pen interrupt function. The AK4182A
goes into sleep mode when the AK4182A gets the sleep control command. The selection of the Sleep mode is set by “MODE” bit.
The state of both the output of the PENIRQN pin and the connection with touch panel interface (XP, YP, XN, and YN) are the
following Table 3. The AK4182A goes into the sleep mode with the power-down mode set by PD1, PD0 (refer to Table 4).
The AK4182A keeps the sleep mode until it receives next control command.
Control command
command
MODE
111010XX
1
111000XX
0
CSN=“L”
PENIRQN
Touch Panel
Normal Operation Normal Operation
Normal Operation Normal Operation
CSN=“H”
PENIRQN
Touch Panel
Hi-z
Open
Output “H”
Open
Table 3 Sleep Command Setting
The timing of going into the Sleep mode is the rising edge of the 8th DCLK. This sleep mode is available when CSN = “H”.
AK4182A goes into normal operation out of sleep mode when the normal control command receives. The initial state after power
up is in a normal state.
■ Power-down Control
Power-down is controlled by two bits, PD0 bit and PD1 bit. The power-down state of internal voltage reference is controlled by
PD1 bit, and is updated at the rising edge of 7th DCLK with CSN = “L”.
The power-down state of A/D converter, and touch screen driver switches is controlled by PD0 bit, and is updated at the rising
edge of 8th DCLK with CSN = “L”.
If PD0 bit is set to “1”, the state of the driver switches is maintained until the 5th DCLK↑ of the next conversion if CSN is “L”. If
CSN is “H”, all driver switches except for YN switch switches are turned off and are open states. Only YN driver switch is turned
ON and YN pin is forced to the ground in this case.
PD1
0
PD0
0
PENIRQN
Enabled
0
1
Enabled
1
0
Enabled
1
1
Disabled
Function
Auto Power-down Mode.
A/D converter is automatically powered up at the start of the conversion, and goes to power- down
state automatically at the end of the conversion. And the AK4182A is always powered down at
this mode if CSN= “H”. All touch screen driver switches except for YN switch are turned off and
relative pins are open state. Only YN driver switch is turned ON and YN pin is forced to the
ground in this case. PEN interrupt function is enabled except for the tracking time and conversion
time even CSN= “L”. Please see “ PEN Interrupt” for the detail. The internal voltage
reference is always power-down state.
ADC ON Mode
A/D converter is always powered up while CSN = “L”. The internal voltage reference is always
power-down state. If X-axis or Y-axis is selected as analog input, touch screen driver switches are
always turned ON and the current flows through the touch plate if CSN= “L”. This is effective if
more settling time is required to suppress the electrical bouncing of touch plate.
VREF ON Mode
The internal voltage reference is always powered up regardless of CSN state. ADC is auto powerdown mode. PEN interrupt function is enabled at all the period except for the period from the
5DCLK↓ to 20DCLK↓ regardless of CSN state.
ADC and VREF ON Mode
A/D converter and the internal voltage reference is power-up state
PEN interrupt function is disabled and PENIRQN is forced to “H” state if CSN= “H”. The
behavior of PENIRQN is the same as “ADC ON Mode”
Table 4 Power-down Control
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ASAHI KASEI
[AK4182A]
■ Serial Interface
The AK4182A is controlled via 4-wire serial interface, CSN, DCLK, DIN, DOUT.
Please see “Switching Characteristics” for the detail.
CSN
1
2
3
4
5
6
7
8
MO SER/
DFR
PD1
PD0
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DCLK
S
DIN
A2
A1
A0
S
A2
5
4
A1
A0
MO SER/
DFR
PD1
PD0
Hi-Z
BUSY
Hi-Z
11
10
9
8
7
6
3
2
1
0
11
10
DOUT
Touch Screen Driver SW
(SER/ DFR = ”1”, PD0 = ”0” )
Touch Screen Driver
(SER/ DFR = ”0”, PD0 = ”0” )
Figure 7 Serial Interface
BUSY and DOUT goes to “L” from Hi-Z state at the falling edge of CSN. The AK4182A latches the 8bit control word serially via
DIN at the rising edge of DCLK. As the AK4182A starts the command decoding at the first “H” bit after CSN= “↓”, MSB (S bit)
of the command must be “H”.
Tracking time is the period from the falling edge of 5th DCLK to the falling edge of 8th DCLK. If SER/ DFR = “1”, PD0= “0”,
and if analog input is X-axis or Y-axis (the measurement is the pen position or pen pressure), the touch screen driver switches are
turned ON for this 3DCLK period. If SER/ DFR = “0”, the switches are turned ON for the period from 5DCLK↓ to 20 DCLK↓.
BUSY is “H” for one DCLK period, which is from 8DCLK↓ to 9DCLK↓. BUSY is “L” for other period.
The AK4182A outputs A/D data with MSB first via DOUT from the falling edge of 9th DCLK.
DIN must keep low state for minimum 7 DCLK times (9th-15th DCLK) after command is sent on the DIN.
The AK4182A can output one A/D data per 15 DCLK clock cycles for the fastest way as shown in the dotted line of the Figure 7.
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[AK4182A]
■ Pen Interrupt
The AK4182A has pen interrupt function to detect the pen touch. Pen interrupt function is enabled at power-down state. YN pin is
connected to GND at the PEN interrupt enabled state. And XP pin is pulled up via an internal resistor (Ri), typically 50kΩ. If
touch plate is pressed by pen, the current flows via <VCC> – <Ri> – <XP> –<the plates> - <YN>- <GND>. The resistance of the
plate is generally 1K Ω or less, PENIRQN is forced to “L” level. If the pen is released, PENIRQN returns “H” level because two
plates are disconnected, and the current doesn’t flow via two plates.
If the plate is touched with pen or finger, PENIRQN goes to “L” at CSN = “H” unless previous command issued with both PD1
and PD0 is “1”. PENIRQN is disabled and keeps “H” level regardless of the touched/non-touched state if CSN = “H”.
The operation of PENIRQN is related to PD0 bit. PD0 bit is updated at the rising edge of 8th DCLK (please see “ Power-down
Control” for the detail). Therefore, the last PD0 bit is valid until this timing. (The internal voltage reference is controlled by only
PD1 bit regardless of PD0 bit and CSN state.)
i.
The period from CSN↓ to the 5th DCLK.
The behavior of PENIRQN is related to the combination of the last selected analog input channel, and the last PD0 bit. If the last
PD0 bit was set to “0”, PENIRQN is “H” while the plate is not pressed and “L while the plate is pressed regardless of the last
analog input. If the last PD0 bit was set to “1”, the last analog input decides the level of PENIRQN. If the last analog input
channel is ether X-axis or Y-axis, PENIRQN is “L” for all the time in this period regardless of the touched/non-touched state. On
the other hand, if the last analog input is temperature, VBAT, or auxiliary inputs, PENIRQN is “H” for all the time in this period
regardless of the touched/non-touched state.
ii.
The period from the 5th DCLK↓ to the 20th DCLK↓ on CSN = “L"
The behavior of PENIRQN is related to the selected analog input. If the X-axis or Y-axis is selected as analog input, PENIRQN
is forced to “L” regardless of the touched/non-touched state. If the temperature, VBAT, or auxiliary inputs is selected,
PENIRQN is forced to “H” regardless of the touched/non-touched state.
iii.
The period from the 20th DCLK↓ to CSN↑
The behavior of PENIRQN is related to the combination of the current selected analog input channel, and the current PD0 bit.
If the current PD0 bit is set to “0”, PENIRQN is “H” while the plate is not pressed and “L while the plate is pressed regardless
of the current selected analog input. If the current PD0 bit is set to “1”, the current analog input decides the operation of
PENIRQN. If the current analog input channel is ether X-axis or Y-axis, PENIRQN is “L” for all the time in this period
regardless of the touched/non-touched state. On the other hand, if the current analog input is temperature, VBAT, or auxiliary
inputs, PENIRQN is “H” for all the time in this period regardless of the touched/non-touched state.
It is recommended that the micro controller mask the pseudo-interrupts while the control command is issued or A/D data is output.
PENIRQN
IOVDD
VCC
Ri =
50kΩ
VCC
EN2
Driver OFF
XP
EN1
YN
Driver ON
Figure 8 PENIRQ Functional Block Diagram
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[AK4182A]
Region i
Region iii
Region ii
CSN
1
2
3
4
5
6
7
8
MO SER/
DFR
PD1
PD0
9
10
11
12
13
14
15
16
9
8
7
6
5
17
18
19
20
21
22
23
24
DCLK
DIN
S
A2
A1
A0
BUSY
11
10
4
3
2
1
0
DOUT
CONV
Internal
AXIS = ((!A2) & (!A1) & (A0))
| ((!A2) & (A1) & (A0))
| ((A2) & (!A1) & (!A0))
| ((A2) & (!A1) & (A0));
/* X-axis Measurement */
/* Z1 Measurement */
/* Z2 Measurement */
/* Y-axis Measurement */
EN1 = ((!CSN) & (!CONV) & AXIS & PD0)
/* CSN= “L”, X/Y/Z1/Z2 Measurement, PD0 = 1, NOT “CONV period” */
| ((!CSN) & AXIS & CONV);
/* CSN= “L”, X/Y/Z1/Z2 Measurement, “CONV period” */
EN2 = ((!CSN) & (!CONV) & (!PD0))
/* CSN= “L”, PD0 = 1, NOT “CONV period” */
| (CSN & (!(PD1& PD0));
/* CSN= “H”, (PD0, PD1) is not (1,1) */
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[AK4182A]
PACKAGE
16pin QFN (Unit: mm)
TOP VIEW
BOTTOM VIEW
2.1 ± 0.15
4.0 ± 0.1
#9
#12
#13
#5
#16
A
#4
B
#1
0.3 ± 0.05
#1Pin Indicator with Laser Maker
0.75 ± 0.05
0.55 ± 0.1
4.0 ± 0.1
2.1 ± 0.15
#8
0.10
M
PIN #1 I.D.
(0.35 ×45 )
EXPOSED THERMAL DIE PAD
0.65
0.2
0.08
Note: The thermal die pad must be open or connected to the ground.
■ Package & Lead frame material
Package molding compound: Epoxy
Lead frame material: Cu
Lead frame surface treatment: Solder (Pb free) plate
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[AK4182A]
MARKING
4182A
XXXX
1
.
XXXX: Date code identifier (4 digits)
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[AK4182A]
REVISION HISTORY
Date (YY/MM/DD)
06/03/23
07/12/10
Revision
00
01
Reason
First Edition
Spec
Addition
Spec change
Error
Correction
Page
Contents
5
Differential Nonlinearity (DNL) Error was added.
max ±2 LSB
Tri-state Leakage Current (XP, YP, XN, YN pins) was
changed.
max 50µA → 10µA
min -50µA → -10µA
Analog inputs
An explanation of Tracking Time was corrected.
A note of thermal die pad was changed.
The thermal die pad is tied to PCB substrate (GND).
→ The thermal die pad must be open or connected to
the ground.
6
7
16
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei
EMD Corporation (AKEMD) or authorized distributors as to current status of the products.
z AKEMD assumes no liability for infringement of any patent, intellectual property, or other rights in the
application or use of any information contained herein.
z Any export of these products, or devices or systems containing them, may require an export license or other
official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency
exchange, or strategic materials.
z AKEMD products are neither intended nor authorized for use as critical componentsNote1) in any safety, life
support, or other hazard related device or systemNote2), and AKEMD assumes no responsibility for such use, except
for the use approved with the express written consent by Representative Director of AKEMD. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it,
and which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety
or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
z It is the responsibility of the buyer or distributor of AKEMD products, who distributes, disposes of, or otherwise
places the product with a third party, to notify such third party in advance of the above content and conditions, and
the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKEMD harmless
from any and all claims arising from the use of said product in the absence of such notification.
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