ASAHI KASEI [AK4395] AK4395 Advanced Multi-Bit 192kHz 24-Bit ∆Σ DAC AK4395 DVD-Audio 192kHz 24 DAC ∆Σ 110dB SCF • 128 • 192kHz • 24 8 (Slow Roll-off Option) Ripple: ± 0.0002dB, Attenuation: 110dB • • • 32kHz, 44.1kHz, 48kHz • • • THD+N: -100dB • DR,S/N: 120dB 256fs, 384fs, 512fs or 768fs • 2 128fs, 192fs, 256fs or 384fs 128fs or 192fs 4 • : 5V ± 5% I/F • TTL • : 28 VSOP • AK4393/4 DIF0 LRCK BICK SDATA SMUTE PDN CAD0 CAD1 DIF1 DIF2 DVDD DVSS DEM0 DEM1 AVDD AVSS BVSS De-emphasis Control Audio Data Interface VCOM DZFL De-emphasis DATT, Soft Mute 8x Interpolator ∆Σ Modulator SCF De-emphasis DATT, Soft Mute 8x Interpolator ∆Σ Modulator SCF CCLK CDTI AOUTLAOUTR+ AOUTRDZFR Control Register CSN AOUTL+ Clock Divider P/S MCLK CKS0 CKS1 ACKS MS0040-J-00 VREFH VREFL 2000/7 -1- ASAHI KASEI [AK4395] n AK4395VF AKD4395 -10 ∼ +70°C 28pin VSOP (0.65mm pitch) n DVSS 1 28 ACKS/DZFR DVDD 2 27 CKS1/CAD1 MCLK 3 26 CKS0/DZFL PDN 4 25 P/S BICK 5 24 VCOM SDATA 6 23 AOUTL+ LRCK 7 22 AOUTL- SMUTE/CSN 8 21 AOUTR+ DFS0/CAD0 9 20 AOUTR- DEM0/CCLK 10 19 AVSS DEM1/CDTI 11 18 AVDD DIF0 12 17 VREFH DIF1 13 16 VREFL DIF2 14 15 BVSS Top View n AK4393/4 AK4395 AK4394 AK4393 fs (max) 216kHz 216kHz 108kHz DVDD 4.75~5.25V 4.75~5.25V 3~5.25V 110dB 75dB 75dB 256 levels, 0.5dB N/A N/A µP I/F Address Pin CAD0/CAD1 N/A N/A De-emphasis filter 32k,44.1k,48k 32k,44.1k,48k,96k 32k,44.1k,48k,96k Optional Filter Slow Roll-off Slow Roll-off N/A Zero Detection Pin DZFL/DZFR DZFL/DZFR N/A Digital Filter Stopband Attenuation Digital Volume MS0040-J-00 2000/7 -2- ASAHI KASEI No. 1 2 3 Pin Name [AK4395] I/O DVSS DVDD MCLK PDN I I BICK I SDATA I LRCK SMUTE I I CSN DFS0 I I CAD0 DEM0 CCLK DEM1 CDTI DIF0 DIF1 DIF2 BVSS VREFL VREFH AVDD AVSS AOUTRAOUTR+ AOUTLAOUTL+ VCOM P/S I I I I I I I I I I O O O O O I CKS0 DZFL CKS1 I O I L/R Clock Pin Soft Mute Pin in parallel mode When this pin goes “ H” , soft mute cycle is initiated. When returning “ L” , the output mute releases. Chip Select Pin in serial mode Sampling Speed Mode Select Pin in parallel mode (Internal pull-down pin) “ L” : Normal Speed, “ H” : Double Speed Chip Address 0 Pin in serial mode (Internal pull-down pin) De-emphasis Enable Pin in parallel mode Control Data Clock Pin in serial mode De-emphasis Enable Pin in parallel mode Control Data Input Pin in serial mode Digital Input Format Pin Digital Input Format Pin Digital Input Format Pin Substrate Ground Pin, 0V Low Level Voltage Reference Input Pin High Level Voltage Reference Input Pin Analog Power Supply Pin, 5.0V Analog Ground Pin, 0V Rch Negative analog output Pin Rch Positive analog output Pin Lch Negative analog output Pin Lch Positive analog output Pin Common Voltage Output Pin, 2.6V Parallel/Serial Select Pin (Internal pull-up pin) “ L” : Serial control mode, “ H” : Parallel control mode Master Clock Select Pin in parallel mode Lch Zero Input Detect Pin in serial mode Master Clock Select Pin in parallel mode (Internal pull-down pin) CAD1 ACKS DZFR I I O Chip Address 1 Pin in serial mode (Internal pull-down pin) Master Clock Auto Setting Mode Pin in parallel mode Rch Zero Input Detect Pin in serial mode 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function Digital Ground Pin Digital Power Supply Pin, 5.0V Master Clock Input Pin Power-Down Mode Pin When at “ L” , the AK4395 is in power-down mode and is held in reset. The AK4395 should always be reset upon power-up. Audio Serial Data Clock Pin The clock of 64fs or more than is recommended to be input on this pin. Audio Serial Data Input Pin 2’ s complement MSB-first data is input on this pin. MS0040-J-00 2000/7 -3- ASAHI KASEI (AVSS, BVSS, DVSS=0V; Note 1) Parameter Power Supplies: Analog Digital | BVSS-DVSS | (Note 2) Input Current , Any pin Except Supplies Input Voltage Ambient Operating Temperature Storage Temperature Notes: 1. 2. AVSS, BVSS, DVSS [AK4395] Symbol AVDD DVDD ∆ GND IIN VIND Ta Tstg min -0.3 -0.3 -0.3 -10 -65 max 6.0 6.0 0.3 ±10 DVDD+0.3 70 150 Units V V V mA V °C °C : (AVSS, BVSS, DVSS=0V; Note 1) Parameter Symbol min typ Power Supplies: Analog AVDD 4.75 5.0 (Note 3) Digital DVDD 4.75 5.0 Voltage Reference “ H” voltage reference VREFH AVDD-0.5 (Note 4) “ L” voltage reference VREFL AVSS VREFH-VREFL 3.0 ∆ VREF Notes: 3. AVDD DVDD 4. (VREFH-VREFL) AOUT (typ 0dB) = (AOUT+) - (AOUT-) = ± 2.4Vpp×(VREFH-VREFL)/5 max 5.25 5.25 AVDD AVDD Units V V V V V : MS0040-J-00 2000/7 -4- ASAHI KASEI [AK4395] ( Ta = 25°C; AVDD, DVDD = 5V; AVSS, BVSS, DVSS = 0V; VREFH = AVDD; VREFL = AVSS; fs = 44.1kHz; BICK = 64fs; = 1kHz; 24 ; = 20Hz RL ≥ 600Ω; : Figure 12) 20kHz; Parameter min typ max Resolution Dynamic Characteristics 24 Units Bits (Note 5) THD+N fs=44.1kHz 0dBFS BW=20kHz -60dBFS fs=96kHz 0dBFS BW=40kHz -60dBFS fs=192kHz 0dBFS BW=40kHz -60dBFS Dynamic Range (-60dBFS with A-weighted) (Note 6) (Note 7) S/N (A-weighted) (Note 8) (Note 7) Interchannel Isolation (1kHz) 112 112 100 -100 -53 -97 -51 -97 -51 117 120 117 120 120 -90 -87 - dB dB dB dB dB dB dB dB dB dB dB 0.15 20 ±2.4 0.3 ±2.55 3.5 dB ppm/°C Vpp Ω mA 60 7 10 17 110 mA mA mA mA mA 10 50 100 µA dB DC Accuracy Interchannel Gain Mismatch Gain Drift Output Voltage Load Resistance Output Current (Note 9) (Note 10) (Note 11) ±2.25 600 Power Supplies Power Supply Current Normal Operation (PDN = “ H” ) AVDD DVDD(fs=44.1kHz) DVDD(fs=96kHz) DVDD(fs=192kHz) AVDD + DVDD Power-Down Mode (PDN = “ L” ) AVDD + DVDD (Note 12) Power Supply Rejection (Note 13) Notes: 5. fs=44.1kHz Audio Precision, System Two fs=96kHz, 192kHz ROHDE & SCHWARZ, UPD 6. 101dB at 16bit data, 116dB at 20bit data. 7. Figure 13 ( 2) 8. S/N 9. (VREFH-VREFL) +5V 10. (0dB) (VREFH-VREFL) AOUT (typ.@0dB)= (AOUT+) - (AOUT-) = ±2.4Vpp×(VREFH-VREFL)/5 . 11. AC DC 1kΩ 12. P/S = DVDD, (MCLK, BICK, LRCK) DVDD 13. VREFH +5V AVDD, DVDD 1kHz, 100mVpp MS0040-J-00 2000/7 -5- ASAHI KASEI [AK4395] (fs = 44.1kHz) (Ta = 25°C; AVDD, DVDD = 4.75~5.25V; fs = 44.1kHz; Normal Speed Mode; DEM = OFF; SLOW = “0”) Parameter Symbol min (Note 14) PB (Note 14) SB PR SA GD 0 24.1 typ max Units 22.05 20.0 - kHz kHz kHz dB dB 1/fs Digital Filter ±0.01dB -6.0dB Passband Stopband Passband Ripple Stopband Attenuation Group Delay (Note 15) ± 0.0002 110 - 43.5 - Digital Filter + SCF Frequency Response 0 ∼ 20.0kHz ± 0.1 dB Note: 14. The passband and stopband frequencies scale with fs. For example, PB = 0.4535×fs (@±0.01dB), SB = 0.546×fs. 15. The calculating delay time which occurred by digital filtering. This time is from setting the 16/20/24bit data of both channels to input register to the output of analog signal. (fs = 96kHz) (Ta = 25°C; AVDD, DVDD = 4.75~5.25V; fs = 96kHz; Double Speed Mode; DEM = OFF; SLOW = “ 0” ) Parameter Symbol min (Note 14) PB (Note 14) SB PR SA GD 0 52.5 typ max Units 48.0 43.5 - Digital Filter Passband ±0.01dB -6.0dB Stopband Passband Ripple Stopband Attenuation Group Delay (Note 15) 110 - 43.5 - kHz kHz kHz dB dB 1/fs - ± 0.2 - dB ± 0.0002 Digital Filter + SCF Frequency Response 0 ∼ 40.0kHz (fs = 192kHz) (Ta = 25°C; AVDD, DVDD = 4.75~5.25V; fs = 192kHz; Quad Speed Mode; DEM = OFF; SLOW = “ 0” ) Parameter symbol min typ max Units Digital Filter Passband ±0.01dB (Note 14) PB 0 87.0 kHz -6.0dB 96.0 kHz Stopband Passband Ripple Stopband Attenuation Group Delay (Note 14) SB 105 kHz (Note 15) PR SA GD 110 - 43.5 - dB dB 1/fs - +0/-0.5 - dB ± 0.0002 Digital Filter + SCF Frequency Response 0 ∼ 80.0kHz MS0040-J-00 2000/7 -6- ASAHI KASEI [AK4395] (fs = 44.1kHz) (Ta = 25°C; AVDD, DVDD = 4.75~5.25V; fs = 44.1kHz; Normal Speed Mode; DEM = OFF; SLOW = “1”) Parameter Symbol min (Note 16) PB (Note 16) SB PR SA GD 0 39.2 typ max Units 18.2 8.1 - Digital Filter ±0.04dB -3.0dB Passband Stopband Passband Ripple Stopband Attenuation Group Delay (Note 15) 43.5 - kHz kHz kHz dB dB 1/fs +0/-5 - dB ± 0.005 72 - Digital Filter + SCF Frequency Response 0 ∼ 20.0kHz Note: 16. The passband and stopband frequencies scale with fs. For example, PB = 0.185×fs (@±0.04dB), SB = 0.888×fs. (fs = 96kHz) (Ta = 25°C; AVDD, DVDD = 4.75~5.25V; fs = 96kHz; Double Speed Mode; DEM = OFF; SLOW = “1”) Parameter Symbol min (Note 16) PB (Note 16) SB PR SA GD 0 85.3 typ max Units 39.6 17.7 - Digital Filter ±0.04dB -3.0dB Passband Stopband Passband Ripple Stopband Attenuation Group Delay (Note 15) 72 - 43.5 - kHz kHz kHz dB dB 1/fs - +0/-4 - dB ± 0.005 Digital Filter + SCF Frequency Response 0 ∼ 40.0kHz (fs = 192kHz) (Ta = 25°C; AVDD, DVDD = 4.75~5.25V; fs = 192kHz; Quad Speed Mode; DEM = OFF; SLOW = “1”) Parameter Symbol min PB 0 171 typ max Units 79.1 35.5 - Digital Filter Passband ±0.04dB -3.0dB Stopband Passband Ripple Stopband Attenuation Group Delay (Note 16) (Note 16) (Note 15) SB PR SA GD 72 - 43.5 - kHz kHz kHz dB dB 1/fs - +0/-5 - dB ± 0.005 Digital Filter + SCF Frequency Response 0 ∼ 80.0kHz MS0040-J-00 2000/7 -7- ASAHI KASEI [AK4395] DC (Ta = 25°C; AVDD, DVDD = 4.75~5.25V) Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage (Iout = -100µA) Low-Level Output Voltage (Iout = 100µA) Input Leakage Current (Note 17) Note: 17. DFS0/CAD0, CKS1/CAD1, P/S Symbol VIH VIL VOH VOL Iin min 2.2 DVDD-0.5 - typ - max 0.8 0.5 ± 10 Units V V V V µA typ.100k max Units (Ta = 25°C; AVDD, DVDD = 4.75~5.25V; CL = 20pF) Parameter Master Clock Timing Frequency Duty Cycle LRCK Frequency Normal Speed Mode Double Speed Mode Quad Speed Mode Duty Cycle Serial Interface Timing BICK Period Normal Speed Mode Double Speed Mode Quad Speed Mode BICK Pulse Width Low Pulse Width High BICK “ ↑” to LRCK Edge LRCK Edge to BICK “ ↑” SDATA Hold Time SDATA Setup Time Control Interface Timing CCLK Period CCLK Pulse Width Low Pulse Width High CDTI Setup Time CDTI Hold Time CSN High Time CSN “ ↓” to CCLK “ ↑” CCLK “ ↑” to CSN “ ↑” Reset Timing PDN Pulse Width Notes: 18. 19. 20. CKS2-0 LRCK PDN DFS1-0 min typ fCLK dCLK 7.7 40 41.472 60 MHz % fsn fsd fsq Duty 30 60 120 45 54 108 216 55 kHz kHz kHz % tBCK tBCK tBCK tBCKL tBCKH tBLR tLRB tSDH tSDS 1/128fs 1/64fs 1/64fs 30 30 20 20 20 20 ns ns ns ns ns ns ns ns ns tCCK tCCKL tCCKH tCDS tCDH tCSW tCSS tCSH 200 80 80 50 50 150 50 50 ns ns ns ns ns ns ns ns tPD 150 ns (Note 18) (Note 19) (Note 19) (Note 20) ,2 Symbol ,4 “ L” PDN BICK “ ↑” “ H” PDN MS0040-J-00 RSTN RSTN 2000/7 -8- ASAHI KASEI [AK4395] n 1/fCLK VIH MCLK VIL tCLKH tCLKL dCLK=tCLKH x fCLK, tCLKL x fCLK 1/fs VIH LRCK VIL tBCK VIH BICK VIL tBCKH tBCKL Clock Timing VIH LRCK VIL tBLR tLRB VIH BICK VIL tSDS tSDH VIH SDATA VIL Audio Interface Timing MS0040-J-00 2000/7 -9- ASAHI KASEI [AK4395] VIH CSN VIL tCSS tCCKL tCCKH VIH CCLK VIL tCDS CDTI C1 tCDH C0 R/W VIH A4 VIL WRITE Command Input Timing tCSW VIH CSN VIL tCSH VIH CCLK CDTI VIL D3 D2 D1 D0 VIH VIL WRITE Data Input Timing tPD PDN VIL Power-down Timing MS0040-J-00 2000/7 - 10 - ASAHI KASEI [AK4395] n MCLK, LRCK, BICK (MCLK) MCLK ∆Σ MCLK (Manual Setting Mode) Setting Mode (ACKS = “ 0” : Register 00H) MCLK CKS0/1/2 MCLK (Table 6) CKS0/1/2 (PDN= “ H” ) (Auto Setting Mode) Manual (Table 1) (Table 2) Auto Setting Mode (ACKS = “ 1” : Default) DFS0/1 CKS2, DFS1 = “ 0” DFS0/1 (MCLK, BICK, LRCK) “ 0” ) (PDN = “ ↑” ) ON (PDN= “ L” ) MCLK, LRCK (RSTN = DFS1 DFS0 Sampling Rate (fs) 0 0 Normal Speed Mode 30kHz~54kHz 0 1 Double Speed Mode 60kHz~108kHz 1 0 Quad Speed Mode 120kHz~216kHz Table 1. Default (Manual Setting Mode) Mode CKS2 CKS1 CKS0 Normal Double Quad 0 1 2 0 0 0 0 0 1 0 1 0 256fs 256fs 384fs 128fs 256fs 192fs N/A N/A N/A 3 0 1 1 384fs 384fs N/A 4 5 6 7 1 1 1 1 0 0 1 1 0 1 0 1 512fs 512fs 768fs 768fs 256fs N/A 384fs N/A 128fs N/A 192fs N/A Table 2. Note: Quad Speed Mode LRCK fs 32.0kHz 44.1kHz 48.0kHz (LRCK) 256fs 8.1920MHz 11.2896MHz 12.2880MHz Table 3. (Manual Setting Mode) 128fs MCLK 384fs 512fs 12.288MHz 16.3840MHz 16.9344MHz 22.5792MHz 18.4320MHz 24.5760MHz 768fs 24.576MHz 33.8688MHz 36.8640MHz Default 192fs BICK 64fs 2.0480MHz 2.8224MHz 3.0720MHz (Normal Speed Mode @Manual Setting Mode) MS0040-J-00 2000/7 - 11 - ASAHI KASEI [AK4395] LRCK fs 88.2kHz 96.0kHz MCLK 128fs 11.2896MHz 12.2880MHz 192fs 16.9344MHz 18.4320MHz Table 4. 256fs 22.5792MHz 24.5760MHz (Double Speed Mode @Manual Setting Mode) LRCK fs 176.4kHz 192.0kHz MCLK 128fs 192fs 22.5792MHz 33.8688MHz 24.5760MHz 36.8640MHz Table 5. Table 6. 128fs 22.5792 24.5760 BICK 64fs 11.2896MHz 12.2880MHz (Quad Speed Mode @Manual Setting Mode) MCLK 512fs 768fs 256fs 384fs 128fs 192fs LRCK fs 32.0kHz 44.1kHz 48.0kHz 88.2kHz 96.0kHz 176.4kHz 192.0kHz 384fs 33.8688MHz 36.8640MHz BICK 64fs 5.6448MHz 6.1440MHz Sampling Speed Normal Double Quad (Auto Setting Mode) MCLK (MHz) 256fs 384fs 22.5792 33.8688 24.5760 36.8640 - 192fs 33.8688 36.8640 Table 7. 512fs 16.3840 22.5792 24.5760 - 768fs 24.5760 33.8688 36.8640 - Sampling Speed Normal Double Quad (Auto Setting Mode) n 8) DIF0, DIF1 BICK LSB “ 0” Mode 0 1 2 3 4 BICK DIF2 DIF2 0 0 0 0 1 LRCK SDATA MSB Mode 2 20 DIF1 0 0 1 1 0 DIF0 0 1 0 1 0 Mode 0: 16bit LSB Justified 1: 20bit LSB Justified 2: 24bit MSB Justified 3: I2S Compatible 4: 24bit LSB Justified 5 (Table 2’ s ,16 BICK ≥32fs ≥40fs ≥48fs ≥48fs ≥48fs Figure Figure 1 Figure 2 Figure 3 Figure 4 Figure 2 Table 8. MS0040-J-00 2000/7 - 12 - ASAHI KASEI [AK4395] LRCK 0 1 10 11 12 13 14 15 0 1 10 11 12 13 14 15 0 1 BICK (32fs) SDATA Mode 0 15 0 14 6 1 5 14 4 15 3 16 2 1 17 0 31 15 14 0 6 1 5 14 4 15 3 16 2 1 17 0 31 15 14 0 1 0 1 0 1 BICK (64fs) SDATA Mode 0 Don’t care 15 14 15 14 Don’t care 0 0 15:MSB, 0:LSB Lch Data Rch Data Figure 1. Mode 0 Timing LRCK 0 1 8 9 10 11 12 31 0 1 8 9 10 11 12 31 BICK (64fs) SDATA Mode 1 Don’t care 19 0 Don’t care 20 19 0 Don’t care 19 0 20 19 0 19:MSB, 0:LSB SDATA Mode 4 Don’t care 23 22 21 23 22 21 23:MSB, 0:LSB Lch Data Rch Data Figure 2. Mode 1,4 Timing LRCK 0 1 2 22 23 24 30 31 0 1 2 22 23 24 30 31 BICK (64fs) SDATA 23 22 1 0 Don’t care 23 22 1 0 Don’t care 23 22 23:MSB, 0:LSB Lch Data Rch Data Figure 3. Mode 2 Timing MS0040-J-00 2000/7 - 13 - ASAHI KASEI [AK4395] LRCK 0 1 2 3 23 24 25 31 0 1 2 3 23 24 25 31 0 1 BICK (64fs) SDATA 1 23 22 0 Don’t care 23 22 1 0 Don’t care 23 23:MSB, 0:LSB Lch Data Rch Data Figure 4. Mode 3 Timing n IIR 3 2 (32kHz, 44.1kHz, 48kHz) (50/15µs , ) OFF DEM1 DEM0 Mode 0 0 1 1 0 1 0 1 44.1kHz OFF 48kHz 32kHz Table 9. Default (Normal Speed Mode) n AK4395 MUTE 0.5dB DAC 256 ATT 0dB MS0040-J-00 -127dB 2000/7 - 14 - ASAHI KASEI [AK4395] n AK4395 8192 DZF DZF RSTN 4~5LRCK “ 0” DZF 8192 “ H” “ L” “ 1” “ L” RSTN “ 0” DZFM DZF “ H” “ L” DZF “ 0” “ 0” DZF “ H” “ 0” “ 1” DZFE DZF DZFB n 1024LRCK -∞ SMUTE “ H” SMUTE “ L” 1024LRCK -∞ (“ 0” ) -∞ 1024LRCK 0dB 0dB SMUTE 1024/fs 0dB 1024/fs (1) (3) Attenuation -∞ GD (2) GD AOUT (4) 8192/fs DZF (1) 1024LRCK (2) (3) 1024LRCK 0dB (4) (1024/fs) -∞ (“ 0” ) (GD) 8192 “ 0” “ 0” DZF “ H” DZF “ H” Figure 5. MS0040-J-00 2000/7 - 15 - ASAHI KASEI [AK4395] n ON MCLK PDN LRCK “ L” “ ↑” LRCK n PDN Figure 6 “ L” (Hi-Z) PDN Internal State Normal Operation Power-down D/A In (Digital) Normal Operation “0” data GD (1) D/A Out (Analog) GD (3) (2) (3) (1) (4) Clock In Don’t care MCLK, LRCK, BICK DZFL/DZFR External MUTE (1) (2) (3) PDN (6) (5) Mute ON (GD) Hi-Z (“ ↓ ↑” ) (4) (5) (PDN = “ L” ) (3) (6) (PDN= “ L” ) “ 0” (MCLK, BICK, LRCK) DZF “ L” Figure 6. MS0040-J-00 2000/7 - 16 - ASAHI KASEI [AK4395] n RSTN “ 0” AK4395 VCOM DZFL/DZFR “ H” Figure 7 RSTN RSTN bit 3~4/fs (6) 2~3/fs (6) Internal RSTN bit Internal State Normal Operation Normal Operation Digital Block Power-down D/A In (Digital) “0” data (1) GD GD (3) D/A Out (Analog) (2) (3) (1) (4) Clock In Don’t care MCLK,LRCK,BICK 2/fs(5) DZFL/DZFR (1) (2) RSTN = “ 0” (3) RSTN (4) (5) DZF “ L” (6) RSTN (GD) VCOM (“ ↓ ↑” ) (RSTN = “ 0” ) RSTN “ 0” (MCLK, BICK, LRCK) “ H” RSTN RSTN 2/fs 3 ~4/fs 2 ~ 3/fs Figure 7. MS0040-J-00 2000/7 - 17 - ASAHI KASEI [AK4395] n AK4395 DIF0-2 OR P/S “ L” I/F : CSN, CCLK, CDTI I/F Chip address (2bit, CAD0/1), Read/Write (1bit, “ 1” , Write only), Register address (MSB first, 5bit) Control data (MSB first, 8bit) CCLK “ ↓” “ ↑” CSN “ ↑” CCLK 5MHz (max) CSN CCLK ” H” Function Parallel mode Serial mode Auto Setting Mode Manual Setting Mode De-emphasis SMUTE Zero Detection Slow roll-off response Digital Attenuator O O (Partially) O O X X X O O O O O O O Table 10. PDN (O: , X: “ L” ) P/S PDN RSTN “ L” “ L” CSN 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CCLK CDTI C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 C1-C0: R/W: A4-A0: D7-D0: Chip Address (C1=CAD1, C0=CAD0) READ/WRITE (Fixed to “ 1” , Write only) Register Address Control Data Figure 8. Control I/F Timing *PDN = “ L” * Contorol 1 RSTN = “ 0” RSTN = “ 1” Contorol 2 (D7-D1) (D7-D1) Control 1 DEM0, DEM1, SMUTE RSTN MS0040-J-00 2000/7 - 18 - ASAHI KASEI [AK4395] n Addr 00H 01H 02H 03H 04H Register Name Control 1 Control 2 Output Gain AOUTL ATT Control AOUTR ATT Control D7 D6 D5 D4 D3 D2 D1 D0 ACKS DZFE GA1 ATT7 ATT7 CKS2 DZFM GA0 ATT6 ATT6 CKS1 SLOW 0 ATT5 ATT5 CKS0 DFS1 0 ATT4 ATT4 DIF2 DFS0 0 ATT3 ATT3 DIF1 DEM1 DZFB ATT2 ATT2 DIF0 DEM0 0 ATT1 ATT1 RSTN SMUTE 0 ATT0 ATT0 Notes: For address from 05H to 1FH, data must not be written. When PDN pin goes “ L” , the registers are initialized to their default values. When RSTN bit goes “ 0” , the only internal timing is reset and the registers are not initialized to their default values. DIF0-2 bits are ORed with pins respectively. n Addr 00H Register Name Control 1 default D7 D6 D5 D4 D3 D2 D1 D0 ACKS CKS2 CKS1 CKS0 DIF2 DIF1 DIF0 RSTN 1 0 0 0 0 0 0 1 RSTN: Internal timing reset 0: Reset. All registers are not initialized. 1: Normal Operation When the states of CKS2-0 or DFS1-0 change, the AK4395 should be reset by PDN pin or RSTN bit. DIF2-0: Audio data interface modes (see Table 8) Initial: “ 000” , Mode 0 Register bits are ORed with DIF2-0 pins if P/S = “ L” . CKS2-0: Master Clock Frequency Select (see Table 2) Initial: “ 000” , Mode 0 ACKS: Master Clock Frequency Auto Setting Mode Enable 0: Disable, Manual Setting Mode 1: Enable, Auto Setting Mode Master clock frequency is detected automatically at ACKS bit “ 1” . In this case, the setting of CKS2-0 and DFS1-0 are ignored. When this bit is “ 0” , CKS2-0 and DFS1-0 set the master clock frequency. Addr 01H Register Name Control 2 default D7 D6 D5 D4 D3 D2 D1 D0 DZFE DZFM SLOW DFS1 DFS0 DEM1 DEM0 SMUTE 0 0 0 0 0 0 1 0 SMUTE: Soft Mute Enable 0: Normal operation 1: DAC outputs soft-muted DEM1-0: De-emphasis response (see Table 9) Initial: “ 01” , OFF DFS1-0: Sampling Speed Control 00: Normal Speed Mode 01: Double Speed Mode 10: Quad Speed Mode MS0040-J-00 2000/7 - 19 - ASAHI KASEI [AK4395] SLOW: Slow Roll-off Filter Enable 0: Sharp Roll-off Filter 1: Slow Roll-off Filter DZFE: Data Zero Detect Enable 0: Disable 1: Enable Zero detect function can be disabled by DZFE bit “ 0” . In this case, the DZF pins of both channels are always “ L” . DZFM: Data Zero Detect Mode 0: Channel Separated Mode 1: Channel ANDed Mode If the DZFM bit is set to “ 1” , the DZF pins of both channels go to “ H” only when the input data at all channels are continuously zeros for 8192 LRCK cycles. Addr 02H Register Name Output Gain D7 D6 D5 D4 D3 D2 D1 D0 GA1 GA0 0 0 0 DZFB CHS MONO DZFB: Inverting Enable of DZF 0: DZF goes “ H” at Zero Detection 1: DZF goes “ L” at Zero Detection GA1-0: Output Gain Control 00: -1.16dB 01: -2.18dB 10: +1.34dB 11: 0dB Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 03H AOUTL ATT Control ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 04H AOUTR ATT Control ATT7 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0 1 1 1 1 1 1 1 1 default ATT7-0: Attenuation Level 256 levels, 0.5dB step Data FFH FEH FDH : : 02H 01H 00H Attenuation 0dB -0.5dB -1.0dB : : -126.5dB -127.0dB MUTE (-∞) The transition between set values is soft transition of 7425 levels. It takes 7424/fs (168ms@fs=44.1kHz) from FFH (0dB) to 00H (MUTE). If PDN pin goes to “ L” , the ATTs are initialized to FFH. The ATTs are FFH when RSTN = “ 0” . When RSTN return to “ 1” , the ATTs fade to their current value. This digital attenuator is independent of soft mute function. MS0040-J-00 2000/7 - 20 - ASAHI KASEI [AK4395] Figure 9 Figure 10 (AKD4395) Figure 12 Figure 13 Digital Supply 5V 10u 0.1u + 1 DVSS DZFR 28 2 DVDD CAD1 27 Master Clock 3 MCLK DZFL 26 Reset & Power down 4 PDN P/S 25 64fs 5 BICK VCOM 24 24bit Audio Data 6 SDATA AOUTL+ 23 7 LRCK AOUTL- 22 8 CSN AOUTR+ 21 Micro- 9 CAD0 AOUTR- 20 controller 10 CCLK AVSS 11 CDTI AVDD 12 DIF0 VREFH 13 DIF1 VREFL 14 DIF2 BVSS fs Digital Ground AK4395 10u + 0.1u Lch MUTE LPF Lch MUTE Mute Lch Out MUT Rch MUTE LPF Rch MUTE Mute Rch Out MUT 19 0.1u 18 10u + 17 0.1u 16 + 10u Analog Supply 5V 15 Analog Ground Figure 9. (Serial Mode, Chip Address = “ 00” ) Notes: - LRCK = fs, BICK=64fs. - AVDD, DVDD - AVSS, BVSS, DVSS - AOUT - MS0040-J-00 2000/7 - 21 - ASAHI KASEI [AK4395] Digital Supply 5V 10u 0.1u 1 DVSS ACKS 28 2 DVDD CKS1 27 Master Clock 3 MCLK CKS0 26 Reset & Power down 4 PDN P/S 25 64fs 5 BICK VCOM 24 24bit Audio Data 6 SDATA AOUTL+ 23 7 LRCK AOUTL- 22 8 SMUTE AOUTR+ 21 9 DFS0 AOUTR- 20 10 DEM0 AVSS 11 DEM1 AVDD 12 DIF0 VREFH 13 DIF1 VREFL 14 DIF2 BVSS + fs Mode setting Digital Ground AK4395 Master Clock Select 10u + 0.1u Lch MUTE LPF Lch Out Rch MUTE LPF Rch Out 19 0.1u 18 + 10u 17 0.1u 16 + 10u Analog Supply 5V 15 Analog Ground Figure 10. (parallel mode) Notes: - LRCK = fs, BICK=64fs. - AVDD, DVDD - AVSS, BVSS, DVSS - AOUT - Digital Ground Analog Ground System Controller 1 DVSS DZFR 28 2 DVDD CAD1 27 3 MCLK DZFL 26 4 PDN P/S 25 5 BICK VCOM 24 6 SDATA AOUTL+ 23 7 LRCK AOUTL- 22 8 CSN AOUTR+ 21 9 CAD0 AOUTR- 20 10 CCLK AVSS 19 11 CDTI AVDD 18 12 DIF0 VREFH 17 13 DIF1 VREFL 16 14 DIF2 BVSS 15 AK4395 Figure 11. Ground Layout MS0040-J-00 2000/7 - 22 - ASAHI KASEI [AK4395] 1. AK4395 AVDD BVSS AVSS AVDD DVDD AVDD DVDD DVDD AVSS ,BVSS ,DVSS AVDD DVDD AK4395 2. VREFH VREFH VREFL AVDD VREFL VCOM 10µF AVSS VREFH VREFL 0.1µF 0.1µF AVSS VCOM AK4395 VREFH/VREFL 3. AOUT+ AOUT4.8Vpp(typ@VREF=5V) 2’ s 800000H(@24bit) 2.6V 2.4Vpp(typ@VREF=5V) VAOUT = (AOUT+)-(AOUT-) (2 ) 7FFFFFH(@24bit) 000000H(@24bit) VAOUT 0V ∆Σ SCF Figure 12 LPF LPF Figure 13 S/N 2dB AK4395 AOUT- 1k 1k 1k 1n +Vop 2.2n AOUT+ 1k 1k Figure 12. Analog Out 1k LPF MS0040-J-00 1n -Vop 1 2000/7 - 23 - ASAHI KASEI [AK4395] +15 + 6.8n 300 620 AOUTL- + 300 7 3 2 + * 4 6.8n -15 10u 0.1u 6 NJM5534D + 10u 0.1u 330 200 3 2 620 2 - 4 3 + 7 3 + 2 - 620 AOUTL+ + 300 300 6.8n 10u Lch 0.1u 7 6 4 NJM5534D + 0.1u 10u + 10u 0.1u 330 200 100 6 2.2n NJM5534D 470 + 100 620 6.8n +10u 2.2n 1 47u 0.1u 470 100 47u Figure 13. LPF MS0040-J-00 2 2000/7 - 24 - ASAHI KASEI [AK4395] 28pin VSOP (Unit: mm) *9.8±0.2 1.25±0.2 0.675 28 A 7.6±0.2 *5.6±0.2 15 14 1 +0.1 0.15-0.05 0.65 0.22±0.1 0.1±0.1 0.5±0.2 Detail A Seating Plane 0.10 NOTE: Dimension "*" does not include mold flash. 0-10° n Material & Lead finish Package molding compound: Lead frame material: Lead frame surface treatment: Epoxy Cu Solder plate MS0040-J-00 2000/7 - 25 - ASAHI KASEI [AK4395] AKM AK4395VF XXXBYYYYC XXXXBYYYYC data code identifier XXXB: YYYYC: Lot number (X : Digit number, B : Alpha character ) Assembly date (Y : Digit number, C : Alpha character) • • • • • • MS0040-J-00 2000/7 - 26 -