ASAHI KASEI [AK93C85A] AK93C85A 16Kbit Serial CMOS EEPROM Features ADVANCED CMOS EEPROM TECHNOLOGY READ/WRITE NON-VOLATILE MEMORY WIDE VCC OPERATION : VCC = 1.8V to 5.5V 16384 bits, 1024 x 16 organization SERIAL INTERFACE - Interfaces with popular microcontrollers and standard microprocessors LOW POWER CONSUMPTION - 0.4mA Max. Read Operation - 0.8A Max. Standby High Reliability - Endurance : 100K cycles - Data Retention : 10 years Automatic address increment (READ) Automatic write cycle time-out with auto-ERASE (Max. 8ms: VCC=4.5V to 5.5V) Busy/Ready status signal Software controlled write protection IDEAL FOR LOW DENSITY DATA STORAGE - Low cost, space saving, 8-pin package (SSOP) DO DATA REGISTER DI INSTRUCTION REGISTER INSTRUCTION DECODE, CONTROL AND CLOCK GENERATION 16 ADD. BUFFERS R/W AMPS AND AUTO ERASE DECODER 16 EEPROM 16384bit 1024 ×16 CS VPP SW SK VREF VPP GENERATOR Block Diagram DAM02E-04 2012/09 - 1 - ASAHI KASEI [AK93C85A] General Description The AK93C85A is a 16384-bit serial CMOS EEPROM divided into 1024 registers of 16 bits each. The AK93C85A has 4 instructions such as READ, WRITE, EWEN and EWDS. Those instructions control the AK93C85A. The AK93C85A can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation. A serial interface of AK93C85A, consisting of chip select (CS), serial clock (SK), data-in (DI) and data-out (DO), can easily be controlled by popular microcontrollers or standard microprocessors. AK93C85A takes in the write data from data input pin (DI) to a register synchronously with rising edge of input pulse of serial clock pin (SK). And at read operation, AK93C85A takes out the read data from a register to data output pin (DO) synchronously with rising edge of SK. The DO pin is usually in high impedance state. The DO pin outputs "L" or "H" in case of data output or Busy/Ready signal output. Software controlled write protection When VCC is applied to the part, the part automatically powers up in the ERASE/WRITE Disable state. In the ERASE/WRITE disable state, execution of WRITE instruction is disabled. Before WRITE instruction is executed, EWEN instruction must be executed. The ERASE/WRITE enable state continues until EWDS instruction is executed or VCC is removed from the part. Execution of a read instruction is independent of both EWEN and EWDS instructions. Busy/Ready status signal After a write instruction, the DO output serves as a Busy/Ready status indicator. After the falling edge of the CS initiates the self-timed programming cycle, the DO indicates the Busy/Ready status of the chip if the CS is brought high after a minimum of 250ns (tCS). DO=logical "0" indicates that programming is still in progress. DO=logical "1" indicates that the register at the address specified in the instruction has been written with the new data pattern contained in the instruction and the part is ready for a next instruction. The Busy/Ready status indicator is only valid when CS is active (high). When CS is low, the DO output goes into a high impedance state. The Busy/Ready signal outputs until a start bit (Logic"1") of the next instruction is given to the part. Type of Products Model AK93C85AM Memory size 16K bits Temp. Range -40°C to +85°C DAM02E-04 VCC 1.8V to 5.5V Package 8pin Plastic SSOP 2012/09 - 2 - ASAHI KASEI [AK93C85A] Pin Arrangement AK93C85AM CS SK DI DO 1 2 3 4 8 7 6 5 VCC NC NC GND 8pin SSOP Pin Name Function CS Chip Select SK Serial Data Clock DI Serial Data Input DO Serial Data Output GND Ground VCC Power Supply NC Not Connected *1 *1: Please Open NC pin. DAM02E-04 2012/09 - 3 - ASAHI KASEI [AK93C85A] Functional Description The AK93C85A has 4 instructions such as READ, WRITE, EWEN and EWDS. A valid instruction consists of a Start Bit (Logic"01"), the appropriate Op Code and the desired memory Address location. The CS pin must be brought low for a minimum of 250ns (tCS) between each instruction when the instruction is continuously executed. Instruction READ WRITE EWEN EWDS WRAL Start Op Bit Code 01 10 01 01 01 00 01 00 01 00 Address A9-A0 A9-A0 11XXXXXXXX 00XXXXXXXX 01XXXXXXXX Data Comments D15-D0 D15-D0 Reads data stored in memory, at specified address. Writes register. Write enable must precede all programming modes. Disables all programming instructions. D15-D0 Writes all registers. X: Don't care (Note) The WRAL instruction are used for factory function test only. User can't use the WRAL instruction. The AK93C85A perceives the start bit in the logic"01" and also "001". WRITE The write instruction is followed by 16 bits of data to be written into the specified address. After the last bit of data is put on the DI pin, the CS pin must be brought low before the next rising edge of the SK clock. This falling edge of the CS initiates the self-timed programming cycle. The DO indicates the Busy/Ready status of the chip if the CS is brought high after a minimum of 250ns (tCS). DO=logical "0" indicates that programming is still in progress. DO=logical "1" indicates that the register at the address specified in the instruction has been written with the new data pattern contained in the instruction and the part is ready for a next instruction. CS SK DI 0 0 1 1 Start Bit DO 2 0 3 1 4 A9 5 A8 12 A1 13 A0 14 D15 15 D14 27 D2 28 D1 29 tCS D0 Op code Busy Hi-Z Ready AK93C85A output a logic "1" (Ready status), if previous instruction is WRITE. tE/W WRITE DAM02E-04 2012/09 - 4 - ASAHI KASEI [AK93C85A] READ The read instruction is the only instruction which outputs serial data on the DO pin. Following the Start bit, first Op code and address are decoded, then the data from the selected memory location is available at the DO pin. A dummy bit (logical "0") precedes the 16-bit data from the selected memory location. The output data changes are synchronized with the rising edges of the serial clock (SK). The data in the next address can be read sequentially by continuing to provide clock. The address automatically cycles to the next higher address after the 16bit data shifted out. When the highest address is reached ($3FF), the address counter rolls over to address $000 allowing the read cycle to be continued indefinitely. CS SK DI 0 1 0 2 1 3 1 Start bit 4 0 5 A9 12 A8 13 A1 14 15 29 30 44 45 A0 Op code Hi-Z DO 0 D15 D14 D0 Dummy address[A9–A0] Bit AK93C85A output a logic "1" (Ready status), if previous instruction is WRITE. D15 D1 D0 address[A9–A0]+1 READ EWEN / EWDS When VCC is applied to the part, the part automatically powers up in the ERASE/WRITE Disable state. In the ERASE/WRITE disable state, execution of WRITE instruction is disable. Before WRITE instruction is executed, EWEN instruction must be executed. The ERASE/WRITE enable state continues until EWDS instruction is executed or VCC is removed from the part. Execution of a read instruction is independent of both EWEN and EWDS instructions. CS SK DI 0 0 1 1 Start bit DO 2 0 3 4 5 0 6 X 7 X 8 X 9 X 10 X 11 X 12 X 13 X EWEN=11 EWDS=00 Hi-Z AK93C85A output a logic "1" (Ready status), if previous instruction is WRITE. X: Don't care EWEN / EWDS DAM02E-04 2012/09 - 5 - ASAHI KASEI [AK93C85A] Absolute Maximum Ratings Parameter Power Supply All Input Voltages with Respect to Ground Ambient storage temperature Symbol VCC VIO Min -0.6 -0.6 Max +7.0 VCC+0.6 Unit V V Tst -65 +150 C Stress above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum conditions for extended periods may affect device reliability. Recommended Operating Condition Parameter Power Supply Ambient Operating Temperature Symbol VCC Ta DAM02E-04 Min 1.8 -40 Max 5.5 +85 Unit V °C 2012/09 - 6 - ASAHI KASEI [AK93C85A] Electrical Characteristics (1) D.C. ELECTRICAL CHARACTERISTICS ( 1.8V VCC 5.5V, -40°C Ta 85°C, unless otherwise specified ) Parameter VCC=5.5V, tSKP=1.0s, *1 Max. 5.5 Unit mA ICC2 VCC=1.8V, tSKP=4.0s, *1 3.0 mA Current Dissipation ICC3 VCC=5.5V, tSKP=1.0s, *1 0.4 mA (READ, EWEN, EWDS) ICC4 VCC=1.8V, tSKP=4.0s, *1 0.1 mA Current Dissipation (Standby) ICCSB VCC=5.5V 0.8 A Input High Voltage VIH VCC + 0.5 V Input Low Voltage VIL 0.2 x VCC V Output High Voltage VOH1 2.5V VCC 5.5V IOH=-0.1mA 0.8 x VCC V VOH2 1.8V VCC 2.5V IOH=-0.1mA 0.8 x VCC V VOL1 2.5V VCC 5.5V IOL=1.0mA 0.4 V VOL2 1.8V VCC 2.5V IOL=0.1mA 0.4 V Input Leakage ILI VCC=5.5V, VIN=5.5V 1.0 A Output Leakage ILO VCC=5.5V, VOUT=5.5V, CS=GND 1.0 A Current Dissipation (WRITE) Output Low Voltage Symbol ICC1 Condition Min. *2 0.8 x VCC -0.1 *1 : VIN=VIH/VIL, DO=Open *2 : VIN=VCC/GND, CS=GND, DO=Open DAM02E-04 2012/09 - 7 - ASAHI KASEI [AK93C85A] (2) A.C. ELECTRICAL CHARACTERISTICS ( 1.8V VCC 5.5V, -40°C Ta 85°C, unless otherwise specified ) Parameter SK Cycle Time SK Pulse Width Symbol tSKP1 Condition 4.5V VCC 5.5V Min. 1.0 Max. Unit tSKP2 2.0V VCC 4.5V 2.0 s tSKP3 1.8V VCC 2.0V 4.0 s tSKW1 4.5V VCC 5.5V 500 ns tSKW2 2.0V VCC 4.5V 1.0 s tSKW3 1.8V VCC 2.0V 2.0 s s CS Setup Time tCSS 100 ns CS Hold Time tCSH 0 ns Data Setup Time tDIS 200 ns Data Hold Time tDIH 200 ns tPD1 4.5V VCC 5.5V 500 ns tPD2 2.0V VCC 4.5V 1.0 s tPD3 1.8V VCC 2.0V 2.0 s Selftimed Programming Time tE/W1 4.5V VCC 5.5V 8 ms tE/W2 1.8V VCC 4.5V 10 ms Min CS Low Time tCS CS to Status Valid1 tSV CL=100pF 500 ns CS to Output High-Z tOZ1 2.0V VCC 5.5V 100 ns tOZ2 1.8V VCC 2.0V 250 ns Output delay *3 250 ns *3 : CL=100pF DAM02E-04 2012/09 - 8 - ASAHI KASEI [AK93C85A] Synchronous Data timing tCS CS tCSS tSKW tSKW tSKP SK tDIS DI 0 tDIH 1 tSV Hi-Z DO AK93C85A output a logical "1" (Ready status), if previous instruction is WRITE. The Start of Instruction CS tCSH SK DI tPD DO D3 tPD D2 tPD D1 tOZ D0 Hi-Z The End of Instruction DAM02E-04 2012/09 - 9 - ASAHI KASEI [AK93C85A] tCS CS tCSH SK tDIS DI tDIH D1 D0 tSV DO Hi-Z Busy Ready tE/W Busy/Ready Signal Output DAM02E-04 2012/09 - 10 - IMPORTANT NOTICE • These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. • Descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. • Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. • AKM products are neither intended nor authorized for use as critical components Note1) in any safety, life support, or other hazard related device or system Note2) , and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. • It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.