[AK5358B] AK5358B 96kHz 24-Bit ΔΣ ADC AK5358B A/D 8kHz ∼ 96kHz ΔΣ AK5358B AK5358B I2S) ( TV DVD AV DC HPF S/(N+D): 92dB DR: 102dB S/N: 102dB : 8kHz ∼ 96kHz : 256fs/384fs/512fs/768fs (8kHz ∼ 48kHz) 256fs/384fs (48kHz ∼ 96kHz) : TTL/CMOS / : 24bit /I2S : 4.5 ∼ 5.5V ( ), 2.7 ∼ 5.5V ( Ta = −20 ∼ 85°C : 16pin TSSOP AK5357/59/81/58A VA VSS1 VD VSS2 ) MCLK Clock Divider AINL AINR VCOM ΔΣ Modulator Decimation Filter ΔΣ Modulator Decimation Filter LRCK SCLK Serial I/O Interface Voltage Reference CKS2 CKS1 CKS0 PDN MS1155-J-00 SDTO DIF 2010/02 -1- [AK5358B] ■ −20 ∼ +85°C AK5358B AK5358BET AKD5358B 16pin TSSOP (0.65mm pitch) ■ AINR 1 16 CKS0 AINL 2 15 CKS2 CKS1 3 14 DIF VCOM 4 13 PDN VSS1 5 12 SCLK VA 6 11 MCLK VD 7 10 LRCK VSS2 8 9 SDTO Top View ■ AK5357/59/81 fs S/(N+D) DR VIH@TTL Level Mode VA (Analog Supply) VD (Digital Supply) HPF Disable Operating Temperature MCLK, LRCK, BICK Clock Stop AK5357 4kHz to 96kHz 88dB 102dB AK5358B 8kHz to 96kHz 92dB 102dB AK5358A 8kHz to 96kHz 92dB 102dB AK5381 4kHz to 96kHz 96dB 106dB AK5359 8kHz to 216kHz 94dB 102dB 2.2V 2.2V 2.2V 2.4V Not Available 2.7 to 5.5V 4.5 to 5.5V 4.5 to 5.5V 4.5 to 5.5V 2.7 to 5.5V 2.7 to 5.5V 2.7 to 5.5V 4.5 to 5.5V 2.7 to 5.5V 3.0 to 5.5V @96kHz 3.0 to 5.5V Available Not Available Not Available Available Available ET: −20 ∼ +85°C ET: −20 ∼ +85°C ET: −20 ∼ +85°C ET: −20 ∼ +85°C ET: −20 ∼ +85°C VT: −40 ∼ +85°C VT: −40 ∼ +85°C VT: −40 ∼ +85°C XT: −40 ∼ +85°C Not Available Available Not Available MS1155-J-00 Not Available Not Available 2010/02 -2- [AK5358B] No. Pin Name I/O 1 2 3 AINR AINL CKS1 I I I 4 VCOM O 5 6 7 8 VSS1 VA VD VSS2 - 9 SDTO O 10 LRCK I/O 11 MCLK I 12 SCLK I/O 13 PDN I 14 DIF I 15 16 CKS2 CKS0 I I Note: Function Rch Analog Input Pin Lch Analog Input Pin Mode Select 1 Pin Common Voltage Output Pin, VA/2 Bias voltage of ADC input. Ground Pin Analog Power Supply Pin, 4.5 ∼ 5.5V Digital Power Supply Pin, 2.7 ∼ 5.5V Ground Pin Audio Serial Data Output Pin “L” Output at Power-down mode. Output Channel Clock Pin “L” Output in Master Mode at Power-down mode. Master Clock Input Pin Audio Serial Data Clock Pin “L” Output in Master Mode at Power-down mode. Power Down Mode & Reset Pin “H”: Power up, “L”: Power down & Reset Audio Interface Format Pin “H”: 24bit I2S Compatible, “L”: 24bit MSB justified Mode Select 2 Pin Mode Select 0 Pin (AINR, AINL) ■ Analog AINL AINR MS1155-J-00 2010/02 -3- [AK5358B] (VSS1=VSS2=0V; Note 1) Parameter Power Supplies: Analog Digital| Input Current, Any Pin Except Supplies Analog Input Voltage (AINL, AINR, CKS1 pins) Digital Input Voltage (Note 2) Ambient Temperature (powered applied) Storage Temperature Note 1. Note 2. PDN, DIF, MCLK, SCLK, LRCK, CKS0, CKS2 pins Symbol VA VD IIN VINA VIND Ta Tstg min −0.3 −0.3 −0.3 −0.3 −20 −65 max 6.0 6.0 ±10 VA+0.3 VD+0.3 85 150 Units V V mA V V °C °C : (AGND=DGND=0V; Note 1) Parameter Power Supplies Analog (Note 3) Digital Note 3. VA VD Symbol VA VD min 4.5 2.7 typ 5.0 5.0 max 5.5 VA Units V V : MS1155-J-00 2010/02 -4- [AK5358B] (Ta=25°C; VA=5.0, VD=5.0V; VSS1=VSS2=0V; fs=48kHz, 96kHz; SCLK=64fs; Signal Frequency=1kHz; 24bit Data; Measurement frequency=20Hz ∼ 20kHz at fs=48kHz, 40Hz ∼ 40kHz at fs=96kHz; unless otherwise specified) Parameter min typ max Units ADC Analog Input Characteristics: Resolution 24 Bits Input Voltage (Note 4) 2.7 3.0 3.3 Vpp S/(N+D) fs=48kHz −1dBFS 82 92 dB BW=20kHz −60dBFS 39 dB −1dBFS 90 dB fs=96kHz BW=40kHz −60dBFS 38 dB DR (−60dBFS, A-weighted) 94 102 dB S/N (A-weighted) 94 102 dB Input Resistance fs=48kHz 13 20 kΩ fs=96kHz 9 14 kΩ Interchannel Isolation 90 110 dB Interchannel Gain Mismatch 0.1 0.5 dB Gain Drift 100 ppm/°C Power Supply Rejection (Note 5) 50 dB Power Supplies Power Supply Current Normal Operation (PDN pin = “H”) VA VD (fs=48kHz) (Note 6) VD (fs=96kHz) (Note 7) Power down mode (PDN pin = “L”) (Note 8) VA+VD Note 4. (0dB) VA Note 5. VA, VD 1kHz, 50mVpp Note 6. VD=2mA@3V Note 7. VD=4mA@3V Note 8. CKS1 pin VD MS1155-J-00 12 3 6 18 5 9 100 10 Vin = 0.6 x VA (Vpp) mA mA mA μA VSS2 2010/02 -5- [AK5358B] (fs=48kHz) (Ta=-20°C ∼ 85°C; VA=4.5 ∼ 5.5V; VD=2.7 ∼ 5.5V) Parameter Symbol ADC Digital Filter (Decimation LPF): Passband (Note 9) ±0.1dB PB −0.2dB −3.0dB Stopband SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ΔGD Group Delay (Note 10) GD ADC Digital Filter (HPF): Frequency Response (Note 9) −3dB FR −0.1dB min typ max Units 0 28 20.0 23.0 18.9 - 0 16 kHz kHz kHz kHz dB dB μs 1/fs 1.0 6.5 Hz Hz ±0.04 68 (fs=96kHz) (Ta=-20°C ∼ 85°C; VA=4.5 ∼ 5.5V; VD=2.7 ∼ 5.5V) Parameter Symbol ADC Digital Filter (Decimation LPF): Passband (Note 9) ±0.1dB PB −0.2dB −3.0dB Stopband SB Passband Ripple PR Stopband Attenuation SA Group Delay Distortion ΔGD Group Delay (Note 10) GD ADC Digital Filter (HPF): Frequency Response (Note 9) −3dB FR −0.1dB Note 9. fs ( Passband 0.39375 × fs Note 10. ADC MS1155-J-00 min typ max Units 0 56 40.0 46.0 37.8 - kHz kHz kHz kHz dB dB μs 1/fs ±0.04 68 0 16 2.0 13.0 ) fs=48kHz Hz Hz ±0.1dB 24 2010/02 -6- [AK5358B] DC (CMOS Level Mode) (Ta=-20°C ∼ 85°C; VA=4.5 ∼ 5.5V; VD=2.7 ∼ 5.5V; CKS2/1/0 = “LLL”, “LHL”, “LHH”, “HHL”, “HHH”) Parameter Symbol min typ max High-Level Input Voltage VIH 70%VD Low-Level Input Voltage VIL 30%VD High-Level Output Voltage (Iout=−1mA) VOH VD−0.5 Low-Level Output Voltage (Iout=1mA) VOL 0.5 Input Leakage Current Iin ±10 Units V V V V μA DC (TTL Level Mode) (Ta=-20°C ∼ 85°C; VA=4.5 ∼ 5.5V; VD=4.5 ∼ 5.5V; CKS2/1/0 = “HLL”) Parameter Symbol min 70%VD VIH High-Level Input Voltage (CKS2-0 pins) 2.2 VIH (All pins except CKS2-0 pins) VIL Low-Level Input Voltage (CKS2-0 pins) VIL (All pins except CKS2-0 pins) High-Level Output Voltage (Iout=−1mA) VOH VD−0.5 Low-Level Output Voltage (Iout=1mA) VOL Input Leakage Current Iin - Units V V V V V V μA MS1155-J-00 typ - max 30%VD 0.8 0.5 ±10 2010/02 -7- [AK5358B] (Ta=-20°C ∼ 85°C; VA=4.5 ∼ 5.5V; VD=2.7 ∼ 5.5V; CL=20pF) Parameter Symbol Master Clock Timing (Note 11) fCLK 512fs, 256fs Frequency dCLK Duty cycle fCLK 768fs, 384fs Frequency dCLK Duty cycle LRCK Frequency Duty Cycle fs Slave mode Master mode typ max Units 2.048 40 3.072 40 24.576 60 36.864 60 MHz % MHz % 8 45 96 55 kHz % % 50 Audio Interface Timing Slave mode SCLK Period SCLK Pulse Width Low Pulse Width High LRCK Edge to SCLK “↑” (Note 12) SCLK “↑” to LRCK Edge (Note 12) LRCK to SDTO (MSB) (Except I2S mode) SCLK “↓” to SDTO Master mode SCLK Frequency SCLK Duty SCLK “↓” to LRCK SCLK “↓” to SDTO fSCK dSCK tMSLR tSSD Reset Timing PDN Pulse Width (Note 13) PDN “↑” to SDTO valid at Slave Mode (Note 14) PDN “↑” to SDTO valid at Master Mode (Note 14) tPD tPDV tPDV Note 11. MCLK L 13us Note 12. LRCK Note 13. AK5358B PDN pin = “L” Note 14. PDN pin min SCLK LRCK tSCK tSCKL tSCKH tLRSH tSHLR tLRS tSSD 35 35 ns ns ns ns ns ns ns 20 35 Hz % ns ns 160 65 65 30 30 64fs 50 −20 −20 150 4132 4129 ns 1/fs 1/fs “↑” “↑” MS1155-J-00 2010/02 -8- [AK5358B] ■ 1/fCLK VIH MCLK VIL tCLKH tCLKL dCLK=tCLKH x fCLK, tCLKL x fCLK 1/fs VIH LRCK VIL tSCK VIH SCLK VIL tSCKH tSCKL Clock Timing VIH LRCK VIL tSHLR tLRSH VIH SCLK VIL tLRS tSSD SDTO 50%VD Audio Interface Timing (Slave mode) MS1155-J-00 2010/02 -9- [AK5358B] LRCK 50%VD tMSLR dSCK SCLK 50%VD tSSD SDTO 50%VD Audio Interface Timing (Master mode) VIH PDN VIL tPDV SDTO 50%VD tPD PDN VIL Power Down & Reset Timing MS1155-J-00 2010/02 - 10 - [AK5358B] ■ AK5358B MCLK, SCLK, LRCK Table 1 CKS2-0 pin (Table 2) MCLK fs 32kHz 44.1kHz 48kHz 96kHz LRCK AK5358B SCLK MCLK 256fs 384fs 512fs 8.192MHz 12.288MHz 16.384MHz 11.2896MHz 16.9344MHz 22.5792MHz 12.288MHz 18.432MHz 24.576MHz 24.576MHz 36.864MHz N/A Table 1. System Clock Example Mode CKS2 CKS1 CKS0 0 L L L 1 2 3 L L L L H H H L H 4 H L L 5 6 7 H H H L H H H L H Note 15. SCLK = 32fs MCLK Input Level SDTO Master/Slave / 768fs 24.576MHz 33.8688MHz 36.864MHz N/A MCLK 256/384fs (8k≤fs≤96k) CMOS Slave 512/768fs (8k≤fs≤48k) Reserved CMOS Master 256fs (8k≤fs≤96k) CMOS Master 512fs (8k≤fs≤48k) 256/384fs(∼ 96kHz) TTL Slave 512/768fs(∼ 48kHz) Reserved CMOS Master 384fs (8k≤fs≤96k) CMOS Master 768fs (8k≤fs≤48k) Table 2. Operation Mode Select SCLK ≥ 48fs or 32fs (Note 15) 64fs 64fs ≥ 48fs or 32fs (Note 15) 64fs 64fs 16bit MS1155-J-00 2010/02 - 11 - [AK5358B] ■ 2 DIF pin (Table 3) SDTO SCLK MSB 2’s complement LRCK SCLK LRCK Mode 0 1 DIF pin L H SCLK fs 64fs SDTO LRCK SCLK 24bit, MSB justified H/L ≥ 48fs or 32fs 24bit, I2S Compatible L/H ≥ 48fs or 32fs Table 3. Audio Interface Format Figure Figure 1 Figure 2 LRCK 0 1 2 31 0 1 2 20 21 22 23 24 20 21 22 23 24 31 0 1 SCLK(64fs) SDTO(o) 23 22 4 3 2 1 0 23 22 4 3 2 1 0 23 23:MSB, 0:LSB Lch Data Rch Data Figure 1. Mode 0 Timing LRCK 0 1 2 3 0 1 2 21 22 23 24 25 21 22 23 24 25 0 1 SCLK(64fs) SDTO(o) 23 22 4 3 2 1 0 23 22 4 3 2 1 0 23:MSB, 0:LSB Lch Data Rch Data Figure 2. Mode 1 Timing ■ HPF ADC DC HPF HPF fc fs=48kHz 1.0Hz fs MS1155-J-00 2010/02 - 12 - [AK5358B] ■ AK5358B PDN pin MCLK “L” VCOM LRCK MCLK 13us VSS1 PDN pin SDTO 4132 x LRCK ADC 4129 x LRCK “0” ”H” 2’s ADC ) ( (1) PDN Internal State Normal Operation GD Power-down Initialize Normal Operation GD (2) A/D In (Analog) (3) A/D Out (Digital) “0”data Idle Noise Clock In “0”data Idle Noise (4) MCLK,LRCK,SCLK Figure 3. / (PDN pin ) (1) PDN Internal State Normal Operation Power-down Initialize Normal Operation GD (2) GD A/D In (Analog) A/D Out (Digital) Idle Noise (3) “0”data (5) Clock In “0”data Idle Noise (6) MCLK Figure 4. / Notes: (1) 4132/fs (2) (3) ADC “0” (4) MCLK (5) MCLK 13us (6) MCLK LRCK (MCLK ) 4129/fs (GD) MS1155-J-00 2010/02 - 13 - [AK5358B] ■ 13us (min) AK5358B MCLK PDN pin “L” PDN pin=“H” ( LRCK ) MCLK Mode 1 LRCK PDN pin=“H” MCLK MS1155-J-00 2010/02 - 14 - [AK5358B] Figure 5 (AKD5358B) Rch In 10u + Lch In + 10u 2.2u 1 AINR CKS0 16 2 AINL CKS2 15 3 CKS1 DIF 14 4 VCOM PDN 13 5 Analog 5V Digital 3.3V + 10u 0.1u + 10u 0.1u AK5358BSCLK VSS1 Mode Control Reset 12 6 VA MCLK 11 7 VD LRCK 10 8 VSS2 SDTO 9 Audio Controller Analog Ground System Ground : - AK5358B VSS1, VSS2 - CKS1 pin VA VSS1 Figure 5. Typical Connection Diagram Digital Ground Analog Ground System Controller 1 AINR CKS0 16 2 AINL CKS2 15 3 CKS1 DIF 14 4 VCOM PDN 13 5 VSS1 SCLK 12 6 VA MCLK 11 7 VD LRCK 10 8 VSS2 SDTO AK5358B 9 Figure 6. Ground Layout Note: VSS1 pin VSS2 pin MS1155-J-00 2010/02 - 15 - [AK5358B] 1. VA VD VSS1 VSS2 PC 2. VA pin VCOM 50%VA 2.2μF VSS1 VCOM pin VCOM, VA pin 3. ADC ) 20kΩ (typ@fs=48kHz) 0.6 x VA Vpp (typ.) AK5358B VSS1 VA 2’s complement DC (ADC VCOM DC HPF AK5358B 64fs 64fs AK5358B 64fs (RC ) MS1155-J-00 2010/02 - 16 - [AK5358B] 16pin TSSOP (Unit: mm) 1.1 (max) *5.0±0.1 16 9 8 1 0.13 6.4±0.2 *4.4±0.1 A 0.65 0.22±0.1 M 0.17±0.05 Detail A 0.5±0.2 0.1±0.1 Seating Plane 0.10 NOTE: Dimension "*" does not include mold flash. 0-10° ■ : : : MS1155-J-00 2010/02 - 17 - [AK5358B] AKM 5358BET XXYYY 1) 2) 3) Date (YY/MM/DD) 10/02/09 Revision 00 Reason Pin #1 indication Date Code: XXYYY (5 digits) XX: Lot# YYY: Date Code Marketing Code: 5358BET Page MS1155-J-00 Contents 2010/02 - 18 - [AK5358B] • • • • • • MS1155-J-00 2010/02 - 19 -